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authorRichard Earnshaw <rearnsha@arm.com>2021-07-01 11:37:13 +0100
committerRichard Earnshaw <rearnsha@arm.com>2021-07-01 11:37:13 +0100
commit417f991f08cb869e8274e0a6af6c88b14413e0ec (patch)
tree8d43b7ce072d66c67b45c711c205aee349002248 /include
parent9cb74cfd815bfab451546206094b7ab49d382a24 (diff)
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arm: don't treat XScale features as part of the FPU [PR 28031]
Although the XScale and its iwMMX extensions are implemented in the Arm co-processor space, they are not considered to be part of the FPU specification. In particular, they cannot be enabled or disabled via a .fpu directive. It's therefore incorrect to strip these properties when a new .fpu directive is encountered. Note that the legacy Maverick co-processor is considered to be a FPU and it is possible to control this via the .fpu directive. include: PR gas/28031 * opcode/arm.h (FPU_ANY): Exclude XScale-related features.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog5
-rw-r--r--include/opcode/arm.h2
2 files changed, 6 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 2a5b16f..06bc4c5 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2021-07-01 Richard Earnshaw <rearnsha@arm.com>
+
+ PR gas/28031
+ * opcode/arm.h (FPU_ANY): Exclude XScale-related features.
+
2021-06-18 H.J. Lu <hongjiu.lu@intel.com>
* elf/common.h (GNU_PROPERTY_UINT32_AND_LO): New.
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 03a8071..90c09a7 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -383,7 +383,7 @@
#define ARM_ARCH_NONE ARM_FEATURE_LOW (0, 0)
#define FPU_NONE ARM_FEATURE_LOW (0, 0)
#define ARM_ANY ARM_FEATURE (-1, -1 & ~ (ARM_EXT2_MVE | ARM_EXT2_MVE_FP), 0) /* Any basic core. */
-#define FPU_ANY ARM_FEATURE_COPROC (-1) /* Any FPU. */
+#define FPU_ANY ARM_FEATURE_COPROC (-1 & ~(ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT | ARM_CEXT_IWMMXT2)) /* Any FPU. */
#define FPU_ANY_HARD ARM_FEATURE_COPROC (FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
/* Extensions containing some Thumb-2 instructions. If any is present, Thumb
ISA is Thumb-2. */