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authorRichard Sandiford <rdsandiford@googlemail.com>2003-06-25 15:31:59 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2003-06-25 15:31:59 +0000
commit2d0d09ca83b867fe61190d259d2ed6c139c983f6 (patch)
tree80c448ff465c6c4d187b14b6e9d184c8fc925a9e /include
parent8d1e520a64346de732712873fa90ca941bcab72d (diff)
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include/opcode/
* h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove. (IMM8U, IMM8U_NS): Define. (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy. gas/ * config/tc-h8300.c (get_specific): Allow ':8' to be used for unsigned 8-bit operands. gas/testsuite/ * gas/h8300/h8sx_mov_imm.[sd]: Add tests for mov.[wl] #xx:8,@yy.
Diffstat (limited to 'include')
-rw-r--r--include/opcode/ChangeLog10
-rw-r--r--include/opcode/h8300.h10
2 files changed, 13 insertions, 7 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index bc80126..e100c11 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,7 +1,13 @@
2003-06-25 Richard Sandiford <rsandifo@redhat.com>
- * include/opcode/h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd
- and mov.l ERs,@(dd:32,ERd) entries.
+ * h8300.h (IMM2_NS, IMM8_NS, IMM16_NS): Remove.
+ (IMM8U, IMM8U_NS): Define.
+ (h8_opcodes): Use IMM8U_NS for mov.[wl] #xx:8,@yy.
+
+2003-06-25 Richard Sandiford <rsandifo@redhat.com>
+
+ * h8300.h (h8_opcodes): Fix the mov.l @(dd:32,ERs),ERd and
+ mov.l ERs,@(dd:32,ERd) entries.
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
diff --git a/include/opcode/h8300.h b/include/opcode/h8300.h
index 9dd8105..bfac3f8 100644
--- a/include/opcode/h8300.h
+++ b/include/opcode/h8300.h
@@ -117,6 +117,7 @@ enum h8_flags {
B31 = 0x40000000, /* Bit 3 must be high. */
E = 0x80000000, /* End of nibble sequence. */
+ /* Immediates smaller than 8 bits are always unsigned. */
IMM3 = IMM | L_3,
IMM4 = IMM | L_4,
IMM5 = IMM | L_5,
@@ -124,15 +125,14 @@ enum h8_flags {
IMM2 = IMM | L_2,
IMM8 = IMM | SRC | L_8,
+ IMM8U = IMM | SRC | L_8U,
IMM16 = IMM | SRC | L_16,
IMM16U = IMM | SRC | L_16U,
IMM32 = IMM | SRC | L_32,
IMM3NZ_NS = IMM3NZ | NO_SYMBOLS,
- IMM2_NS = IMM2 | NO_SYMBOLS,
IMM4_NS = IMM4 | NO_SYMBOLS,
- IMM8_NS = IMM8 | NO_SYMBOLS,
- IMM16_NS = IMM16 | NO_SYMBOLS,
+ IMM8U_NS = IMM8U | NO_SYMBOLS,
IMM16U_NS = IMM16U | NO_SYMBOLS,
RD8 = DST | L_8 | REG,
@@ -1475,7 +1475,7 @@ struct h8_opcode h8_opcodes[] =
{O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS16DST, E}}, {{0x6, 0xb, 0xd, IMM4, DSTABS16LIST, E}}},
{O (O_MOV, SW), AV_H8SX, 0, "mov.w", {{IMM4_NS, ABS32DST, E}}, {{0x6, 0xb, 0xf, IMM4, DSTABS32LIST, E}}},
- MOVFROM_IMM8 (O (O_MOV, SW), PREFIX_015D, "mov.w", IMM8_NS),
+ MOVFROM_IMM8 (O (O_MOV, SW), PREFIX_015D, "mov.w", IMM8U_NS),
MOVFROM_IMM (O (O_MOV, SW), PREFIX_7974, "mov.w", IMM16, IMM16LIST),
{O (O_MOV, SW), AV_H8, 2, "mov.w", {{RS16, RD16, E}}, {{0x0, 0xD, RS16, RD16, E}}},
@@ -1501,7 +1501,7 @@ struct h8_opcode h8_opcodes[] =
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM3NZ_NS, RD32, E}}, {{0x0, 0xf, B31 | IMM3NZ, B31 | RD32, E}}},
- MOVFROM_IMM8 (O (O_MOV, SL), PREFIX_010D, "mov.l", IMM8_NS),
+ MOVFROM_IMM8 (O (O_MOV, SL), PREFIX_010D, "mov.l", IMM8U_NS),
MOVFROM_IMM (O (O_MOV, SL), PREFIX_7A7C, "mov.l", IMM16U_NS, IMM16ULIST),
{O (O_MOV, SL), AV_H8SX, 0, "mov.l", {{IMM16U_NS, RD32, E}}, {{0x7, 0xa, 0x0, B31 | RD32, IMM16ULIST, E}}},