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authorKito Cheng <kito.cheng@sifive.com>2021-06-29 14:36:35 +0800
committerNelson Chu <nelson.chu@sifive.com>2021-07-06 11:34:36 +0800
commitfbc95f1e11facf233e89a9c2b4dde06b9aaf4b86 (patch)
tree810aa9b4b50933cd6e9e7f844d15886db695fd2a /include
parent07b2745f850232e1c2fdafb0f65ea88e6127218b (diff)
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RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR.
We added PT_RISCV_ATTRIBUTES to program header to make .riscv.attribute easier to find in dynamic loader or kernel. Ref: https://github.com/riscv/riscv-elf-psabi-doc/pull/71 ChangeLog: bfd/ * elfnn-riscv.c(RISCV_ATTRIBUTES_SECTION_NAME): New. (riscv_elf_additional_program_headers): Ditto. (riscv_elf_modify_segment_map): Ditto. (elf_backend_additional_program_headers): Ditto. (elf_backend_modify_segment_map): Ditto. (elf_backend_obj_attrs_section): Use RISCV_ATTRIBUTES_SECTION_NAME rather than string literal. binutils/ * readelf.c(get_riscv_segment_type): New. (get_segment_type): Handle EM_RISCV. include/ * elf/riscv.h (PT_RISCV_ATTRIBUTES): New. * testsuite/ld-elf/orphan-region.ld: Discard .riscv.attributes section for simplify testcase. * testsuite/ld-riscv-elf/attr-phdr.d: New. * testsuite/ld-riscv-elf/attr-phdr.s: Ditto. * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Add attr-phdr to testcase.
Diffstat (limited to 'include')
-rw-r--r--include/elf/riscv.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/elf/riscv.h b/include/elf/riscv.h
index fb376a0..8082283 100644
--- a/include/elf/riscv.h
+++ b/include/elf/riscv.h
@@ -120,6 +120,11 @@ END_RELOC_NUMBERS (R_RISCV_max)
/* Additional section types. */
#define SHT_RISCV_ATTRIBUTES 0x70000003 /* Section holds attributes. */
+/* Processor specific program header types. */
+
+/* Location of RISC-V ELF attribute section. */
+#define PT_RISCV_ATTRIBUTES 0x70000003
+
/* Object attributes. */
enum
{