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| author | Nick Clifton <nickc@redhat.com> | 2015-11-02 14:14:22 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2015-11-02 14:14:22 +0000 |
| commit | e292aa7a9529771c04e9578a2307b8c95bb5591c (patch) | |
| tree | ab52096b7ce3007ec7b2744e0f90ce6075b9a844 /include | |
| parent | a62e59897771e2f04fad908fc891714b9bd75d7b (diff) | |
| download | gdb-e292aa7a9529771c04e9578a2307b8c95bb5591c.zip gdb-e292aa7a9529771c04e9578a2307b8c95bb5591c.tar.gz gdb-e292aa7a9529771c04e9578a2307b8c95bb5591c.tar.bz2 | |
Fix disassembly of RX zero-offset register indirect instructions.
opcode * rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect.
opcodes * rx-decode.opc (rx_disp): If the displacement is zero, set the
type to RX_Operand_Zero_Indirect.
* rx-decode.c: Regenerate.
* rx-dis (print_insn): Handle RX_Operand_Zero_Indirect.
gas * config/rx-parse.y: Allow zero value for 5-bit displacements.
tests * gas/rx/mov.sm: Add tests for zero offset indirect moves.
* gas/rx/mov.d: Update expected output.
Diffstat (limited to 'include')
| -rw-r--r-- | include/opcode/ChangeLog | 4 | ||||
| -rw-r--r-- | include/opcode/rx.h | 1 |
2 files changed, 5 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index b049302..18361ec 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2015-11-02 Nick Clifton <nickc@redhat.com> + + * rx.h (enum RX_Operand_Type): Add RX_Operand_Zero_Indirect. + 2015-10-28 Yao Qi <yao.qi@linaro.org> * aarch64.h (aarch64_decode_insn): Update declaration. diff --git a/include/opcode/rx.h b/include/opcode/rx.h index 4a2cb14..66a1b34 100644 --- a/include/opcode/rx.h +++ b/include/opcode/rx.h @@ -48,6 +48,7 @@ typedef enum RX_Operand_Immediate, /* #addend */ RX_Operand_Register, /* Rn */ RX_Operand_Indirect, /* [Rn + addend] */ + RX_Operand_Zero_Indirect,/* [Rn] */ RX_Operand_Postinc, /* [Rn+] */ RX_Operand_Predec, /* [-Rn] */ RX_Operand_Condition, /* eq, gtu, etc */ |