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authorPhilipp Tomsich <prt@gnu.org>2021-01-07 15:53:25 +0800
committerNelson Chu <nelson.chu@sifive.com>2021-01-07 16:45:43 +0800
commitaa881ecde48c7a0224b92e2cfa43b37ee9ec9fa2 (patch)
tree1b0e0814c4a7ed9567d8d49aad19de327ea78682 /include
parent4d4490b8d772321e9634541b81be25095a5a06ef (diff)
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RISC-V: Add pause hint instruction.
Add support for the pause hint instruction, as specified in the Zihintpause extension. The pause instruction is encoded as a special form of a memory fence (which is available as part of the base instruction set). The chosen encoding does not mandate any particular memory ordering and therefore is a true hint. bfd/ * elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause. gas/ * config/tc-riscv.c (riscv_multi_subset_supports): Added INSN_CLASS_ZIHINTPAUSE. * testsuite/gas/riscv/pause.d: New testcase. Adding coverage for the pause hint instruction. * testsuite/gas/riscv/pause.s: Likewise. include/ * opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN for pause hint instruction. * opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE. opcodes/ * riscv-opc.c (riscv_opcodes): Add pause hint instruction.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog6
-rw-r--r--include/opcode/riscv-opc.h3
-rw-r--r--include/opcode/riscv.h1
3 files changed, 10 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 80be817..6345fc5 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,9 @@
+2021-01-07 Philipp Tomsich <prt@gnu.org>
+
+ * opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN
+ for pause hint instruction.
+ * opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE.
+
2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
Jim Wilson <jimw@sifive.com>
Andrew Waterman <andrew@sifive.com>
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 7dbe830..38ce41d 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -157,6 +157,8 @@
#define MASK_SW 0x707f
#define MATCH_SD 0x3023
#define MASK_SD 0x707f
+#define MATCH_PAUSE 0x0100000f
+#define MASK_PAUSE 0xffffffff
#define MATCH_FENCE 0xf
#define MASK_FENCE 0x707f
#define MATCH_FENCE_I 0x100f
@@ -984,6 +986,7 @@ DECLARE_INSN(sb, MATCH_SB, MASK_SB)
DECLARE_INSN(sh, MATCH_SH, MASK_SH)
DECLARE_INSN(sw, MATCH_SW, MASK_SW)
DECLARE_INSN(sd, MATCH_SD, MASK_SD)
+DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE)
DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
diff --git a/include/opcode/riscv.h b/include/opcode/riscv.h
index 326d840..33ef290 100644
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -311,6 +311,7 @@ enum riscv_insn_class
INSN_CLASS_D_AND_C,
INSN_CLASS_ZICSR,
INSN_CLASS_ZIFENCEI,
+ INSN_CLASS_ZIHINTPAUSE,
INSN_CLASS_ZBA,
INSN_CLASS_ZBB,
INSN_CLASS_ZBC,