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authorAlan Modra <amodra@gmail.com>2016-09-29 15:12:47 +0930
committerAlan Modra <amodra@gmail.com>2016-09-29 15:12:47 +0930
commita5721ba270ddf860e0e5a45bba456214e8eac2be (patch)
treed859bdad489788b9173c41728cc490f7ffcd20b5 /include
parentb82317dd347991288e4cca4772e951c672fca8cc (diff)
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Disallow 3-operand cmp[l][i] for ppc64
cmp[l][o] get an optional L field only when generating 32-bit code. dcbf, tlbie and tlbiel keep their optional L field, ditto for R field of tbegin. cmprb, tsr., wlcr[all] and mtsle all change to a compulsory L field. L field of dcbf and wclr is 2 bits. PR 20641 include/ * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define. opcodes/ * ppc-opc.c (L): Make compulsory. (LOPT): New, optional form of L. (HTM_R): Define as LOPT. (L0, L1): Delete. (L32OPT): New, optional for 32-bit L. (L2OPT): New, 2-bit L for dcbf. (SVC_LEC): Update. (L2): Define. (insert_l0, extract_l0, insert_l1, extract_l2): Delete. (powerpc_opcodes <cmpli, cmpi, cmpl, cmp>): Use L32OPT. <dcbf>: Use L2OPT. <tlbiel, tlbie>: Use LOPT. <wclr, wclrall>: Use L2. gas/ * config/tc-ppc.c (md_assemble): Handle PPC_OPERAND_OPTIONAL32. * testsuite/gas/ppc/power8.s: Provide tbegin. operand. * testsuite/gas/ppc/power9.d: Update cmprb disassembly.
Diffstat (limited to 'include')
-rw-r--r--include/ChangeLog4
-rw-r--r--include/opcode/ppc.h4
2 files changed, 8 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index 01d1c14..652bb21 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2016-09-29 Alan Modra <amodra@gmail.com>
+
+ * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
+
2016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (insn_class_t): Add two new classes.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index d9f973d..66d2ceb 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -407,6 +407,10 @@ extern const unsigned int num_powerpc_operands;
is omitted, then the value it should use for the operand is stored
in the SHIFT field of the immediatly following operand field. */
#define PPC_OPERAND_OPTIONAL_VALUE (0x400000)
+
+/* This flag is only used with PPC_OPERAND_OPTIONAL. The operand is
+ only optional when generating 32-bit code. */
+#define PPC_OPERAND_OPTIONAL32 (0x800000)
/* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an