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authorIan Lance Taylor <ian@airs.com>1998-03-30 16:02:18 +0000
committerIan Lance Taylor <ian@airs.com>1998-03-30 16:02:18 +0000
commit86bdd00edd5f65da5e4773af1fa8cfa404118425 (patch)
treeccf30e97ce48ad937fd4beaca91591724a33d26b /include
parent368802d1c936cb71953f2db39737c9fb60488741 (diff)
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comment fix
Diffstat (limited to 'include')
-rw-r--r--include/opcode/i386.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index c89cf18..d238e6e 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -35,7 +35,7 @@ static const template i386_optab[] = {
/* The next instruction accepts WordReg so that `movl %gs,%esi' can be
used to move a segment register to a 32 bit register without using
a size prefix, which works although Intel does not document it. I
- think it clobbers the upper 16 bits in the 32 bit register. */
+ think it zeroes the upper 16 bits in the 32 bit register. */
{ "mov", 2, 0x8c, _, D|Modrm, { SReg3|SReg2, WordReg|WordMem, 0 } },
/* move to/from control debug registers */
{ "mov", 2, 0x0f20, _, D|Modrm, { Control, Reg32, 0} },