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| author | Sudakshina Das <sudi.das@arm.com> | 2018-10-05 10:51:22 +0100 |
|---|---|---|
| committer | Richard Earnshaw <Richard.Earnshaw@arm.com> | 2018-10-05 11:31:21 +0100 |
| commit | dad0c3bfb5e32ff3f2a03830dc189fe207c7ae00 (patch) | |
| tree | fde5239ba63c1a055cc6a99b0a65d1a411d72ebf /include/opcode/arm.h | |
| parent | 7fadb25d6faf2665305016ceb4aeaeeb86015569 (diff) | |
| download | gdb-dad0c3bfb5e32ff3f2a03830dc189fe207c7ae00.zip gdb-dad0c3bfb5e32ff3f2a03830dc189fe207c7ae00.tar.gz gdb-dad0c3bfb5e32ff3f2a03830dc189fe207c7ae00.tar.bz2 | |
[Arm, 3/3] Add Execution and Data Prediction instructions for AArch32
This patch is part of the patch series to add support for ARMv8.5-A
extensions.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
This patch adds the Execution and Data Prediction Restriction
instructions (that is, cfprctx, dvprxtc, cpprctx). These are all
aliases to MCR and are disassembled as such.
This instruction is retrospectively made optional for all versions of
the architecture from ARMv8.0 to ARMv8.4 and is mandatory from
ARMv8.5. Hence adding a new +predres for older versions of the
architecture.
*** include/ChangeLog ***
2018-10-05 Sudakshina Das <sudi.das@arm.com>
* opcode/arm.h (ARM_EXT2_PREDRES): New.
(ARM_ARCH_V8_5A): Add ARM_EXT2_PREDRES by default.
*** gas/ChangeLog ***
2018-10-05 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (arm_ext_predres): New.
(insns): Add new cfprctx, dvprctx and cpprctx instructions.
(arm_extensions): Add "predres".
* doc/c-arm.texi: Document the above.
* testsuite/gas/arm/predres-bad.d: New test.
* testsuite/gas/arm/predres-bad.l: New test.
* testsuite/gas/arm/predres.s: New test.
* testsuite/gas/arm/predres1.d: New test.
* testsuite/gas/arm/predres2.d: New test.
Diffstat (limited to 'include/opcode/arm.h')
| -rw-r--r-- | include/opcode/arm.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/opcode/arm.h b/include/opcode/arm.h index c595799..71c4306 100644 --- a/include/opcode/arm.h +++ b/include/opcode/arm.h @@ -70,6 +70,7 @@ #define ARM_EXT2_FP16_FML 0x00000800 /* ARM V8.2A FP16-FML instructions. */ #define ARM_EXT2_V8_5A 0x00001000 /* ARM V8.5A. */ #define ARM_EXT2_SB 0x00002000 /* Speculation Barrier instruction. */ +#define ARM_EXT2_PREDRES 0x00004000 /* Prediction Restriction insns. */ /* Co-processor space extensions. */ #define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */ @@ -297,7 +298,8 @@ CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \ | FPU_NEON_EXT_DOTPROD) #define ARM_ARCH_V8_5A ARM_FEATURE (ARM_AEXT_V8A, \ - ARM_AEXT2_V8_5A | ARM_EXT2_SB, \ + ARM_AEXT2_V8_5A | ARM_EXT2_SB \ + | ARM_EXT2_PREDRES, \ CRC_EXT_ARMV8 | FPU_NEON_EXT_RDMA \ | FPU_NEON_EXT_DOTPROD) #define ARM_ARCH_V8M_BASE ARM_FEATURE_CORE (ARM_AEXT_V8M_BASE, ARM_AEXT2_V8M) |