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| author | Feiyang Chen <chenfeiyang@loongson.cn> | 2022-08-02 17:16:56 +0800 |
|---|---|---|
| committer | Tiezhu Yang <yangtiezhu@loongson.cn> | 2022-08-09 22:22:23 +0800 |
| commit | ea3352172ec868b821fa34b31ba8128bde735405 (patch) | |
| tree | 60452294ef7a7f9524a174b0c5fa1f2ddd5ac7b0 /gdbserver | |
| parent | a88c79b77036e4778e70d62081c3cfd1044bb8e3 (diff) | |
| download | gdb-ea3352172ec868b821fa34b31ba8128bde735405.zip gdb-ea3352172ec868b821fa34b31ba8128bde735405.tar.gz gdb-ea3352172ec868b821fa34b31ba8128bde735405.tar.bz2 | |
gdb/gdbserver: LoongArch: Improve implementation of fcc registers
The current implementation of the fcc register is referenced to the
user_fp_state structure of the kernel uapi [1].
struct user_fp_state {
uint64_t fpr[32];
uint64_t fcc;
uint32_t fcsr;
};
But it is mistakenly defined as a 64-bit fputype register, resulting
in a confusing output of "info register".
(gdb) info register
...
fcc {f = 0x0, d = 0x0} {f = 0, d = 0}
...
According to "Condition Flag Register" in "LoongArch Reference Manual"
[2], there are 8 condition flag registers of size 1. Use 8 registers of
uint8 to make it easier for users to view the fcc register groups.
(gdb) info register
...
fcc0 0x1 1
fcc1 0x0 0
fcc2 0x0 0
fcc3 0x0 0
fcc4 0x0 0
fcc5 0x0 0
fcc6 0x0 0
fcc7 0x0 0
...
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/uapi/asm/ptrace.h
[2] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_condition_flag_register
Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Diffstat (limited to 'gdbserver')
| -rw-r--r-- | gdbserver/linux-loongarch-low.cc | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/gdbserver/linux-loongarch-low.cc b/gdbserver/linux-loongarch-low.cc index 7180f31..cccf1ba 100644 --- a/gdbserver/linux-loongarch-low.cc +++ b/gdbserver/linux-loongarch-low.cc @@ -127,12 +127,24 @@ loongarch_fill_fpregset (struct regcache *regcache, void *buf) { gdb_byte *regbuf = nullptr; int fprsize = register_size (regcache->tdesc, LOONGARCH_FIRST_FP_REGNUM); + int fccsize = register_size (regcache->tdesc, LOONGARCH_FIRST_FCC_REGNUM); for (int i = 0; i < LOONGARCH_LINUX_NUM_FPREGSET; i++) { regbuf = (gdb_byte *)buf + fprsize * i; collect_register (regcache, LOONGARCH_FIRST_FP_REGNUM + i, regbuf); } + + for (int i = 0; i < LOONGARCH_LINUX_NUM_FCC; i++) + { + regbuf = (gdb_byte *)buf + fprsize * LOONGARCH_LINUX_NUM_FPREGSET + + fccsize * i; + collect_register (regcache, LOONGARCH_FIRST_FCC_REGNUM + i, regbuf); + } + + regbuf = (gdb_byte *)buf + fprsize * LOONGARCH_LINUX_NUM_FPREGSET + + fccsize * LOONGARCH_LINUX_NUM_FCC; + collect_register (regcache, LOONGARCH_FCSR_REGNUM, regbuf); } /* Supply FPRs from BUF into REGCACHE. */ @@ -142,12 +154,24 @@ loongarch_store_fpregset (struct regcache *regcache, const void *buf) { const gdb_byte *regbuf = nullptr; int fprsize = register_size (regcache->tdesc, LOONGARCH_FIRST_FP_REGNUM); + int fccsize = register_size (regcache->tdesc, LOONGARCH_FIRST_FCC_REGNUM); for (int i = 0; i < LOONGARCH_LINUX_NUM_FPREGSET; i++) { regbuf = (const gdb_byte *)buf + fprsize * i; supply_register (regcache, LOONGARCH_FIRST_FP_REGNUM + i, regbuf); } + + for (int i = 0; i < LOONGARCH_LINUX_NUM_FCC; i++) + { + regbuf = (const gdb_byte *)buf + fprsize * LOONGARCH_LINUX_NUM_FPREGSET + + fccsize * i; + supply_register (regcache, LOONGARCH_FIRST_FCC_REGNUM + i, regbuf); + } + + regbuf = (const gdb_byte *)buf + fprsize * LOONGARCH_LINUX_NUM_FPREGSET + + fccsize * LOONGARCH_LINUX_NUM_FCC; + supply_register (regcache, LOONGARCH_FCSR_REGNUM, regbuf); } /* LoongArch/Linux regsets. */ |