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| author | Andrew Burgess <andrew.burgess@embecosm.com> | 2018-03-06 16:27:13 +0000 |
|---|---|---|
| committer | Andrew Burgess <andrew.burgess@embecosm.com> | 2018-03-07 17:36:37 +0000 |
| commit | ea005f31ca7a823680c70a75ae073bee52487859 (patch) | |
| tree | c53b97c431d27421fd9a50f52e7694323b46b67b /gdb | |
| parent | 0c1ded8dc0be9c61975e04a0b416b064223f7bda (diff) | |
| download | gdb-ea005f31ca7a823680c70a75ae073bee52487859.zip gdb-ea005f31ca7a823680c70a75ae073bee52487859.tar.gz gdb-ea005f31ca7a823680c70a75ae073bee52487859.tar.bz2 | |
gdb: Add riscv to list of architectures with a save_reggroup
The regcache cooked_read test needs to know which architectures have a
save_reggroup, riscv does and needs adding to the list.
gdb/ChangeLog:
* regcache.c (cooked_read_test): Add riscv to the list of
architectures that have a save_reggroup.
Diffstat (limited to 'gdb')
| -rw-r--r-- | gdb/ChangeLog | 5 | ||||
| -rw-r--r-- | gdb/regcache.c | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 8de20e6..928dbab 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2018-03-07 Andrew Burgess <andrew.burgess@embecosm.com> + + * regcache.c (cooked_read_test): Add riscv to the list of + architectures that have a save_reggroup. + 2018-03-07 Andreas Arnez <arnez@linux.vnet.ibm.com> * gnu-v3-abi.c (gnuv3_rtti_type): Add early exit if the given diff --git a/gdb/regcache.c b/gdb/regcache.c index c73582f..40c58a0 100644 --- a/gdb/regcache.c +++ b/gdb/regcache.c @@ -1695,7 +1695,8 @@ cooked_read_test (struct gdbarch *gdbarch) || bfd_arch == bfd_arch_msp430 || bfd_arch == bfd_arch_mep || bfd_arch == bfd_arch_mips || bfd_arch == bfd_arch_v850_rh850 || bfd_arch == bfd_arch_tic6x || bfd_arch == bfd_arch_mn10300 - || bfd_arch == bfd_arch_rl78 || bfd_arch == bfd_arch_score) + || bfd_arch == bfd_arch_rl78 || bfd_arch == bfd_arch_score + || bfd_arch == bfd_arch_riscv) { /* Raw registers. If raw registers are not in save_reggroup, their status are unknown. */ |