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| author | Jason Molenda <jmolenda@apple.com> | 1998-04-02 01:01:35 +0000 |
|---|---|---|
| committer | Jason Molenda <jmolenda@apple.com> | 1998-04-02 01:01:35 +0000 |
| commit | 3dcac15f1f3f940d7f5dad402155dec74291432b (patch) | |
| tree | 82d8a2d785d10e447fc91edee7fa44d7e329c71f /gdb/ns32km3-nat.c | |
| parent | 775b60dd73051e3637a07c112da519c1bb193a06 (diff) | |
| download | gdb-3dcac15f1f3f940d7f5dad402155dec74291432b.zip gdb-3dcac15f1f3f940d7f5dad402155dec74291432b.tar.gz gdb-3dcac15f1f3f940d7f5dad402155dec74291432b.tar.bz2 | |
Wed Apr 1 16:30:49 1998 Ian Dall <Ian.Dall@dsto.defence.gov.au>
* ns32k-tdep.c (flip_bytes, ns32k_localcount,
ns32k_get_enter_addr, sign_extend): Restore functions mysteriously
deleted.
* ns32knbsd-nat.c: New (?) file to support fetching and storing
registers on NetBSD hosts.
* nbsd.mh (NATDEPFILES): put ns32knbsd-nat.o instead of
ns32k-nat.o
* ns32km3-nat.c (reg_offset): Get order of floating point
registers correct. Add extra 32382 register offsets.
(REG_ADDRESS): define to point at correct part of thread
state. Use calls to "warning" instead of "message".
* tm-nbsd.h, tm-ns32km3.h (REGISTER_NAMES, NUM_REGS,
REGISTER_BYTES, REGISTER_BYTE): redefine allowing for 32382
fpu registers.
Diffstat (limited to 'gdb/ns32km3-nat.c')
| -rw-r--r-- | gdb/ns32km3-nat.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/gdb/ns32km3-nat.c b/gdb/ns32km3-nat.c index 89696ba..cdafb9c 100644 --- a/gdb/ns32km3-nat.c +++ b/gdb/ns32km3-nat.c @@ -46,14 +46,16 @@ static int reg_offset[] = { REG_N_OFFSET(r0), REG_N_OFFSET(r1), REG_N_OFFSET(r2), REG_N_OFFSET(r3), REG_N_OFFSET(r4), REG_N_OFFSET(r5), REG_N_OFFSET(r6), REG_N_OFFSET(r7), - REG_F_OFFSET(l0a), REG_F_OFFSET(l1a),REG_F_OFFSET(l2a),REG_F_OFFSET(l3a), - REG_F_OFFSET(l4a), REG_F_OFFSET(l5a),REG_F_OFFSET(l6a),REG_F_OFFSET(l7a), + REG_F_OFFSET(l0a), REG_F_OFFSET(l0b),REG_F_OFFSET(l2a),REG_F_OFFSET(l2b), + REG_F_OFFSET(l4a), REG_F_OFFSET(l4b),REG_F_OFFSET(l6a),REG_F_OFFSET(l6b), REG_N_OFFSET(sp), REG_N_OFFSET(fp), REG_N_OFFSET(pc), REG_N_OFFSET(psr), REG_F_OFFSET(fsr), - REG_F_OFFSET(l0a), REG_F_OFFSET(l2a),REG_F_OFFSET(l4a),REG_F_OFFSET(l6a) - /* @@@ 532 has more double length floating point regs, not accessed currently */ + REG_F_OFFSET(l0a), REG_F_OFFSET(l1a),REG_F_OFFSET(l2a),REG_F_OFFSET(l3a), + REG_F_OFFSET(l4a), REG_F_OFFSET(l5a),REG_F_OFFSET(l6a),REG_F_OFFSET(l7a), }; +#define REG_ADDRESS(state,regnum) ((char *)(state)+reg_offset[regnum]) + /* Fetch COUNT contiguous registers from thread STATE starting from REGNUM * Caller knows that the regs handled in one transaction are of same size. */ @@ -94,7 +96,7 @@ fetch_inferior_registers (regno) &stateCnt); if (ret != KERN_SUCCESS) - message ("fetch_inferior_registers: %s ", + warning ("fetch_inferior_registers: %s ", mach_error_string (ret)); #if 0 /* It may be more effective to store validate all of them, @@ -142,7 +144,7 @@ store_inferior_registers (regno) if (ret != KERN_SUCCESS) { - message ("store_inferior_registers (get): %s", + warning ("store_inferior_registers (get): %s", mach_error_string (ret)); if (must_suspend_thread) setup_thread (current_thread, 0); @@ -173,7 +175,7 @@ store_inferior_registers (regno) NS532_COMBINED_STATE_COUNT); if (ret != KERN_SUCCESS) - message ("store_inferior_registers (set): %s", + warning ("store_inferior_registers (set): %s", mach_error_string (ret)); if (must_suspend_thread) |