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| author | Maciej W. Rozycki <macro@imgtec.com> | 2017-06-30 07:21:56 +0100 |
|---|---|---|
| committer | Maciej W. Rozycki <macro@imgtec.com> | 2017-06-30 07:21:56 +0100 |
| commit | f5b2fd523f8f180e11f77b84a107279c562672cd (patch) | |
| tree | 531ff5dcc9ae39d065a05f96655363d3ad5895d1 /gas | |
| parent | 9785fc2a4d220322ce6cd1d79e768345ea5234d2 (diff) | |
| download | gdb-f5b2fd523f8f180e11f77b84a107279c562672cd.zip gdb-f5b2fd523f8f180e11f77b84a107279c562672cd.tar.gz gdb-f5b2fd523f8f180e11f77b84a107279c562672cd.tar.bz2 | |
MIPS: Add microMIPS R5 support
Add base microMIPS Release 5 ISA support and the ERETNC instruction in
particular, as per the architecture specifications[1][2].
Most of this change by Andrew Bennett.
References:
[1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32
Instruction Set", MIPS Technologies, Inc., Document Number: MD00582,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 266-267
[2] "MIPS Architecture for Programmers Volume II-B: The microMIPS64
Instruction Set", MIPS Technologies, Inc., Document Number: MD00594,
Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit
Instructions", pp. 326-327
binutils/
* NEWS: Mention microMIPS Release 5 ISA support.
opcodes/
* micromips-opc.c (I36): New macro.
(micromips_opcodes): Add "eretnc".
gas/
* testsuite/gas/mips/micromips@r5.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/micromips@r5.d | 9 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/mips.exp | 2 |
3 files changed, 16 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 4d8f552..c6fb96a 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2017-06-30 Andrew Bennett <andrew.bennett@imgtec.com> + Maciej W. Rozycki <macro@imgtec.com> + + * testsuite/gas/mips/micromips@r5.d: New test. + * testsuite/gas/mips/mips.exp: Run the new test. + 2017-06-30 Maciej W. Rozycki <macro@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> diff --git a/gas/testsuite/gas/mips/micromips@r5.d b/gas/testsuite/gas/mips/micromips@r5.d new file mode 100644 index 0000000..09a1d5c --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@r5.d @@ -0,0 +1,9 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#source: r5.s +#name: Test MIPS32r5 instructions + +.*: +file format .*mips.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> 0001f37c eretnc + \.\.\. diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index 6a6b47d..793505f 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1565,7 +1565,7 @@ if { [istarget mips*-*-vxworks*] } { run_dump_test_arches "xpa-err" [mips_arch_list_matching mips32r2 !micromips] run_dump_test_arches "xpa-virt-err" \ [mips_arch_list_matching mips32r2 !micromips] - run_dump_test_arches "r5" "-32" [mips_arch_list_matching mips32r5 !micromips] + run_dump_test_arches "r5" "-32" [mips_arch_list_matching mips32r5] run_dump_test "pcrel-1" run_dump_test "pcrel-2" |