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authorJim Wilson <jimw@sifive.com>2017-11-29 10:22:26 -0800
committerJim Wilson <jimw@sifive.com>2017-11-29 10:22:26 -0800
commitf923328821e2e835c725822bce2aac6e10c52dd9 (patch)
tree04469c8fdde414d8c6eb775806bd36b1e1b22d52 /gas
parentf10e937a1cdcffcca748c226ed78d09369fc4cd0 (diff)
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In x86 -n docs, mention that you need an explicit nop fill byte.
gas/ PR gas/22464 * doc/c-i386.texi (-n): Clarify docs.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/doc/c-i386.texi3
2 files changed, 7 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0512f23..8124043 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2017-11-29 Jim Wilson <jimw@sifive.com>
+
+ PR gas/22464
+ * doc/c-i386.texi (-n): Clarify docs.
+
2017-11-29 Renlin Li <renlin.li@arm.com>
* config/tc-aarch64.c (reg_names): Fix IP1 register alias typo.
diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index a1d33bd..a0e280c 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -74,7 +74,8 @@ usage and use x86-64 as target platform).
@item -n
By default, x86 GAS replaces multiple nop instructions used for
alignment within code sections with multi-byte nop instructions such
-as leal 0(%esi,1),%esi. This switch disables the optimization.
+as leal 0(%esi,1),%esi. This switch disables the optimization if a single
+byte nop (0x90) is explicitly specified as the fill byte for alignment.
@cindex @samp{--divide} option, i386
@item --divide