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| author | Jan Beulich <jbeulich@suse.com> | 2022-03-18 10:55:45 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-03-18 10:55:45 +0100 |
| commit | c4d0963383ad8ca0f0bf63c857b9462efdacff7c (patch) | |
| tree | f0d5b26b001e3b39ed952c5e3df2ad2d672bd7d6 /gas | |
| parent | a548407ec2f8e9bc2d01d9774f6af45bbbd209e3 (diff) | |
| download | gdb-c4d0963383ad8ca0f0bf63c857b9462efdacff7c.zip gdb-c4d0963383ad8ca0f0bf63c857b9462efdacff7c.tar.gz gdb-c4d0963383ad8ca0f0bf63c857b9462efdacff7c.tar.bz2 | |
x86: also fold remaining multi-vector-size shift insns
By slightly relaxing the checking in operand_type_register_match() we
can fold the vector shift insns with an XMM source as well. While
strictly speaking an overlap in just one size (see the code comment) is
not enough (both operands could have multiple sizes with just a single
common one), this is good enough for all templates we have, or which
could sensibly / usefully appear (within the scope of the present
operand matching model).
Tightening this a little would be possible, but would require broadcast
related information to be passed into the function.
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/config/tc-i386.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 10eb0a3..83975c3 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -2375,13 +2375,15 @@ operand_type_register_match (i386_operand_type g0, && g0.bitfield.zmmword == g1.bitfield.zmmword) return 1; - if (!(t0.bitfield.byte & t1.bitfield.byte) - && !(t0.bitfield.word & t1.bitfield.word) - && !(t0.bitfield.dword & t1.bitfield.dword) - && !(t0.bitfield.qword & t1.bitfield.qword) - && !(t0.bitfield.xmmword & t1.bitfield.xmmword) - && !(t0.bitfield.ymmword & t1.bitfield.ymmword) - && !(t0.bitfield.zmmword & t1.bitfield.zmmword)) + /* If expectations overlap in no more than a single size, all is fine. */ + g0 = operand_type_and (t0, t1); + if (g0.bitfield.byte + + g0.bitfield.word + + g0.bitfield.dword + + g0.bitfield.qword + + g0.bitfield.xmmword + + g0.bitfield.ymmword + + g0.bitfield.zmmword <= 1) return 1; i.error = register_type_mismatch; |