[AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions.

ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Vector Two Register Misc, making them
available when +simd+fp16 is enabled.

The instructions added are: FCMGT, FCMGE, FCMEQ, FCMLE, FCMLT, FABS,
FNEG, FRINTN, FRINTA, FRINTP, FRINTM, FRINTX, FRINTZ, FRINTI, FCVTNS,
FCVTNU, FCVTPS, FCVTPU, FCVTMS, FCVTMU, FCVTZS, FCVTZU, FCVTAS, FCVTAU,
SCVTF, UCVTF, FRECPE, FRSQRTE and FSQRT.

The general form for these instructions is
  <OP> <Vd>.<T>, <Vs>.<T>
  where T is 4h or 8h.

gas/testsuite/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/advsimd-fp16.d: Update expected output.
	* gas/aarch64/advsimd-fp16.s: Add tests for vector two register misc.
	instructions.

opcodes/
2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-tbl.h (QL_V2SAMEH): New.
	(aarch64_opcode_table): Add fp16 versions of frintn, frintm,
	fcvtns, fcvtms, fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fabs, frintp,
	frintz, fcvtps, fcvtzs, frecpe, frinta, frintx, fcvtnu, fcvtmu,
	fcvtau, ucvtf, fcmge, fcmle, fneg, frinti, fcvtpu, fcvtzu, frsqrte
	and fsqrt to the vector register misc. group.

Change-Id: I0267511a7f7ea14247504d29fe4752e84c9af9ad

4 files changed, 208 insertions, 3 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index d6e3e48..6a377c8 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,6 +1,12 @@
 2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
 
 	* gas/aarch64/advsimd-fp16.d: Update expected output.
+	* gas/aarch64/advsimd-fp16.s: Add tests for vector two register
+	misc. instructions.
+
+2015-12-14  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* gas/aarch64/advsimd-fp16.d: Update expected output.
 	* gas/aarch64/advsimd-fp16.s: Add tests for scalar three register
 	same instructions.
 
diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.d b/gas/testsuite/gas/aarch64/advsimd-fp16.d
index 5814bec..b2a24ad 100644
--- a/gas/testsuite/gas/aarch64/advsimd-fp16.d
+++ b/gas/testsuite/gas/aarch64/advsimd-fp16.d
@@ -203,3 +203,148 @@ Disassembly of section \.text:
  [0-9a-f]+:	5ea2fc20 	frsqrts	s0, s1, s2
  [0-9a-f]+:	5ec23c20 	frsqrts	h0, h1, h2
  [0-9a-f]+:	5ec03c00 	frsqrts	h0, h0, h0
+ [0-9a-f]+:	4ee0c820 	fcmgt	v0.2d, v1.2d, #0.0
+ [0-9a-f]+:	0ea0c820 	fcmgt	v0.2s, v1.2s, #0.0
+ [0-9a-f]+:	4ea0c820 	fcmgt	v0.4s, v1.4s, #0.0
+ [0-9a-f]+:	0ef8c820 	fcmgt	v0.4h, v1.4h, #0.0
+ [0-9a-f]+:	4ef8c820 	fcmgt	v0.8h, v1.8h, #0.0
+ [0-9a-f]+:	6ee0c820 	fcmge	v0.2d, v1.2d, #0.0
+ [0-9a-f]+:	2ea0c820 	fcmge	v0.2s, v1.2s, #0.0
+ [0-9a-f]+:	6ea0c820 	fcmge	v0.4s, v1.4s, #0.0
+ [0-9a-f]+:	2ef8c820 	fcmge	v0.4h, v1.4h, #0.0
+ [0-9a-f]+:	6ef8c820 	fcmge	v0.8h, v1.8h, #0.0
+ [0-9a-f]+:	4ee0d820 	fcmeq	v0.2d, v1.2d, #0.0
+ [0-9a-f]+:	0ea0d820 	fcmeq	v0.2s, v1.2s, #0.0
+ [0-9a-f]+:	4ea0d820 	fcmeq	v0.4s, v1.4s, #0.0
+ [0-9a-f]+:	0ef8d820 	fcmeq	v0.4h, v1.4h, #0.0
+ [0-9a-f]+:	4ef8d820 	fcmeq	v0.8h, v1.8h, #0.0
+ [0-9a-f]+:	6ee0d820 	fcmle	v0.2d, v1.2d, #0.0
+ [0-9a-f]+:	2ea0d820 	fcmle	v0.2s, v1.2s, #0.0
+ [0-9a-f]+:	6ea0d820 	fcmle	v0.4s, v1.4s, #0.0
+ [0-9a-f]+:	2ef8d820 	fcmle	v0.4h, v1.4h, #0.0
+ [0-9a-f]+:	6ef8d820 	fcmle	v0.8h, v1.8h, #0.0
+ [0-9a-f]+:	4ee0e820 	fcmlt	v0.2d, v1.2d, #0.0
+ [0-9a-f]+:	0ea0e820 	fcmlt	v0.2s, v1.2s, #0.0
+ [0-9a-f]+:	4ea0e820 	fcmlt	v0.4s, v1.4s, #0.0
+ [0-9a-f]+:	0ef8e820 	fcmlt	v0.4h, v1.4h, #0.0
+ [0-9a-f]+:	4ef8e820 	fcmlt	v0.8h, v1.8h, #0.0
+ [0-9a-f]+:	4ee0f820 	fabs	v0.2d, v1.2d
+ [0-9a-f]+:	0ea0f820 	fabs	v0.2s, v1.2s
+ [0-9a-f]+:	4ea0f820 	fabs	v0.4s, v1.4s
+ [0-9a-f]+:	0ef8f820 	fabs	v0.4h, v1.4h
+ [0-9a-f]+:	4ef8f820 	fabs	v0.8h, v1.8h
+ [0-9a-f]+:	6ee0f820 	fneg	v0.2d, v1.2d
+ [0-9a-f]+:	2ea0f820 	fneg	v0.2s, v1.2s
+ [0-9a-f]+:	6ea0f820 	fneg	v0.4s, v1.4s
+ [0-9a-f]+:	2ef8f820 	fneg	v0.4h, v1.4h
+ [0-9a-f]+:	6ef8f820 	fneg	v0.8h, v1.8h
+ [0-9a-f]+:	4e618820 	frintn	v0.2d, v1.2d
+ [0-9a-f]+:	0e218820 	frintn	v0.2s, v1.2s
+ [0-9a-f]+:	4e218820 	frintn	v0.4s, v1.4s
+ [0-9a-f]+:	0e798820 	frintn	v0.4h, v1.4h
+ [0-9a-f]+:	4e798820 	frintn	v0.8h, v1.8h
+ [0-9a-f]+:	6e618820 	frinta	v0.2d, v1.2d
+ [0-9a-f]+:	2e218820 	frinta	v0.2s, v1.2s
+ [0-9a-f]+:	6e218820 	frinta	v0.4s, v1.4s
+ [0-9a-f]+:	2e798820 	frinta	v0.4h, v1.4h
+ [0-9a-f]+:	6e798820 	frinta	v0.8h, v1.8h
+ [0-9a-f]+:	4ee18820 	frintp	v0.2d, v1.2d
+ [0-9a-f]+:	0ea18820 	frintp	v0.2s, v1.2s
+ [0-9a-f]+:	4ea18820 	frintp	v0.4s, v1.4s
+ [0-9a-f]+:	0ef98820 	frintp	v0.4h, v1.4h
+ [0-9a-f]+:	4ef98820 	frintp	v0.8h, v1.8h
+ [0-9a-f]+:	4e619820 	frintm	v0.2d, v1.2d
+ [0-9a-f]+:	0e219820 	frintm	v0.2s, v1.2s
+ [0-9a-f]+:	4e219820 	frintm	v0.4s, v1.4s
+ [0-9a-f]+:	0e799820 	frintm	v0.4h, v1.4h
+ [0-9a-f]+:	4e799820 	frintm	v0.8h, v1.8h
+ [0-9a-f]+:	6e619820 	frintx	v0.2d, v1.2d
+ [0-9a-f]+:	2e219820 	frintx	v0.2s, v1.2s
+ [0-9a-f]+:	6e219820 	frintx	v0.4s, v1.4s
+ [0-9a-f]+:	2e799820 	frintx	v0.4h, v1.4h
+ [0-9a-f]+:	6e799820 	frintx	v0.8h, v1.8h
+ [0-9a-f]+:	4ee19820 	frintz	v0.2d, v1.2d
+ [0-9a-f]+:	0ea19820 	frintz	v0.2s, v1.2s
+ [0-9a-f]+:	4ea19820 	frintz	v0.4s, v1.4s
+ [0-9a-f]+:	0ef99820 	frintz	v0.4h, v1.4h
+ [0-9a-f]+:	4ef99820 	frintz	v0.8h, v1.8h
+ [0-9a-f]+:	6ee19820 	frinti	v0.2d, v1.2d
+ [0-9a-f]+:	2ea19820 	frinti	v0.2s, v1.2s
+ [0-9a-f]+:	6ea19820 	frinti	v0.4s, v1.4s
+ [0-9a-f]+:	2ef99820 	frinti	v0.4h, v1.4h
+ [0-9a-f]+:	6ef99820 	frinti	v0.8h, v1.8h
+ [0-9a-f]+:	4e61a820 	fcvtns	v0.2d, v1.2d
+ [0-9a-f]+:	0e21a820 	fcvtns	v0.2s, v1.2s
+ [0-9a-f]+:	4e21a820 	fcvtns	v0.4s, v1.4s
+ [0-9a-f]+:	0e79a820 	fcvtns	v0.4h, v1.4h
+ [0-9a-f]+:	4e79a820 	fcvtns	v0.8h, v1.8h
+ [0-9a-f]+:	6e61a820 	fcvtnu	v0.2d, v1.2d
+ [0-9a-f]+:	2e21a820 	fcvtnu	v0.2s, v1.2s
+ [0-9a-f]+:	6e21a820 	fcvtnu	v0.4s, v1.4s
+ [0-9a-f]+:	2e79a820 	fcvtnu	v0.4h, v1.4h
+ [0-9a-f]+:	6e79a820 	fcvtnu	v0.8h, v1.8h
+ [0-9a-f]+:	4ee1a820 	fcvtps	v0.2d, v1.2d
+ [0-9a-f]+:	0ea1a820 	fcvtps	v0.2s, v1.2s
+ [0-9a-f]+:	4ea1a820 	fcvtps	v0.4s, v1.4s
+ [0-9a-f]+:	0ef9a820 	fcvtps	v0.4h, v1.4h
+ [0-9a-f]+:	4ef9a820 	fcvtps	v0.8h, v1.8h
+ [0-9a-f]+:	6ee1a820 	fcvtpu	v0.2d, v1.2d
+ [0-9a-f]+:	2ea1a820 	fcvtpu	v0.2s, v1.2s
+ [0-9a-f]+:	6ea1a820 	fcvtpu	v0.4s, v1.4s
+ [0-9a-f]+:	2ef9a820 	fcvtpu	v0.4h, v1.4h
+ [0-9a-f]+:	6ef9a820 	fcvtpu	v0.8h, v1.8h
+ [0-9a-f]+:	4e61b820 	fcvtms	v0.2d, v1.2d
+ [0-9a-f]+:	0e21b820 	fcvtms	v0.2s, v1.2s
+ [0-9a-f]+:	4e21b820 	fcvtms	v0.4s, v1.4s
+ [0-9a-f]+:	0e79b820 	fcvtms	v0.4h, v1.4h
+ [0-9a-f]+:	4e79b820 	fcvtms	v0.8h, v1.8h
+ [0-9a-f]+:	6e61b820 	fcvtmu	v0.2d, v1.2d
+ [0-9a-f]+:	2e21b820 	fcvtmu	v0.2s, v1.2s
+ [0-9a-f]+:	6e21b820 	fcvtmu	v0.4s, v1.4s
+ [0-9a-f]+:	2e79b820 	fcvtmu	v0.4h, v1.4h
+ [0-9a-f]+:	6e79b820 	fcvtmu	v0.8h, v1.8h
+ [0-9a-f]+:	4ee1b820 	fcvtzs	v0.2d, v1.2d
+ [0-9a-f]+:	0ea1b820 	fcvtzs	v0.2s, v1.2s
+ [0-9a-f]+:	4ea1b820 	fcvtzs	v0.4s, v1.4s
+ [0-9a-f]+:	0ef9b820 	fcvtzs	v0.4h, v1.4h
+ [0-9a-f]+:	4ef9b820 	fcvtzs	v0.8h, v1.8h
+ [0-9a-f]+:	6ee1b820 	fcvtzu	v0.2d, v1.2d
+ [0-9a-f]+:	2ea1b820 	fcvtzu	v0.2s, v1.2s
+ [0-9a-f]+:	6ea1b820 	fcvtzu	v0.4s, v1.4s
+ [0-9a-f]+:	2ef9b820 	fcvtzu	v0.4h, v1.4h
+ [0-9a-f]+:	6ef9b820 	fcvtzu	v0.8h, v1.8h
+ [0-9a-f]+:	4e61c820 	fcvtas	v0.2d, v1.2d
+ [0-9a-f]+:	0e21c820 	fcvtas	v0.2s, v1.2s
+ [0-9a-f]+:	4e21c820 	fcvtas	v0.4s, v1.4s
+ [0-9a-f]+:	0e79c820 	fcvtas	v0.4h, v1.4h
+ [0-9a-f]+:	4e79c820 	fcvtas	v0.8h, v1.8h
+ [0-9a-f]+:	6e61c820 	fcvtau	v0.2d, v1.2d
+ [0-9a-f]+:	2e21c820 	fcvtau	v0.2s, v1.2s
+ [0-9a-f]+:	6e21c820 	fcvtau	v0.4s, v1.4s
+ [0-9a-f]+:	2e79c820 	fcvtau	v0.4h, v1.4h
+ [0-9a-f]+:	6e79c820 	fcvtau	v0.8h, v1.8h
+ [0-9a-f]+:	4e61d820 	scvtf	v0.2d, v1.2d
+ [0-9a-f]+:	0e21d820 	scvtf	v0.2s, v1.2s
+ [0-9a-f]+:	4e21d820 	scvtf	v0.4s, v1.4s
+ [0-9a-f]+:	0e79d820 	scvtf	v0.4h, v1.4h
+ [0-9a-f]+:	4e79d820 	scvtf	v0.8h, v1.8h
+ [0-9a-f]+:	6e61d820 	ucvtf	v0.2d, v1.2d
+ [0-9a-f]+:	2e21d820 	ucvtf	v0.2s, v1.2s
+ [0-9a-f]+:	6e21d820 	ucvtf	v0.4s, v1.4s
+ [0-9a-f]+:	2e79d820 	ucvtf	v0.4h, v1.4h
+ [0-9a-f]+:	6e79d820 	ucvtf	v0.8h, v1.8h
+ [0-9a-f]+:	4ee1d820 	frecpe	v0.2d, v1.2d
+ [0-9a-f]+:	0ea1d820 	frecpe	v0.2s, v1.2s
+ [0-9a-f]+:	4ea1d820 	frecpe	v0.4s, v1.4s
+ [0-9a-f]+:	0ef9d820 	frecpe	v0.4h, v1.4h
+ [0-9a-f]+:	4ef9d820 	frecpe	v0.8h, v1.8h
+ [0-9a-f]+:	6ee1d820 	frsqrte	v0.2d, v1.2d
+ [0-9a-f]+:	2ea1d820 	frsqrte	v0.2s, v1.2s
+ [0-9a-f]+:	6ea1d820 	frsqrte	v0.4s, v1.4s
+ [0-9a-f]+:	2ef9d820 	frsqrte	v0.4h, v1.4h
+ [0-9a-f]+:	6ef9d820 	frsqrte	v0.8h, v1.8h
+ [0-9a-f]+:	6ee1f820 	fsqrt	v0.2d, v1.2d
+ [0-9a-f]+:	2ea1f820 	fsqrt	v0.2s, v1.2s
+ [0-9a-f]+:	6ea1f820 	fsqrt	v0.4s, v1.4s
+ [0-9a-f]+:	2ef9f820 	fsqrt	v0.4h, v1.4h
+ [0-9a-f]+:	6ef9f820 	fsqrt	v0.8h, v1.8h
diff --git a/gas/testsuite/gas/aarch64/advsimd-fp16.s b/gas/testsuite/gas/aarch64/advsimd-fp16.s
index 99f27f2..3f3cafb 100644
--- a/gas/testsuite/gas/aarch64/advsimd-fp16.s
+++ b/gas/testsuite/gas/aarch64/advsimd-fp16.s
@@ -57,3 +57,58 @@
 	sthree_same facgt
 	sthree_same frecps
 	sthree_same frsqrts
+
+	/* Vector two-register misc.  */
+
+	.macro tworeg_zero, op
+	\op	v0.2d, v1.2d, #0.0
+	\op	v0.2s, v1.2s, #0.0
+	\op	v0.4s, v1.4s, #0.0
+	\op	v0.4h, v1.4h, #0.0
+	\op	v0.8h, v1.8h, #0.0
+	.endm
+
+	tworeg_zero fcmgt
+	tworeg_zero fcmge
+	tworeg_zero fcmeq
+	tworeg_zero fcmle
+	tworeg_zero fcmlt
+
+	.macro tworeg_misc, op
+	\op	v0.2d, v1.2d
+	\op	v0.2s, v1.2s
+	\op	v0.4s, v1.4s
+	\op	v0.4h, v1.4h
+	\op	v0.8h, v1.8h
+	.endm
+
+	tworeg_misc fabs
+	tworeg_misc fneg
+
+	tworeg_misc frintn
+	tworeg_misc frinta
+	tworeg_misc frintp
+
+	tworeg_misc frintm
+	tworeg_misc frintx
+	tworeg_misc frintz
+	tworeg_misc frinti
+
+	tworeg_misc fcvtns
+	tworeg_misc fcvtnu
+	tworeg_misc fcvtps
+	tworeg_misc fcvtpu
+
+	tworeg_misc fcvtms
+	tworeg_misc fcvtmu
+	tworeg_misc fcvtzs
+	tworeg_misc fcvtzu
+
+	tworeg_misc fcvtas
+	tworeg_misc fcvtau
+
+	tworeg_misc scvtf
+	tworeg_misc ucvtf
+	tworeg_misc frecpe
+	tworeg_misc frsqrte
+	tworeg_misc fsqrt
diff --git a/gas/testsuite/gas/aarch64/verbose-error.l b/gas/testsuite/gas/aarch64/verbose-error.l
index 3d2c99e..314a5cc 100644
--- a/gas/testsuite/gas/aarch64/verbose-error.l
+++ b/gas/testsuite/gas/aarch64/verbose-error.l
@@ -67,10 +67,9 @@
 [^:]*:22: Info:    	rev32 v4.8h,v5.8h
 [^:]*:24: Error: operand mismatch -- `frintn v6.8b,v7.8b'
 [^:]*:24: Info:    did you mean this\?
-[^:]*:24: Info:    	frintn v6.2s,v7.2s
+[^:]*:24: Info:    	frintn v6.4h,v7.4h
 [^:]*:24: Info:    other valid variant\(s\):
-[^:]*:24: Info:    	frintn v6.4s,v7.4s
-[^:]*:24: Info:    	frintn v6.2d,v7.2d
+[^:]*:24: Info:    	frintn v6.8h,v7.8h
 [^:]*:26: Error: operand mismatch -- `rev64 v8.2d,v9.2d'
 [^:]*:26: Info:    did you mean this\?
 [^:]*:26: Info:    	rev64 v8.8b,v9.8b