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| author | Jan Beulich <jbeulich@suse.com> | 2021-06-10 12:39:40 +0200 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2021-06-10 12:39:40 +0200 |
| commit | e925962f4e5767a1d1d43fd3876564912ba807e1 (patch) | |
| tree | 5e7035c4de393f7fc13cc409edce02bb32dbcbff /gas | |
| parent | 7772f16880afc636b43184f443d173ec93302242 (diff) | |
| download | gdb-e925962f4e5767a1d1d43fd3876564912ba807e1.zip gdb-e925962f4e5767a1d1d43fd3876564912ba807e1.tar.gz gdb-e925962f4e5767a1d1d43fd3876564912ba807e1.tar.bz2 | |
arm: fix array-out-of-bounds upon register parsing error
Despite the comment ahead of the enum explicitly pointing out the need
to also update the corresponding array, 1b8833198c0 ("Add support for
MVE instructions: vcmp and vpt") failed to do so. Oddly enough the issue
appears to be spotted only by rather old gcc (4.3-ish in my case).
Diffstat (limited to 'gas')
| -rw-r--r-- | gas/ChangeLog | 4 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 3 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 7133c37..ab12ba5 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,9 @@ 2021-06-10 Jan Beulich <jbeulich@suse.com> + * config/tc-arm.c (reg_expected_msgs): Add REG_TYPE_ZR entry. + +2021-06-10 Jan Beulich <jbeulich@suse.com> + * config/tc-i386.c (optimize_encoding): Suppress LEA conversion when it would grow code size in 16-bit mode. * testsuite/gas/i386/lea16-optimize.d: Adjust expectations. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 1e2ac65..895718c 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -729,7 +729,8 @@ const char * const reg_expected_msgs[] = [REG_TYPE_MMXWCG] = N_("iWMMXt scalar register expected"), [REG_TYPE_XSCALE] = N_("XScale accumulator register expected"), [REG_TYPE_MQ] = N_("MVE vector register expected"), - [REG_TYPE_RNB] = "" + [REG_TYPE_RNB] = "", + [REG_TYPE_ZR] = N_("ZR register expected"), }; /* Some well known registers that we refer to directly elsewhere. */ |