[AArch64] Add support for ARMv8.1 Virtulization Host Extensions.

The ARMv8.1 architecture includes the Virtualization Host Extensions
which add a number of system registers. This patch adds support for
these system registers, making them available when -march=armv8.1-a is
selected.

include/opcode/
2015-11-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64.h (AARCH64_FEATURE_V8_1): New.
	(AARCH64_ARCH_v8_1): Add AARCH64_FEATURE_V8_1.

opcodes/
2015-11-20  Matthew Wahab  <matthew.wahab@arm.com>

	* aarch64-opc.c (aarch64_sys_regs): Add spsr_el12, elr_el12,
	sctlr_el12, cpacr_el12, ttbr1_el2, ttbr0_el12, ttbr1_el12,
	tcr_el12, afsr0_el12, afsr1_el12, esr_el12, far_el12, mair_el12,
	amair_el12, vbar_el12, contextidr_el2, contextidr_el12,
	cntkctl_el12, cntp_tval_el02, cntp_ctl_el02, cntp_cval_el02,
	cntv_tval_el02, cntv_ctl_el02, cntv_cval_el02, cnthv_tval_el2,
	cnthv_ctl_el2, cnthv_cval_el2.
	(aarch64_sys_reg_supported_p): Update for the new system
	registers.

gas/testsuite/
2015-11-20  Matthew Wahab  <matthew.wahab@arm.com>

	* gas/aarch64/virthostext-directive.d: New.
	* gas/aarch64/virthostext.d: New.
	* gas/aarch64/virthostext.s: New.

Change-Id: Iecb370591b1b6e9e00d81c8ccd9ae3b0f71794a2

4 files changed, 205 insertions, 0 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 6492617..755f619 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-11-20  Matthew Wahab  <matthew.wahab@arm.com>
+
+	* gas/aarch64/virthostext-directive.d: New.
+	* gas/aarch64/virthostext.d: New.
+	* gas/aarch64/virthostext.s: New.
+
 2015-11-20  Matthew Wahab  <matthew.wahab@foss.arm.com>
 
 	* gas/arm/mapshort-elf.d: Fix typo in exclusion list.
diff --git a/gas/testsuite/gas/aarch64/virthostext-directive.d b/gas/testsuite/gas/aarch64/virthostext-directive.d
new file mode 100644
index 0000000..73baf9a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/virthostext-directive.d
@@ -0,0 +1,65 @@
+#objdump: -dr
+#as: --defsym DIRECTIVE=1
+#source: virthostext.s
+
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   [0-9a-f]+:	d51d4007 	msr	spsr_el12, x7
+   [0-9a-f]+:	d53d4007 	mrs	x7, spsr_el12
+   [0-9a-f]+:	d51d4027 	msr	elr_el12, x7
+   [0-9a-f]+:	d53d4027 	mrs	x7, elr_el12
+  [0-9a-f]+:	d51d1007 	msr	sctlr_el12, x7
+  [0-9a-f]+:	d53d1007 	mrs	x7, sctlr_el12
+  [0-9a-f]+:	d51d1047 	msr	cpacr_el12, x7
+  [0-9a-f]+:	d53d1047 	mrs	x7, cpacr_el12
+  [0-9a-f]+:	d51c2027 	msr	ttbr1_el2, x7
+  [0-9a-f]+:	d53c2027 	mrs	x7, ttbr1_el2
+  [0-9a-f]+:	d51d2007 	msr	ttbr0_el12, x7
+  [0-9a-f]+:	d53d2007 	mrs	x7, ttbr0_el12
+  [0-9a-f]+:	d51d2027 	msr	ttbr1_el12, x7
+  [0-9a-f]+:	d53d2027 	mrs	x7, ttbr1_el12
+  [0-9a-f]+:	d51d2047 	msr	tcr_el12, x7
+  [0-9a-f]+:	d53d2047 	mrs	x7, tcr_el12
+  [0-9a-f]+:	d51d5107 	msr	afsr0_el12, x7
+  [0-9a-f]+:	d53d5107 	mrs	x7, afsr0_el12
+  [0-9a-f]+:	d51d5127 	msr	afsr1_el12, x7
+  [0-9a-f]+:	d53d5127 	mrs	x7, afsr1_el12
+  [0-9a-f]+:	d51d5207 	msr	esr_el12, x7
+  [0-9a-f]+:	d53d5207 	mrs	x7, esr_el12
+  [0-9a-f]+:	d51d6007 	msr	far_el12, x7
+  [0-9a-f]+:	d53d6007 	mrs	x7, far_el12
+  [0-9a-f]+:	d51da207 	msr	mair_el12, x7
+  [0-9a-f]+:	d53da207 	mrs	x7, mair_el12
+  [0-9a-f]+:	d51da307 	msr	amair_el12, x7
+  [0-9a-f]+:	d53da307 	mrs	x7, amair_el12
+  [0-9a-f]+:	d51dc007 	msr	vbar_el12, x7
+  [0-9a-f]+:	d53dc007 	mrs	x7, vbar_el12
+  [0-9a-f]+:	d51cd027 	msr	contextidr_el2, x7
+  [0-9a-f]+:	d53cd027 	mrs	x7, contextidr_el2
+  [0-9a-f]+:	d51dd027 	msr	contextidr_el12, x7
+  [0-9a-f]+:	d53dd027 	mrs	x7, contextidr_el12
+  [0-9a-f]+:	d51de107 	msr	cntkctl_el12, x7
+  [0-9a-f]+:	d53de107 	mrs	x7, cntkctl_el12
+  [0-9a-f]+:	d51de207 	msr	cntp_tval_el02, x7
+  [0-9a-f]+:	d53de207 	mrs	x7, cntp_tval_el02
+  [0-9a-f]+:	d51de227 	msr	cntp_ctl_el02, x7
+  [0-9a-f]+:	d53de227 	mrs	x7, cntp_ctl_el02
+  [0-9a-f]+:	d51de247 	msr	cntp_cval_el02, x7
+  [0-9a-f]+:	d53de247 	mrs	x7, cntp_cval_el02
+  [0-9a-f]+:	d51de307 	msr	cntv_tval_el02, x7
+  [0-9a-f]+:	d53de307 	mrs	x7, cntv_tval_el02
+  [0-9a-f]+:	d51de327 	msr	cntv_ctl_el02, x7
+  [0-9a-f]+:	d53de327 	mrs	x7, cntv_ctl_el02
+  [0-9a-f]+:	d51de347 	msr	cntv_cval_el02, x7
+  [0-9a-f]+:	d53de347 	mrs	x7, cntv_cval_el02
+  [0-9a-f]+:	d51ce307 	msr	cnthv_tval_el2, x7
+  [0-9a-f]+:	d53ce307 	mrs	x7, cnthv_tval_el2
+  [0-9a-f]+:	d51ce327 	msr	cnthv_ctl_el2, x7
+  [0-9a-f]+:	d53ce327 	mrs	x7, cnthv_ctl_el2
+  [0-9a-f]+:	d51ce347 	msr	cnthv_cval_el2, x7
+  [0-9a-f]+:	d53ce347 	mrs	x7, cnthv_cval_el2
diff --git a/gas/testsuite/gas/aarch64/virthostext.d b/gas/testsuite/gas/aarch64/virthostext.d
new file mode 100644
index 0000000..a5960ee
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/virthostext.d
@@ -0,0 +1,65 @@
+#objdump: -dr
+#as: -march=armv8.1-a
+#source: virthostext.s
+
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   [0-9a-f]+:	d51d4007 	msr	spsr_el12, x7
+   [0-9a-f]+:	d53d4007 	mrs	x7, spsr_el12
+   [0-9a-f]+:	d51d4027 	msr	elr_el12, x7
+   [0-9a-f]+:	d53d4027 	mrs	x7, elr_el12
+  [0-9a-f]+:	d51d1007 	msr	sctlr_el12, x7
+  [0-9a-f]+:	d53d1007 	mrs	x7, sctlr_el12
+  [0-9a-f]+:	d51d1047 	msr	cpacr_el12, x7
+  [0-9a-f]+:	d53d1047 	mrs	x7, cpacr_el12
+  [0-9a-f]+:	d51c2027 	msr	ttbr1_el2, x7
+  [0-9a-f]+:	d53c2027 	mrs	x7, ttbr1_el2
+  [0-9a-f]+:	d51d2007 	msr	ttbr0_el12, x7
+  [0-9a-f]+:	d53d2007 	mrs	x7, ttbr0_el12
+  [0-9a-f]+:	d51d2027 	msr	ttbr1_el12, x7
+  [0-9a-f]+:	d53d2027 	mrs	x7, ttbr1_el12
+  [0-9a-f]+:	d51d2047 	msr	tcr_el12, x7
+  [0-9a-f]+:	d53d2047 	mrs	x7, tcr_el12
+  [0-9a-f]+:	d51d5107 	msr	afsr0_el12, x7
+  [0-9a-f]+:	d53d5107 	mrs	x7, afsr0_el12
+  [0-9a-f]+:	d51d5127 	msr	afsr1_el12, x7
+  [0-9a-f]+:	d53d5127 	mrs	x7, afsr1_el12
+  [0-9a-f]+:	d51d5207 	msr	esr_el12, x7
+  [0-9a-f]+:	d53d5207 	mrs	x7, esr_el12
+  [0-9a-f]+:	d51d6007 	msr	far_el12, x7
+  [0-9a-f]+:	d53d6007 	mrs	x7, far_el12
+  [0-9a-f]+:	d51da207 	msr	mair_el12, x7
+  [0-9a-f]+:	d53da207 	mrs	x7, mair_el12
+  [0-9a-f]+:	d51da307 	msr	amair_el12, x7
+  [0-9a-f]+:	d53da307 	mrs	x7, amair_el12
+  [0-9a-f]+:	d51dc007 	msr	vbar_el12, x7
+  [0-9a-f]+:	d53dc007 	mrs	x7, vbar_el12
+  [0-9a-f]+:	d51cd027 	msr	contextidr_el2, x7
+  [0-9a-f]+:	d53cd027 	mrs	x7, contextidr_el2
+  [0-9a-f]+:	d51dd027 	msr	contextidr_el12, x7
+  [0-9a-f]+:	d53dd027 	mrs	x7, contextidr_el12
+  [0-9a-f]+:	d51de107 	msr	cntkctl_el12, x7
+  [0-9a-f]+:	d53de107 	mrs	x7, cntkctl_el12
+  [0-9a-f]+:	d51de207 	msr	cntp_tval_el02, x7
+  [0-9a-f]+:	d53de207 	mrs	x7, cntp_tval_el02
+  [0-9a-f]+:	d51de227 	msr	cntp_ctl_el02, x7
+  [0-9a-f]+:	d53de227 	mrs	x7, cntp_ctl_el02
+  [0-9a-f]+:	d51de247 	msr	cntp_cval_el02, x7
+  [0-9a-f]+:	d53de247 	mrs	x7, cntp_cval_el02
+  [0-9a-f]+:	d51de307 	msr	cntv_tval_el02, x7
+  [0-9a-f]+:	d53de307 	mrs	x7, cntv_tval_el02
+  [0-9a-f]+:	d51de327 	msr	cntv_ctl_el02, x7
+  [0-9a-f]+:	d53de327 	mrs	x7, cntv_ctl_el02
+  [0-9a-f]+:	d51de347 	msr	cntv_cval_el02, x7
+  [0-9a-f]+:	d53de347 	mrs	x7, cntv_cval_el02
+  [0-9a-f]+:	d51ce307 	msr	cnthv_tval_el2, x7
+  [0-9a-f]+:	d53ce307 	mrs	x7, cnthv_tval_el2
+  [0-9a-f]+:	d51ce327 	msr	cnthv_ctl_el2, x7
+  [0-9a-f]+:	d53ce327 	mrs	x7, cnthv_ctl_el2
+  [0-9a-f]+:	d51ce347 	msr	cnthv_cval_el2, x7
+  [0-9a-f]+:	d53ce347 	mrs	x7, cnthv_cval_el2
diff --git a/gas/testsuite/gas/aarch64/virthostext.s b/gas/testsuite/gas/aarch64/virthostext.s
new file mode 100644
index 0000000..6bf2369
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/virthostext.s
@@ -0,0 +1,69 @@
+/* virthostext.s Test file for ARMv8.1 Virtualization Host Extension
+	support.
+
+   Copyright (C) 2015 Free Software Foundation, Inc.
+   Contributed by ARM Ltd.
+
+   This file is part of GAS.
+
+   GAS is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the license, or
+   (at your option) any later version.
+
+   GAS is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; see the file COPYING3.  If not,
+   see <http://www.gnu.org/licenses/>.  */
+
+	.macro rw_sys_reg sys_reg xreg
+	msr \sys_reg, \xreg
+	mrs \xreg, \sys_reg
+	.endm
+
+	.text
+	.ifdef DIRECTIVE
+	.arch armv8.1-a
+	.endif
+
+	rw_sys_reg spsr_el12 x7
+	rw_sys_reg elr_el12 x7
+
+	rw_sys_reg sctlr_el12 x7
+	rw_sys_reg cpacr_el12 x7
+
+	rw_sys_reg ttbr1_el2 x7
+	rw_sys_reg ttbr0_el12 x7
+	rw_sys_reg ttbr1_el12 x7
+
+	rw_sys_reg tcr_el12 x7
+
+	rw_sys_reg afsr0_el12 x7
+	rw_sys_reg afsr1_el12 x7
+
+	rw_sys_reg esr_el12 x7
+	rw_sys_reg far_el12 x7
+	rw_sys_reg mair_el12 x7
+	rw_sys_reg amair_el12 x7
+	rw_sys_reg vbar_el12 x7
+
+	rw_sys_reg contextidr_el2 x7
+	rw_sys_reg contextidr_el12 x7
+
+	rw_sys_reg cntkctl_el12 x7
+
+	rw_sys_reg cntp_tval_el02 x7
+	rw_sys_reg cntp_ctl_el02 x7
+	rw_sys_reg cntp_cval_el02 x7
+
+	rw_sys_reg cntv_tval_el02 x7
+	rw_sys_reg cntv_ctl_el02 x7
+	rw_sys_reg cntv_cval_el02 x7
+
+	rw_sys_reg cnthv_tval_el2 x7
+	rw_sys_reg cnthv_ctl_el2 x7
+	rw_sys_reg cnthv_cval_el2 x7