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authorAlan Modra <amodra@gmail.com>2004-03-16 00:58:43 +0000
committerAlan Modra <amodra@gmail.com>2004-03-16 00:58:43 +0000
commitfdd12ef3c60c2364704896d94d56cb269396b0f3 (patch)
treeca0ef43f11147179fa554832f7465d4c16d64b00 /gas/testsuite
parent1d39f3299631af4b58eb450f2a3d702fdda2c803 (diff)
downloadgdb-fdd12ef3c60c2364704896d94d56cb269396b0f3.zip
gdb-fdd12ef3c60c2364704896d94d56cb269396b0f3.tar.gz
gdb-fdd12ef3c60c2364704896d94d56cb269396b0f3.tar.bz2
opcodes/
* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle PPC_OPERANDS_GPR_0. * ppc-opc.c (RA0): Define. (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. (RAOPT): Rename from RAO. Update all uses. (powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. include/opcode/ * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. gas/testsuite/ Update gas/ppc/. ld/testsuite/ Update ld-powerpc/.
Diffstat (limited to 'gas/testsuite')
-rw-r--r--gas/testsuite/ChangeLog18
-rw-r--r--gas/testsuite/gas/ppc/altivec.d10
-rw-r--r--gas/testsuite/gas/ppc/altivec_xcoff.d10
-rw-r--r--gas/testsuite/gas/ppc/altivec_xcoff64.d10
-rw-r--r--gas/testsuite/gas/ppc/astest.d34
-rw-r--r--gas/testsuite/gas/ppc/astest2.d50
-rw-r--r--gas/testsuite/gas/ppc/astest2_64.d30
-rw-r--r--gas/testsuite/gas/ppc/astest64.d30
-rw-r--r--gas/testsuite/gas/ppc/booke.d226
-rw-r--r--gas/testsuite/gas/ppc/booke_xcoff.d34
-rw-r--r--gas/testsuite/gas/ppc/booke_xcoff64.d220
-rw-r--r--gas/testsuite/gas/ppc/e500.d20
-rw-r--r--gas/testsuite/gas/ppc/power4.d90
-rw-r--r--gas/testsuite/gas/ppc/test1elf32.d46
-rw-r--r--gas/testsuite/gas/ppc/test1elf64.d78
-rw-r--r--gas/testsuite/gas/ppc/test1xcoff32.d52
16 files changed, 488 insertions, 470 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 676b7ba..be93703 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,21 @@
+2004-03-16 Alan Modra <amodra@bigpond.net.au>
+
+ * gas/ppc/altivec.d: Update.
+ * gas/ppc/altivec_xcoff.d: Update.
+ * gas/ppc/altivec_xcoff64.d: Update.
+ * gas/ppc/astest.d: Update.
+ * gas/ppc/astest2.d: Update.
+ * gas/ppc/astest2_64.d: Update.
+ * gas/ppc/astest64.d: Update.
+ * gas/ppc/booke.d: Update.
+ * gas/ppc/booke_xcoff.d: Update.
+ * gas/ppc/booke_xcoff64.d: Update.
+ * gas/ppc/e500.d: Update.
+ * gas/ppc/power4.d: Update.
+ * gas/ppc/test1elf32.d: Update.
+ * gas/ppc/test1elf64.d: Update.
+ * gas/ppc/test1xcoff32.d: Update.
+
2004-03-15 Alan Modra <amodra@bigpond.net.au>
* gas/i386/padlock.s: Pad with .p2align.
diff --git a/gas/testsuite/gas/ppc/altivec.d b/gas/testsuite/gas/ppc/altivec.d
index 72533cb..ca234b1 100644
--- a/gas/testsuite/gas/ppc/altivec.d
+++ b/gas/testsuite/gas/ppc/altivec.d
@@ -7,9 +7,9 @@
Disassembly of section \.text:
00000000 <start>:
- 0: 7c 60 06 6c dss 3
+ 0: 7c 60 06 6c dss 3
4: 7e 00 06 6c dssall
- 8: 7c 25 22 ac dst r5,r4,1
- c: 7e 08 3a ac dstt r8,r7,0
- 10: 7c 65 32 ec dstst r5,r6,3
- 14: 7e 44 2a ec dststt r4,r5,2
+ 8: 7c 25 22 ac dst r5,r4,1
+ c: 7e 08 3a ac dstt r8,r7,0
+ 10: 7c 65 32 ec dstst r5,r6,3
+ 14: 7e 44 2a ec dststt r4,r5,2
diff --git a/gas/testsuite/gas/ppc/altivec_xcoff.d b/gas/testsuite/gas/ppc/altivec_xcoff.d
index 8062655..e8f0a33 100644
--- a/gas/testsuite/gas/ppc/altivec_xcoff.d
+++ b/gas/testsuite/gas/ppc/altivec_xcoff.d
@@ -7,9 +7,9 @@
Disassembly of section .text:
0000000000000000 <.text>:
- 0: 7c 60 06 6c dss 3
+ 0: 7c 60 06 6c dss 3
4: 7e 00 06 6c dssall
- 8: 7c 25 22 ac dst r5,r4,1
- c: 7e 08 3a ac dstt r8,r7,0
- 10: 7c 65 32 ec dstst r5,r6,3
- 14: 7e 44 2a ec dststt r4,r5,2
+ 8: 7c 25 22 ac dst r5,r4,1
+ c: 7e 08 3a ac dstt r8,r7,0
+ 10: 7c 65 32 ec dstst r5,r6,3
+ 14: 7e 44 2a ec dststt r4,r5,2
diff --git a/gas/testsuite/gas/ppc/altivec_xcoff64.d b/gas/testsuite/gas/ppc/altivec_xcoff64.d
index 241cd86..af7fea4 100644
--- a/gas/testsuite/gas/ppc/altivec_xcoff64.d
+++ b/gas/testsuite/gas/ppc/altivec_xcoff64.d
@@ -7,9 +7,9 @@
Disassembly of section .text:
0000000000000000 <.text>:
- 0: 7c 60 06 6c dss 3
+ 0: 7c 60 06 6c dss 3
4: 7e 00 06 6c dssall
- 8: 7c 25 22 ac dst r5,r4,1
- c: 7e 08 3a ac dstt r8,r7,0
- 10: 7c 65 32 ec dstst r5,r6,3
- 14: 7e 44 2a ec dststt r4,r5,2
+ 8: 7c 25 22 ac dst r5,r4,1
+ c: 7e 08 3a ac dstt r8,r7,0
+ 10: 7c 65 32 ec dstst r5,r6,3
+ 14: 7e 44 2a ec dststt r4,r5,2
diff --git a/gas/testsuite/gas/ppc/astest.d b/gas/testsuite/gas/ppc/astest.d
index 68aab55..758f9ce 100644
--- a/gas/testsuite/gas/ppc/astest.d
+++ b/gas/testsuite/gas/ppc/astest.d
@@ -11,28 +11,28 @@ Disassembly of section \.text:
8: 60 00 00 00 nop
0+000000c <a>:
- c: 48 00 00 04 b 10 <apfour>
+ c: 48 00 00 04 b 10 <apfour>
0+0000010 <apfour>:
- 10: 48 00 00 08 b 18 <apfour\+0x8>
- 14: 48 00 00 00 b 14 <apfour\+0x4>
+ 10: 48 00 00 08 b 18 <apfour\+0x8>
+ 14: 48 00 00 00 b 14 <apfour\+0x4>
14: R_PPC_REL24 x
- 18: 48 00 00 04 b 1c <apfour\+0xc>
+ 18: 48 00 00 04 b 1c <apfour\+0xc>
18: R_PPC_REL24 \.data\+0x4
- 1c: 48 00 00 00 b 1c <apfour\+0xc>
+ 1c: 48 00 00 00 b 1c <apfour\+0xc>
1c: R_PPC_REL24 z
- 20: 48 00 00 14 b 34 <apfour\+0x24>
+ 20: 48 00 00 14 b 34 <apfour\+0x24>
20: R_PPC_REL24 z\+0x14
- 24: 48 00 00 04 b 28 <apfour\+0x18>
- 28: 48 00 00 00 b 28 <apfour\+0x18>
+ 24: 48 00 00 04 b 28 <apfour\+0x18>
+ 28: 48 00 00 00 b 28 <apfour\+0x18>
28: R_PPC_REL24 a
- 2c: 4b ff ff e4 b 10 <apfour>
- 30: 48 00 00 04 b 34 <apfour\+0x24>
+ 2c: 4b ff ff e4 b 10 <apfour>
+ 30: 48 00 00 04 b 34 <apfour\+0x24>
30: R_PPC_REL24 a\+0x4
- 34: 4b ff ff e0 b 14 <apfour\+0x4>
- 38: 48 00 00 00 b 38 <apfour\+0x28>
+ 34: 4b ff ff e0 b 14 <apfour\+0x4>
+ 38: 48 00 00 00 b 38 <apfour\+0x28>
38: R_PPC_LOCAL24PC a
- 3c: 4b ff ff d4 b 10 <apfour>
+ 3c: 4b ff ff d4 b 10 <apfour>
40: 00 00 00 40 \.long 0x40
40: R_PPC_ADDR32 \.text\+0x40
@@ -49,11 +49,11 @@ Disassembly of section \.text:
58: R_PPC_ADDR32 x
5c: R_PPC_ADDR32 y
60: R_PPC_ADDR32 z
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
+ 64: ff ff ff fc fnmsub f31,f31,f31,f31
64: R_PPC_ADDR32 x\+0xf+ffffffc
- 68: ff ff ff fc fnmsub f31,f31,f31,f31
+ 68: ff ff ff fc fnmsub f31,f31,f31,f31
68: R_PPC_ADDR32 y\+0xf+ffffffc
- 6c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 6c: ff ff ff fc fnmsub f31,f31,f31,f31
6c: R_PPC_ADDR32 z\+0xf+ffffffc
70: ff ff ff 9c \.long 0xffffff9c
74: ff ff ff 9c \.long 0xffffff9c
@@ -61,7 +61,7 @@ Disassembly of section \.text:
78: R_PPC_ADDR32 a
7c: R_PPC_ADDR32 b
80: R_PPC_ADDR32 apfour
- 84: ff ff ff fc fnmsub f31,f31,f31,f31
+ 84: ff ff ff fc fnmsub f31,f31,f31,f31
88: 00 00 00 02 \.long 0x2
88: R_PPC_ADDR32 apfour\+0x2
8c: 00 00 00 00 \.long 0x0
diff --git a/gas/testsuite/gas/ppc/astest2.d b/gas/testsuite/gas/ppc/astest2.d
index f46a1e1..273ca57 100644
--- a/gas/testsuite/gas/ppc/astest2.d
+++ b/gas/testsuite/gas/ppc/astest2.d
@@ -9,26 +9,26 @@ Disassembly of section \.text:
0: 60 00 00 00 nop
4: 60 00 00 00 nop
8: 60 00 00 00 nop
- c: 48 00 00 04 b 10 <foo\+0x10>
- 10: 48 00 00 08 b 18 <foo\+0x18>
- 14: 48 00 00 00 b 14 <foo\+0x14>
+ c: 48 00 00 04 b 10 <foo\+0x10>
+ 10: 48 00 00 08 b 18 <foo\+0x18>
+ 14: 48 00 00 00 b 14 <foo\+0x14>
14: R_PPC_REL24 x
- 18: 48 00 00 04 b 1c <foo\+0x1c>
+ 18: 48 00 00 04 b 1c <foo\+0x1c>
18: R_PPC_REL24 \.data\+0x4
- 1c: 48 00 00 00 b 1c <foo\+0x1c>
+ 1c: 48 00 00 00 b 1c <foo\+0x1c>
1c: R_PPC_REL24 z
- 20: 48 00 00 14 b 34 <foo\+0x34>
+ 20: 48 00 00 14 b 34 <foo\+0x34>
20: R_PPC_REL24 z\+0x14
- 24: 48 00 00 04 b 28 <foo\+0x28>
- 28: 48 00 00 00 b 28 <foo\+0x28>
+ 24: 48 00 00 04 b 28 <foo\+0x28>
+ 28: 48 00 00 00 b 28 <foo\+0x28>
28: R_PPC_REL24 a
- 2c: 48 00 00 50 b 7c <apfour>
- 30: 48 00 00 04 b 34 <foo\+0x34>
+ 2c: 48 00 00 50 b 7c <apfour>
+ 30: 48 00 00 04 b 34 <foo\+0x34>
30: R_PPC_REL24 a\+0x4
- 34: 48 00 00 4c b 80 <apfour\+0x4>
- 38: 48 00 00 00 b 38 <foo\+0x38>
+ 34: 48 00 00 4c b 80 <apfour\+0x4>
+ 38: 48 00 00 00 b 38 <foo\+0x38>
38: R_PPC_LOCAL24PC a
- 3c: 48 00 00 40 b 7c <apfour>
+ 3c: 48 00 00 40 b 7c <apfour>
40: 00 00 00 40 \.long 0x40
40: R_PPC_ADDR32 \.text\+0x40
@@ -45,11 +45,11 @@ Disassembly of section \.text:
58: R_PPC_ADDR32 x
5c: R_PPC_ADDR32 y
60: R_PPC_ADDR32 z
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
+ 64: ff ff ff fc fnmsub f31,f31,f31,f31
64: R_PPC_ADDR32 x\+0xf+ffffffc
- 68: ff ff ff fc fnmsub f31,f31,f31,f31
+ 68: ff ff ff fc fnmsub f31,f31,f31,f31
68: R_PPC_ADDR32 y\+0xf+ffffffc
- 6c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 6c: ff ff ff fc fnmsub f31,f31,f31,f31
6c: R_PPC_ADDR32 z\+0xf+ffffffc
70: 00 00 00 08 \.long 0x8
74: 00 00 00 08 \.long 0x8
@@ -62,19 +62,19 @@ Disassembly of section \.text:
\.\.\.
7c: R_PPC_ADDR32 b
80: R_PPC_ADDR32 apfour
- 84: ff ff ff fc fnmsub f31,f31,f31,f31
+ 84: ff ff ff fc fnmsub f31,f31,f31,f31
88: 00 00 00 02 \.long 0x2
88: R_PPC_ADDR32 apfour\+0x2
8c: 00 00 00 00 \.long 0x0
90: 60 00 00 00 nop
- 94: 40 a5 ff fc ble- cr1,90 <apfour\+0x14>
- 98: 41 a9 ff f8 bgt- cr2,90 <apfour\+0x14>
- 9c: 40 8d ff f4 ble\+ cr3,90 <apfour\+0x14>
- a0: 41 91 ff f0 bgt\+ cr4,90 <apfour\+0x14>
- a4: 40 95 00 10 ble- cr5,b4 <nop>
- a8: 41 99 00 0c bgt- cr6,b4 <nop>
- ac: 40 bd 00 08 ble\+ cr7,b4 <nop>
- b0: 41 a1 00 04 bgt\+ b4 <nop>
+ 94: 40 a5 ff fc ble- cr1,90 <apfour\+0x14>
+ 98: 41 a9 ff f8 bgt- cr2,90 <apfour\+0x14>
+ 9c: 40 8d ff f4 ble\+ cr3,90 <apfour\+0x14>
+ a0: 41 91 ff f0 bgt\+ cr4,90 <apfour\+0x14>
+ a4: 40 95 00 10 ble- cr5,b4 <nop>
+ a8: 41 99 00 0c bgt- cr6,b4 <nop>
+ ac: 40 bd 00 08 ble\+ cr7,b4 <nop>
+ b0: 41 a1 00 04 bgt\+ b4 <nop>
Disassembly of section \.data:
0+0000000 <x>:
diff --git a/gas/testsuite/gas/ppc/astest2_64.d b/gas/testsuite/gas/ppc/astest2_64.d
index 3a3d7db..bc3cddf 100644
--- a/gas/testsuite/gas/ppc/astest2_64.d
+++ b/gas/testsuite/gas/ppc/astest2_64.d
@@ -9,23 +9,23 @@ Disassembly of section \.text:
0: 60 00 00 00 nop
4: 60 00 00 00 nop
8: 60 00 00 00 nop
- c: 48 00 00 04 b 10 <foo\+0x10>
- 10: 48 00 00 08 b 18 <foo\+0x18>
- 14: 48 00 00 00 b 14 <foo\+0x14>
+ c: 48 00 00 04 b 10 <foo\+0x10>
+ 10: 48 00 00 08 b 18 <foo\+0x18>
+ 14: 48 00 00 00 b 14 <foo\+0x14>
14: R_PPC64_REL24 x
- 18: 48 00 00 04 b 1c <foo\+0x1c>
+ 18: 48 00 00 04 b 1c <foo\+0x1c>
18: R_PPC64_REL24 \.data\+0x4
- 1c: 48 00 00 00 b 1c <foo\+0x1c>
+ 1c: 48 00 00 00 b 1c <foo\+0x1c>
1c: R_PPC64_REL24 z
- 20: 48 00 00 14 b 34 <foo\+0x34>
+ 20: 48 00 00 14 b 34 <foo\+0x34>
20: R_PPC64_REL24 z\+0x14
- 24: 48 00 00 04 b 28 <foo\+0x28>
- 28: 48 00 00 00 b 28 <foo\+0x28>
+ 24: 48 00 00 04 b 28 <foo\+0x28>
+ 28: 48 00 00 00 b 28 <foo\+0x28>
28: R_PPC64_REL24 a
- 2c: 48 00 00 48 b 74 <apfour>
- 30: 48 00 00 04 b 34 <foo\+0x34>
+ 2c: 48 00 00 48 b 74 <apfour>
+ 30: 48 00 00 04 b 34 <foo\+0x34>
30: R_PPC64_REL24 a\+0x4
- 34: 48 00 00 44 b 78 <apfour\+0x4>
+ 34: 48 00 00 44 b 78 <apfour\+0x4>
38: 00 00 00 38 \.long 0x38
38: R_PPC64_ADDR32 \.text\+0x38
3c: 00 00 00 44 \.long 0x44
@@ -40,11 +40,11 @@ Disassembly of section \.text:
50: R_PPC64_ADDR32 x
54: R_PPC64_ADDR32 y
58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 5c: ff ff ff fc fnmsub f31,f31,f31,f31
5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
- 60: ff ff ff fc fnmsub f31,f31,f31,f31
+ 60: ff ff ff fc fnmsub f31,f31,f31,f31
60: R_PPC64_ADDR32 y\+0xfffffffffffffffc
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
+ 64: ff ff ff fc fnmsub f31,f31,f31,f31
64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
68: 00 00 00 08 \.long 0x8
6c: 00 00 00 08 \.long 0x8
@@ -57,7 +57,7 @@ Disassembly of section \.text:
\.\.\.
74: R_PPC64_ADDR32 b
78: R_PPC64_ADDR32 apfour
- 7c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 7c: ff ff ff fc fnmsub f31,f31,f31,f31
80: 00 00 00 02 \.long 0x2
80: R_PPC64_ADDR32 apfour\+0x2
84: 00 00 00 00 \.long 0x0
diff --git a/gas/testsuite/gas/ppc/astest64.d b/gas/testsuite/gas/ppc/astest64.d
index a87415a..d66e72c 100644
--- a/gas/testsuite/gas/ppc/astest64.d
+++ b/gas/testsuite/gas/ppc/astest64.d
@@ -11,25 +11,25 @@ Disassembly of section \.text:
8: 60 00 00 00 nop
000000000000000c <a>:
- c: 48 00 00 04 b 10 <apfour>
+ c: 48 00 00 04 b 10 <apfour>
0000000000000010 <apfour>:
- 10: 48 00 00 08 b 18 <apfour\+0x8>
- 14: 48 00 00 00 b 14 <apfour\+0x4>
+ 10: 48 00 00 08 b 18 <apfour\+0x8>
+ 14: 48 00 00 00 b 14 <apfour\+0x4>
14: R_PPC64_REL24 x
- 18: 48 00 00 04 b 1c <apfour\+0xc>
+ 18: 48 00 00 04 b 1c <apfour\+0xc>
18: R_PPC64_REL24 \.data\+0x4
- 1c: 48 00 00 00 b 1c <apfour\+0xc>
+ 1c: 48 00 00 00 b 1c <apfour\+0xc>
1c: R_PPC64_REL24 z
- 20: 48 00 00 14 b 34 <apfour\+0x24>
+ 20: 48 00 00 14 b 34 <apfour\+0x24>
20: R_PPC64_REL24 z\+0x14
- 24: 48 00 00 04 b 28 <apfour\+0x18>
- 28: 48 00 00 00 b 28 <apfour\+0x18>
+ 24: 48 00 00 04 b 28 <apfour\+0x18>
+ 28: 48 00 00 00 b 28 <apfour\+0x18>
28: R_PPC64_REL24 a
- 2c: 4b ff ff e4 b 10 <apfour>
- 30: 48 00 00 04 b 34 <apfour\+0x24>
+ 2c: 4b ff ff e4 b 10 <apfour>
+ 30: 48 00 00 04 b 34 <apfour\+0x24>
30: R_PPC64_REL24 a\+0x4
- 34: 4b ff ff e0 b 14 <apfour\+0x4>
+ 34: 4b ff ff e0 b 14 <apfour\+0x4>
38: 00 00 00 38 \.long 0x38
38: R_PPC64_ADDR32 \.text\+0x38
3c: 00 00 00 44 \.long 0x44
@@ -44,11 +44,11 @@ Disassembly of section \.text:
50: R_PPC64_ADDR32 x
54: R_PPC64_ADDR32 y
58: R_PPC64_ADDR32 z
- 5c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 5c: ff ff ff fc fnmsub f31,f31,f31,f31
5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
- 60: ff ff ff fc fnmsub f31,f31,f31,f31
+ 60: ff ff ff fc fnmsub f31,f31,f31,f31
60: R_PPC64_ADDR32 y\+0xfffffffffffffffc
- 64: ff ff ff fc fnmsub f31,f31,f31,f31
+ 64: ff ff ff fc fnmsub f31,f31,f31,f31
64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
68: ff ff ff a4 \.long 0xffffffa4
6c: ff ff ff a4 \.long 0xffffffa4
@@ -56,7 +56,7 @@ Disassembly of section \.text:
70: R_PPC64_ADDR32 a
74: R_PPC64_ADDR32 b
78: R_PPC64_ADDR32 apfour
- 7c: ff ff ff fc fnmsub f31,f31,f31,f31
+ 7c: ff ff ff fc fnmsub f31,f31,f31,f31
80: 00 00 00 02 \.long 0x2
80: R_PPC64_ADDR32 apfour\+0x2
84: 00 00 00 00 \.long 0x0
diff --git a/gas/testsuite/gas/ppc/booke.d b/gas/testsuite/gas/ppc/booke.d
index 595424c..a8d5c57 100644
--- a/gas/testsuite/gas/ppc/booke.d
+++ b/gas/testsuite/gas/ppc/booke.d
@@ -7,138 +7,138 @@
Disassembly of section \.text:
0+0000000 <start>:
- 0: 24 25 00 30 bce 1,4\*cr1\+gt,30 <branch_target_1>
- 4: 24 46 00 3d bcel 2,4\*cr1\+eq,40 <branch_target_2>
- 8: 24 67 00 02 bcea 3,4\*cr1\+so,0 <start>
+ 0: 24 25 00 30 bce 1,4\*cr1\+gt,30 <branch_target_1>
+ 4: 24 46 00 3d bcel 2,4\*cr1\+eq,40 <branch_target_2>
+ 8: 24 67 00 02 bcea 3,4\*cr1\+so,0 <start>
8: R_PPC(64)?_ADDR14 branch_target_3
- c: 24 88 00 03 bcela 4,4\*cr2\+lt,0 <start>
+ c: 24 88 00 03 bcela 4,4\*cr2\+lt,0 <start>
c: R_PPC(64)?_ADDR14 branch_target_4
- 10: 4c a9 00 22 bclre 5,4\*cr2\+gt
- 14: 4c aa 00 23 bclrel 5,4\*cr2\+eq
- 18: 4d 0b 04 22 bcctre 8,4\*cr2\+so
- 1c: 4d 0c 04 23 bcctrel 8,4\*cr3\+lt
- 20: 58 00 00 74 be 94 <branch_target_5>
- 24: 58 00 00 89 bel ac <branch_target_6>
- 28: 58 00 00 02 bea 0 <start>
+ 10: 4c a9 00 22 bclre 5,4\*cr2\+gt
+ 14: 4c aa 00 23 bclrel 5,4\*cr2\+eq
+ 18: 4d 0b 04 22 bcctre 8,4\*cr2\+so
+ 1c: 4d 0c 04 23 bcctrel 8,4\*cr3\+lt
+ 20: 58 00 00 74 be 94 <branch_target_5>
+ 24: 58 00 00 89 bel ac <branch_target_6>
+ 28: 58 00 00 02 bea 0 <start>
28: R_PPC(64)?_ADDR24 branch_target_7
- 2c: 58 00 00 03 bela 0 <start>
+ 2c: 58 00 00 03 bela 0 <start>
2c: R_PPC(64)?_ADDR24 branch_target_8
0+0000030 <branch_target_1>:
- 30: e9 09 00 80 lbze r8,8\(r9\)
- 34: e9 8f 00 41 lbzue r12,4\(r15\)
- 38: 7c 86 40 fe lbzuxe r4,r6,r8
- 3c: 7c 65 38 be lbzxe r3,r5,r7
+ 30: e9 09 00 80 lbze r8,8\(r9\)
+ 34: e9 8f 00 41 lbzue r12,4\(r15\)
+ 38: 7c 86 40 fe lbzuxe r4,r6,r8
+ 3c: 7c 65 38 be lbzxe r3,r5,r7
0+0000040 <branch_target_2>:
- 40: f8 a6 06 40 lde r5,400\(r6\)
- 44: f8 c7 07 11 ldue r6,452\(r7\)
- 48: 7c e8 4e 3e ldxe r7,r8,r9
- 4c: 7d 4b 66 7e lduxe r10,r11,r12
+ 40: f8 a6 06 40 lde r5,400\(r6\)
+ 44: f8 c7 07 11 ldue r6,452\(r7\)
+ 48: 7c e8 4e 3e ldxe r7,r8,r9
+ 4c: 7d 4b 66 7e lduxe r10,r11,r12
0+0000050 <branch_target_3>:
- 50: f9 81 02 06 lfde f12,128\(r1\)
- 54: f8 25 00 47 lfdue f1,16\(r5\)
- 58: 7c a1 1c be lfdxe f5,r1,r3
- 5c: 7c c2 24 fe lfduxe f6,r2,r4
- 60: f9 09 00 c4 lfse f8,48\(r9\)
- 64: f9 2a 01 15 lfsue f9,68\(r10\)
- 68: 7d 44 44 7e lfsuxe f10,r4,r8
- 6c: 7d 23 3c 3e lfsxe f9,r3,r7
+ 50: f9 81 02 06 lfde f12,128\(r1\)
+ 54: f8 25 00 47 lfdue f1,16\(r5\)
+ 58: 7c a1 1c be lfdxe f5,r1,r3
+ 5c: 7c c2 24 fe lfduxe f6,r2,r4
+ 60: f9 09 00 c4 lfse f8,48\(r9\)
+ 64: f9 2a 01 15 lfsue f9,68\(r10\)
+ 68: 7d 44 44 7e lfsuxe f10,r4,r8
+ 6c: 7d 23 3c 3e lfsxe f9,r3,r7
0+0000070 <branch_target_4>:
- 70: e9 45 03 24 lhae r10,50\(r5\)
- 74: e8 23 00 55 lhaue r1,5\(r3\)
- 78: 7c a1 1a fe lhauxe r5,r1,r3
- 7c: 7f be fa be lhaxe r29,r30,r31
- 80: 7c 22 1e 3c lhbrxe r1,r2,r3
- 84: e8 83 01 22 lhze r4,18\(r3\)
- 88: e8 c9 01 43 lhzue r6,20\(r9\)
- 8c: 7c a7 4a 7e lhzuxe r5,r7,r9
- 90: 7d 27 2a 3e lhzxe r9,r7,r5
+ 70: e9 45 03 24 lhae r10,50\(r5\)
+ 74: e8 23 00 55 lhaue r1,5\(r3\)
+ 78: 7c a1 1a fe lhauxe r5,r1,r3
+ 7c: 7f be fa be lhaxe r29,r30,r31
+ 80: 7c 22 1e 3c lhbrxe r1,r2,r3
+ 84: e8 83 01 22 lhze r4,18\(r3\)
+ 88: e8 c9 01 43 lhzue r6,20\(r9\)
+ 8c: 7c a7 4a 7e lhzuxe r5,r7,r9
+ 90: 7d 27 2a 3e lhzxe r9,r7,r5
0+0000094 <branch_target_5>:
- 94: 7d 4f a0 fc lwarxe r10,r15,r20
- 98: 7c aa 94 3c lwbrxe r5,r10,r18
- 9c: eb 9d 00 46 lwze r28,4\(r29\)
- a0: e9 0a 02 87 lwzue r8,40\(r10\)
- a4: 7c 66 48 7e lwzuxe r3,r6,r9
- a8: 7f dd e0 3e lwzxe r30,r29,r28
+ 94: 7d 4f a0 fc lwarxe r10,r15,r20
+ 98: 7c aa 94 3c lwbrxe r5,r10,r18
+ 9c: eb 9d 00 46 lwze r28,4\(r29\)
+ a0: e9 0a 02 87 lwzue r8,40\(r10\)
+ a4: 7c 66 48 7e lwzuxe r3,r6,r9
+ a8: 7f dd e0 3e lwzxe r30,r29,r28
0+00000ac <branch_target_6>:
- ac: 7c 06 3d fc dcbae r6,r7
- b0: 7c 08 48 bc dcbfe r8,r9
- b4: 7c 0a 5b bc dcbie r10,r11
- b8: 7c 08 f0 7c dcbste r8,r30
- bc: 7c c3 0a 3c dcbte 6,r3,r1
- c0: 7c a4 11 fa dcbtste 5,r4,r2
- c4: 7c 0f 77 fc dcbze r15,r14
- c8: 7c 03 27 bc icbie r3,r4
- cc: 7c a8 48 2c icbt 5,r8,r9
- d0: 7c ca 78 3c icbte 6,r10,r15
- d4: 7c a6 02 26 mfapidi r5,r6
- d8: 7c 07 46 24 tlbivax r7,r8
- dc: 7c 09 56 26 tlbivaxe r9,r10
- e0: 7c 0b 67 24 tlbsx r11,r12
- e4: 7c 0d 77 26 tlbsxe r13,r14
- e8: 7c 00 07 a4 tlbwe
- ec: 7c 00 07 a4 tlbwe
- f0: 7c 21 0f a4 tlbwe r1,r1,1
+ ac: 7c 06 3d fc dcbae r6,r7
+ b0: 7c 08 48 bc dcbfe r8,r9
+ b4: 7c 0a 5b bc dcbie r10,r11
+ b8: 7c 08 f0 7c dcbste r8,r30
+ bc: 7c c3 0a 3c dcbte 6,r3,r1
+ c0: 7c a4 11 fa dcbtste 5,r4,r2
+ c4: 7c 0f 77 fc dcbze r15,r14
+ c8: 7c 03 27 bc icbie r3,r4
+ cc: 7c a8 48 2c icbt 5,r8,r9
+ d0: 7c ca 78 3c icbte 6,r10,r15
+ d4: 7c a6 02 26 mfapidi r5,r6
+ d8: 7c 07 46 24 tlbivax r7,r8
+ dc: 7c 09 56 26 tlbivaxe r9,r10
+ e0: 7c 0b 67 24 tlbsx r11,r12
+ e4: 7c 0d 77 26 tlbsxe r13,r14
+ e8: 7c 00 07 a4 tlbwe
+ ec: 7c 00 07 a4 tlbwe
+ f0: 7c 21 0f a4 tlbwe r1,r1,1
0+00000f4 <branch_target_7>:
- f4: 7c 22 1b 14 adde64 r1,r2,r3
- f8: 7c 85 37 14 adde64o r4,r5,r6
- fc: 7c e8 03 d4 addme64 r7,r8
- 100: 7d 2a 07 d4 addme64o r9,r10
- 104: 7d 6c 03 94 addze64 r11,r12
- 108: 7d ae 07 94 addze64o r13,r14
- 10c: 7e 80 04 40 mcrxr64 cr5
- 110: 7d f0 8b 10 subfe64 r15,r16,r17
- 114: 7e 53 a7 10 subfe64o r18,r19,r20
- 118: 7e b6 03 d0 subfme64 r21,r22
- 11c: 7e f8 07 d0 subfme64o r23,r24
- 120: 7f 3a 03 90 subfze64 r25,r26
- 124: 7f 7c 07 90 subfze64o r27,r28
+ f4: 7c 22 1b 14 adde64 r1,r2,r3
+ f8: 7c 85 37 14 adde64o r4,r5,r6
+ fc: 7c e8 03 d4 addme64 r7,r8
+ 100: 7d 2a 07 d4 addme64o r9,r10
+ 104: 7d 6c 03 94 addze64 r11,r12
+ 108: 7d ae 07 94 addze64o r13,r14
+ 10c: 7e 80 04 40 mcrxr64 cr5
+ 110: 7d f0 8b 10 subfe64 r15,r16,r17
+ 114: 7e 53 a7 10 subfe64o r18,r19,r20
+ 118: 7e b6 03 d0 subfme64 r21,r22
+ 11c: 7e f8 07 d0 subfme64o r23,r24
+ 120: 7f 3a 03 90 subfze64 r25,r26
+ 124: 7f 7c 07 90 subfze64o r27,r28
0+0000128 <branch_target_8>:
- 128: e8 22 03 28 stbe r1,50\(r2\)
- 12c: e8 64 02 89 stbue r3,40\(r4\)
- 130: 7c a6 39 fe stbuxe r5,r6,r7
- 134: 7d 09 51 be stbxe r8,r9,r10
- 138: 7d 6c 6b ff stdcxe\. r11,r12,r13
- 13c: f9 cf 00 78 stde r14,28\(r15\)
- 140: fa 11 00 59 stdue r16,20\(r17\)
- 144: 7e 53 a7 3e stdxe r18,r19,r20
- 148: 7e b6 bf 7e stduxe r21,r22,r23
- 14c: f8 38 00 3e stfde f1,12\(r24\)
- 150: f8 59 00 0f stfdue f2,0\(r25\)
- 154: 7c 7a dd be stfdxe f3,r26,r27
- 158: 7c 9c ed fe stfduxe f4,r28,r29
- 15c: 7c be ff be stfiwxe f5,r30,r31
- 160: f8 de 00 6c stfse f6,24\(r30\)
- 164: f8 fd 00 5d stfsue f7,20\(r29\)
- 168: 7d 1c dd 3e stfsxe f8,r28,r27
- 16c: 7d 3a cd 7e stfsuxe f9,r26,r25
- 170: 7f 17 b7 3c sthbrxe r24,r23,r22
- 174: ea b4 01 ea sthe r21,30\(r20\)
- 178: ea 72 02 8b sthue r19,40\(r18\)
- 17c: 7e 30 7b 7e sthuxe r17,r16,r15
- 180: 7d cd 63 3e sthxe r14,r13,r12
- 184: 7d 6a 4d 3c stwbrxe r11,r10,r9
- 188: 7d 07 31 3d stwcxe\. r8,r7,r6
- 18c: e8 a4 03 2e stwe r5,50\(r4\)
- 190: e8 62 02 8f stwue r3,40\(r2\)
- 194: 7c 22 19 7e stwuxe r1,r2,r3
- 198: 7c 85 31 3e stwxe r4,r5,r6
+ 128: e8 22 03 28 stbe r1,50\(r2\)
+ 12c: e8 64 02 89 stbue r3,40\(r4\)
+ 130: 7c a6 39 fe stbuxe r5,r6,r7
+ 134: 7d 09 51 be stbxe r8,r9,r10
+ 138: 7d 6c 6b ff stdcxe\. r11,r12,r13
+ 13c: f9 cf 00 78 stde r14,28\(r15\)
+ 140: fa 11 00 59 stdue r16,20\(r17\)
+ 144: 7e 53 a7 3e stdxe r18,r19,r20
+ 148: 7e b6 bf 7e stduxe r21,r22,r23
+ 14c: f8 38 00 3e stfde f1,12\(r24\)
+ 150: f8 59 00 0f stfdue f2,0\(r25\)
+ 154: 7c 7a dd be stfdxe f3,r26,r27
+ 158: 7c 9c ed fe stfduxe f4,r28,r29
+ 15c: 7c be ff be stfiwxe f5,r30,r31
+ 160: f8 de 00 6c stfse f6,24\(r30\)
+ 164: f8 fd 00 5d stfsue f7,20\(r29\)
+ 168: 7d 1c dd 3e stfsxe f8,r28,r27
+ 16c: 7d 3a cd 7e stfsuxe f9,r26,r25
+ 170: 7f 17 b7 3c sthbrxe r24,r23,r22
+ 174: ea b4 01 ea sthe r21,30\(r20\)
+ 178: ea 72 02 8b sthue r19,40\(r18\)
+ 17c: 7e 30 7b 7e sthuxe r17,r16,r15
+ 180: 7d cd 63 3e sthxe r14,r13,r12
+ 184: 7d 6a 4d 3c stwbrxe r11,r10,r9
+ 188: 7d 07 31 3d stwcxe\. r8,r7,r6
+ 18c: e8 a4 03 2e stwe r5,50\(r4\)
+ 190: e8 62 02 8f stwue r3,40\(r2\)
+ 194: 7c 22 19 7e stwuxe r1,r2,r3
+ 198: 7c 85 31 3e stwxe r4,r5,r6
19c: 4c 00 00 66 rfci
- 1a0: 7c 60 01 06 wrtee r3
- 1a4: 7c 00 81 46 wrteei 1
- 1a8: 7c 85 02 06 mfdcrx r4,r5
- 1ac: 7c aa 3a 86 mfdcr r5,234
- 1b0: 7c e6 03 06 mtdcrx r6,r7
- 1b4: 7d 10 6b 86 mtdcr 432,r8
+ 1a0: 7c 60 01 06 wrtee r3
+ 1a4: 7c 00 81 46 wrteei 1
+ 1a8: 7c 85 02 06 mfdcrx r4,r5
+ 1ac: 7c aa 3a 86 mfdcr r5,234
+ 1b0: 7c e6 03 06 mtdcrx r6,r7
+ 1b4: 7d 10 6b 86 mtdcr 432,r8
1b8: 7c 00 04 ac msync
- 1bc: 7c 09 55 ec dcba r9,r10
- 1c0: 7c 00 06 ac mbar
- 1c4: 7c 00 06 ac mbar
- 1c8: 7c 20 06 ac mbar 1
+ 1bc: 7c 09 55 ec dcba r9,r10
+ 1c0: 7c 00 06 ac mbar
+ 1c4: 7c 00 06 ac mbar
+ 1c8: 7c 20 06 ac mbar 1
diff --git a/gas/testsuite/gas/ppc/booke_xcoff.d b/gas/testsuite/gas/ppc/booke_xcoff.d
index 50bbf9a..30a594b 100644
--- a/gas/testsuite/gas/ppc/booke_xcoff.d
+++ b/gas/testsuite/gas/ppc/booke_xcoff.d
@@ -7,22 +7,22 @@
Disassembly of section .text:
0000000000000000 <.text>:
- 0: 7c 22 3f 64 tlbre r1,r2,7
- 4: 7c be 1f a4 tlbwe r5,r30,3
- 8: 7c a8 48 2c icbt 5,r8,r9
- c: 7c a6 02 26 mfapidi r5,r6
- 10: 7c 07 46 24 tlbivax r7,r8
- 14: 7c 09 56 26 tlbivaxe r9,r10
- 18: 7c 0b 67 24 tlbsx r11,r12
- 1c: 7c 0d 77 26 tlbsxe r13,r14
- 20: 7e 80 04 40 mcrxr64 cr5
+ 0: 7c 22 3f 64 tlbre r1,r2,7
+ 4: 7c be 1f a4 tlbwe r5,r30,3
+ 8: 7c a8 48 2c icbt 5,r8,r9
+ c: 7c a6 02 26 mfapidi r5,r6
+ 10: 7c 07 46 24 tlbivax r7,r8
+ 14: 7c 09 56 26 tlbivaxe r9,r10
+ 18: 7c 0b 67 24 tlbsx r11,r12
+ 1c: 7c 0d 77 26 tlbsxe r13,r14
+ 20: 7e 80 04 40 mcrxr64 cr5
24: 4c 00 00 66 rfci
- 28: 7c 60 01 06 wrtee r3
- 2c: 7c 00 81 46 wrteei 1
- 30: 7c 85 02 06 mfdcrx r4,r5
- 34: 7c aa 3a 86 mfdcr r5,234
- 38: 7c e6 03 06 mtdcrx r6,r7
- 3c: 7d 10 6b 86 mtdcr 432,r8
- 40: 7c 00 04 ac sync
- 44: 7c 09 55 ec dcba r9,r10
+ 28: 7c 60 01 06 wrtee r3
+ 2c: 7c 00 81 46 wrteei 1
+ 30: 7c 85 02 06 mfdcrx r4,r5
+ 34: 7c aa 3a 86 mfdcr r5,234
+ 38: 7c e6 03 06 mtdcrx r6,r7
+ 3c: 7d 10 6b 86 mtdcr 432,r8
+ 40: 7c 00 04 ac sync
+ 44: 7c 09 55 ec dcba r9,r10
48: 7c 00 06 ac eieio
diff --git a/gas/testsuite/gas/ppc/booke_xcoff64.d b/gas/testsuite/gas/ppc/booke_xcoff64.d
index 803fa57..646ce9d 100644
--- a/gas/testsuite/gas/ppc/booke_xcoff64.d
+++ b/gas/testsuite/gas/ppc/booke_xcoff64.d
@@ -7,119 +7,119 @@
Disassembly of section .text:
0000000000000000 <.text>:
- 0: 7c 22 3f 64 tlbre r1,r2,7
- 4: 7c be 1f a4 tlbwe r5,r30,3
- 8: 24 25 00 30 bce 1,4\*cr1\+gt,38 <.text\+0x38>
- c: 24 46 00 3d bcel 2,4\*cr1\+eq,48 <.text\+0x48>
- 10: 24 67 00 5a bcea 3,4\*cr1\+so,58 <.text\+0x58>
+ 0: 7c 22 3f 64 tlbre r1,r2,7
+ 4: 7c be 1f a4 tlbwe r5,r30,3
+ 8: 24 25 00 30 bce 1,4\*cr1\+gt,38 <.text\+0x38>
+ c: 24 46 00 3d bcel 2,4\*cr1\+eq,48 <.text\+0x48>
+ 10: 24 67 00 5a bcea 3,4\*cr1\+so,58 <.text\+0x58>
12: R_BA_16 .text
- 14: 24 88 00 7b bcela 4,4\*cr2,78 <.text\+0x78>
+ 14: 24 88 00 7b bcela 4,4\*cr2,78 <.text\+0x78>
16: R_BA_16 .text
- 18: 4c a9 00 22 bclre 5,4\*cr2\+gt
- 1c: 4c aa 00 23 bclrel 5,4\*cr2\+eq
- 20: 4d 0b 04 22 bcctre 8,4\*cr2\+so
- 24: 4d 0c 04 23 bcctrel 8,4\*cr3
- 28: 58 00 00 74 be 9c <.text\+0x9c>
- 2c: 58 00 00 89 bel b4 <.text\+0xb4>
- 30: 58 00 00 f2 bea f0 <.text\+0xf0>
+ 18: 4c a9 00 22 bclre 5,4\*cr2\+gt
+ 1c: 4c aa 00 23 bclrel 5,4\*cr2\+eq
+ 20: 4d 0b 04 22 bcctre 8,4\*cr2\+so
+ 24: 4d 0c 04 23 bcctrel 8,4\*cr3
+ 28: 58 00 00 74 be 9c <.text\+0x9c>
+ 2c: 58 00 00 89 bel b4 <.text\+0xb4>
+ 30: 58 00 00 f2 bea f0 <.text\+0xf0>
30: R_BA_26 .text
- 34: 58 00 01 27 bela 124 <.text\+0x124>
+ 34: 58 00 01 27 bela 124 <.text\+0x124>
34: R_BA_26 .text
- 38: e9 09 00 80 lbze r8,8\(r9\)
- 3c: e9 8f 00 41 lbzue r12,4\(r15\)
- 40: 7c 86 40 fe lbzuxe r4,r6,r8
- 44: 7c 65 38 be lbzxe r3,r5,r7
- 48: f8 a6 06 40 lde r5,400\(r6\)
- 4c: f8 c7 07 11 ldue r6,452\(r7\)
- 50: 7c e8 4e 3e ldxe r7,r8,r9
- 54: 7d 4b 66 7e lduxe r10,r11,r12
- 58: f9 81 02 06 lfde f12,128\(r1\)
- 5c: f8 25 00 47 lfdue f1,16\(r5\)
- 60: 7c a1 1c be lfdxe f5,r1,r3
- 64: 7c c2 24 fe lfduxe f6,r2,r4
- 68: f9 09 00 c4 lfse f8,48\(r9\)
- 6c: f9 2a 01 15 lfsue f9,68\(r10\)
- 70: 7d 44 44 7e lfsuxe f10,r4,r8
- 74: 7d 23 3c 3e lfsxe f9,r3,r7
- 78: e9 45 03 24 lhae r10,50\(r5\)
- 7c: e8 23 00 55 lhaue r1,5\(r3\)
- 80: 7c a1 1a fe lhauxe r5,r1,r3
- 84: 7f be fa be lhaxe r29,r30,r31
- 88: 7c 22 1e 3c lhbrxe r1,r2,r3
- 8c: e8 83 01 22 lhze r4,18\(r3\)
- 90: e8 c9 01 43 lhzue r6,20\(r9\)
- 94: 7c a7 4a 7e lhzuxe r5,r7,r9
- 98: 7d 27 2a 3e lhzxe r9,r7,r5
- 9c: 7d 4f a0 fc lwarxe r10,r15,r20
- a0: 7c aa 94 3c lwbrxe r5,r10,r18
- a4: eb 9d 00 46 lwze r28,4\(r29\)
- a8: e9 0a 02 87 lwzue r8,40\(r10\)
- ac: 7c 66 48 7e lwzuxe r3,r6,r9
- b0: 7f dd e0 3e lwzxe r30,r29,r28
- b4: 7c 06 3d fc dcbae r6,r7
- b8: 7c 08 48 bc dcbfe r8,r9
- bc: 7c 0a 5b bc dcbie r10,r11
- c0: 7c 08 f0 7c dcbste r8,r30
- c4: 7c c3 0a 3c dcbte 6,r3,r1
- c8: 7c a4 11 fa dcbtste 5,r4,r2
- cc: 7c 0f 77 fc dcbze r15,r14
- d0: 7c 03 27 bc icbie r3,r4
- d4: 7c a8 48 2c icbt 5,r8,r9
- d8: 7c ca 78 3c icbte 6,r10,r15
- dc: 7c a6 02 26 mfapidi r5,r6
- e0: 7c 07 46 24 tlbivax r7,r8
- e4: 7c 09 56 26 tlbivaxe r9,r10
- e8: 7c 0b 67 24 tlbsx r11,r12
- ec: 7c 0d 77 26 tlbsxe r13,r14
- f0: 7c 22 1b 14 adde64 r1,r2,r3
- f4: 7c 85 37 14 adde64o r4,r5,r6
- f8: 7c e8 03 d4 addme64 r7,r8
- fc: 7d 2a 07 d4 addme64o r9,r10
- 100: 7d 6c 03 94 addze64 r11,r12
- 104: 7d ae 07 94 addze64o r13,r14
- 108: 7e 80 04 40 mcrxr64 cr5
- 10c: 7d f0 8b 10 subfe64 r15,r16,r17
- 110: 7e 53 a7 10 subfe64o r18,r19,r20
- 114: 7e b6 03 d0 subfme64 r21,r22
- 118: 7e f8 07 d0 subfme64o r23,r24
- 11c: 7f 3a 03 90 subfze64 r25,r26
- 120: 7f 7c 07 90 subfze64o r27,r28
- 124: e8 22 03 28 stbe r1,50\(r2\)
- 128: e8 64 02 89 stbue r3,40\(r4\)
- 12c: 7c a6 39 fe stbuxe r5,r6,r7
- 130: 7d 09 51 be stbxe r8,r9,r10
- 134: 7d 6c 6b ff stdcxe. r11,r12,r13
- 138: f9 cf 00 78 stde r14,28\(r15\)
- 13c: fa 11 00 59 stdue r16,20\(r17\)
- 140: 7e 53 a7 3e stdxe r18,r19,r20
- 144: 7e b6 bf 7e stduxe r21,r22,r23
- 148: f8 38 00 3e stfde f1,12\(r24\)
- 14c: f8 59 00 0f stfdue f2,0\(r25\)
- 150: 7c 7a dd be stfdxe f3,r26,r27
- 154: 7c 9c ed fe stfduxe f4,r28,r29
- 158: 7c be ff be stfiwxe f5,r30,r31
- 15c: f8 de 00 6c stfse f6,24\(r30\)
- 160: f8 fd 00 5d stfsue f7,20\(r29\)
- 164: 7d 1c dd 3e stfsxe f8,r28,r27
- 168: 7d 3a cd 7e stfsuxe f9,r26,r25
- 16c: 7f 17 b7 3c sthbrxe r24,r23,r22
- 170: ea b4 01 ea sthe r21,30\(r20\)
- 174: ea 72 02 8b sthue r19,40\(r18\)
- 178: 7e 30 7b 7e sthuxe r17,r16,r15
- 17c: 7d cd 63 3e sthxe r14,r13,r12
- 180: 7d 6a 4d 3c stwbrxe r11,r10,r9
- 184: 7d 07 31 3d stwcxe. r8,r7,r6
- 188: e8 a4 03 2e stwe r5,50\(r4\)
- 18c: e8 62 02 8f stwue r3,40\(r2\)
- 190: 7c 22 19 7e stwuxe r1,r2,r3
- 194: 7c 85 31 3e stwxe r4,r5,r6
+ 38: e9 09 00 80 lbze r8,8\(r9\)
+ 3c: e9 8f 00 41 lbzue r12,4\(r15\)
+ 40: 7c 86 40 fe lbzuxe r4,r6,r8
+ 44: 7c 65 38 be lbzxe r3,r5,r7
+ 48: f8 a6 06 40 lde r5,400\(r6\)
+ 4c: f8 c7 07 11 ldue r6,452\(r7\)
+ 50: 7c e8 4e 3e ldxe r7,r8,r9
+ 54: 7d 4b 66 7e lduxe r10,r11,r12
+ 58: f9 81 02 06 lfde f12,128\(r1\)
+ 5c: f8 25 00 47 lfdue f1,16\(r5\)
+ 60: 7c a1 1c be lfdxe f5,r1,r3
+ 64: 7c c2 24 fe lfduxe f6,r2,r4
+ 68: f9 09 00 c4 lfse f8,48\(r9\)
+ 6c: f9 2a 01 15 lfsue f9,68\(r10\)
+ 70: 7d 44 44 7e lfsuxe f10,r4,r8
+ 74: 7d 23 3c 3e lfsxe f9,r3,r7
+ 78: e9 45 03 24 lhae r10,50\(r5\)
+ 7c: e8 23 00 55 lhaue r1,5\(r3\)
+ 80: 7c a1 1a fe lhauxe r5,r1,r3
+ 84: 7f be fa be lhaxe r29,r30,r31
+ 88: 7c 22 1e 3c lhbrxe r1,r2,r3
+ 8c: e8 83 01 22 lhze r4,18\(r3\)
+ 90: e8 c9 01 43 lhzue r6,20\(r9\)
+ 94: 7c a7 4a 7e lhzuxe r5,r7,r9
+ 98: 7d 27 2a 3e lhzxe r9,r7,r5
+ 9c: 7d 4f a0 fc lwarxe r10,r15,r20
+ a0: 7c aa 94 3c lwbrxe r5,r10,r18
+ a4: eb 9d 00 46 lwze r28,4\(r29\)
+ a8: e9 0a 02 87 lwzue r8,40\(r10\)
+ ac: 7c 66 48 7e lwzuxe r3,r6,r9
+ b0: 7f dd e0 3e lwzxe r30,r29,r28
+ b4: 7c 06 3d fc dcbae r6,r7
+ b8: 7c 08 48 bc dcbfe r8,r9
+ bc: 7c 0a 5b bc dcbie r10,r11
+ c0: 7c 08 f0 7c dcbste r8,r30
+ c4: 7c c3 0a 3c dcbte 6,r3,r1
+ c8: 7c a4 11 fa dcbtste 5,r4,r2
+ cc: 7c 0f 77 fc dcbze r15,r14
+ d0: 7c 03 27 bc icbie r3,r4
+ d4: 7c a8 48 2c icbt 5,r8,r9
+ d8: 7c ca 78 3c icbte 6,r10,r15
+ dc: 7c a6 02 26 mfapidi r5,r6
+ e0: 7c 07 46 24 tlbivax r7,r8
+ e4: 7c 09 56 26 tlbivaxe r9,r10
+ e8: 7c 0b 67 24 tlbsx r11,r12
+ ec: 7c 0d 77 26 tlbsxe r13,r14
+ f0: 7c 22 1b 14 adde64 r1,r2,r3
+ f4: 7c 85 37 14 adde64o r4,r5,r6
+ f8: 7c e8 03 d4 addme64 r7,r8
+ fc: 7d 2a 07 d4 addme64o r9,r10
+ 100: 7d 6c 03 94 addze64 r11,r12
+ 104: 7d ae 07 94 addze64o r13,r14
+ 108: 7e 80 04 40 mcrxr64 cr5
+ 10c: 7d f0 8b 10 subfe64 r15,r16,r17
+ 110: 7e 53 a7 10 subfe64o r18,r19,r20
+ 114: 7e b6 03 d0 subfme64 r21,r22
+ 118: 7e f8 07 d0 subfme64o r23,r24
+ 11c: 7f 3a 03 90 subfze64 r25,r26
+ 120: 7f 7c 07 90 subfze64o r27,r28
+ 124: e8 22 03 28 stbe r1,50\(r2\)
+ 128: e8 64 02 89 stbue r3,40\(r4\)
+ 12c: 7c a6 39 fe stbuxe r5,r6,r7
+ 130: 7d 09 51 be stbxe r8,r9,r10
+ 134: 7d 6c 6b ff stdcxe. r11,r12,r13
+ 138: f9 cf 00 78 stde r14,28\(r15\)
+ 13c: fa 11 00 59 stdue r16,20\(r17\)
+ 140: 7e 53 a7 3e stdxe r18,r19,r20
+ 144: 7e b6 bf 7e stduxe r21,r22,r23
+ 148: f8 38 00 3e stfde f1,12\(r24\)
+ 14c: f8 59 00 0f stfdue f2,0\(r25\)
+ 150: 7c 7a dd be stfdxe f3,r26,r27
+ 154: 7c 9c ed fe stfduxe f4,r28,r29
+ 158: 7c be ff be stfiwxe f5,r30,r31
+ 15c: f8 de 00 6c stfse f6,24\(r30\)
+ 160: f8 fd 00 5d stfsue f7,20\(r29\)
+ 164: 7d 1c dd 3e stfsxe f8,r28,r27
+ 168: 7d 3a cd 7e stfsuxe f9,r26,r25
+ 16c: 7f 17 b7 3c sthbrxe r24,r23,r22
+ 170: ea b4 01 ea sthe r21,30\(r20\)
+ 174: ea 72 02 8b sthue r19,40\(r18\)
+ 178: 7e 30 7b 7e sthuxe r17,r16,r15
+ 17c: 7d cd 63 3e sthxe r14,r13,r12
+ 180: 7d 6a 4d 3c stwbrxe r11,r10,r9
+ 184: 7d 07 31 3d stwcxe. r8,r7,r6
+ 188: e8 a4 03 2e stwe r5,50\(r4\)
+ 18c: e8 62 02 8f stwue r3,40\(r2\)
+ 190: 7c 22 19 7e stwuxe r1,r2,r3
+ 194: 7c 85 31 3e stwxe r4,r5,r6
198: 4c 00 00 66 rfci
- 19c: 7c 60 01 06 wrtee r3
- 1a0: 7c 00 81 46 wrteei 1
- 1a4: 7c 85 02 06 mfdcrx r4,r5
- 1a8: 7c aa 3a 86 mfdcr r5,234
- 1ac: 7c e6 03 06 mtdcrx r6,r7
- 1b0: 7d 10 6b 86 mtdcr 432,r8
- 1b4: 7c 00 04 ac sync
- 1b8: 7c 09 55 ec dcba r9,r10
+ 19c: 7c 60 01 06 wrtee r3
+ 1a0: 7c 00 81 46 wrteei 1
+ 1a4: 7c 85 02 06 mfdcrx r4,r5
+ 1a8: 7c aa 3a 86 mfdcr r5,234
+ 1ac: 7c e6 03 06 mtdcrx r6,r7
+ 1b0: 7d 10 6b 86 mtdcr 432,r8
+ 1b4: 7c 00 04 ac sync
+ 1b8: 7c 09 55 ec dcba r9,r10
1bc: 7c 00 06 ac eieio
diff --git a/gas/testsuite/gas/ppc/e500.d b/gas/testsuite/gas/ppc/e500.d
index 6b74285..b485020 100644
--- a/gas/testsuite/gas/ppc/e500.d
+++ b/gas/testsuite/gas/ppc/e500.d
@@ -7,15 +7,15 @@
Disassembly of section \.text:
0+0000000 <start>:
- 0: 7c 43 25 de isel r2,r3,r4,23
- 4: 7c 85 33 0c dcblc 4,r5,r6
- 8: 7c e8 49 4c dcbtls 7,r8,r9
- c: 7d 4b 61 0c dcbtstls 10,r11,r12
- 10: 7d ae 7b cc icbtls 13,r14,r15
- 14: 7e 11 91 cc icblc 16,r17,r18
- 18: 7c 89 33 9c mtpmr 201,r4
- 1c: 7c ab 32 9c mfpmr r5,203
+ 0: 7c 43 25 de isel r2,r3,r4,23
+ 4: 7c 85 33 0c dcblc 4,r5,r6
+ 8: 7c e8 49 4c dcbtls 7,r8,r9
+ c: 7d 4b 61 0c dcbtstls 10,r11,r12
+ 10: 7d ae 7b cc icbtls 13,r14,r15
+ 14: 7e 11 91 cc icblc 16,r17,r18
+ 18: 7c 89 33 9c mtpmr 201,r4
+ 1c: 7c ab 32 9c mfpmr r5,203
20: 7c 00 04 0c bblels
24: 7c 00 04 4c bbelr
- 28: 7d 00 83 a6 mtspefscr r8
- 2c: 7d 20 82 a6 mfspefscr r9
+ 28: 7d 00 83 a6 mtspefscr r8
+ 2c: 7d 20 82 a6 mfspefscr r9
diff --git a/gas/testsuite/gas/ppc/power4.d b/gas/testsuite/gas/ppc/power4.d
index e42a81b..6094848 100644
--- a/gas/testsuite/gas/ppc/power4.d
+++ b/gas/testsuite/gas/ppc/power4.d
@@ -34,68 +34,68 @@ SYMBOL TABLE:
Disassembly of section \.text:
0+ <\.text>:
- +0: e0 83 00 00 lq r4,0\(r3\)
+ +0: e0 83 00 00 lq r4,0\(r3\)
2: R_PPC64_ADDR16_LO_DS dsym0
- +4: e0 83 00 00 lq r4,0\(r3\)
+ +4: e0 83 00 00 lq r4,0\(r3\)
6: R_PPC64_ADDR16_LO_DS dsym1
- +8: e0 83 00 00 lq r4,0\(r3\)
+ +8: e0 83 00 00 lq r4,0\(r3\)
a: R_PPC64_ADDR16_LO_DS usym0
- +c: e0 83 00 00 lq r4,0\(r3\)
+ +c: e0 83 00 00 lq r4,0\(r3\)
e: R_PPC64_ADDR16_LO_DS usym1
- +10: e0 83 00 00 lq r4,0\(r3\)
+ +10: e0 83 00 00 lq r4,0\(r3\)
12: R_PPC64_ADDR16_LO_DS esym0
- +14: e0 83 00 00 lq r4,0\(r3\)
+ +14: e0 83 00 00 lq r4,0\(r3\)
16: R_PPC64_ADDR16_LO_DS esym1
- +18: e0 82 00 00 lq r4,0\(r2\)
+ +18: e0 82 00 00 lq r4,0\(r2\)
1a: R_PPC64_TOC16_DS \.toc
- +1c: e0 82 00 00 lq r4,0\(r2\)
+ +1c: e0 82 00 00 lq r4,0\(r2\)
1e: R_PPC64_TOC16_DS \.toc\+0x8
- +20: e0 82 00 10 lq r4,16\(r2\)
+ +20: e0 82 00 10 lq r4,16\(r2\)
22: R_PPC64_TOC16_DS \.toc\+0x10
- +24: e0 82 00 10 lq r4,16\(r2\)
+ +24: e0 82 00 10 lq r4,16\(r2\)
26: R_PPC64_TOC16_DS \.toc\+0x18
- +28: e0 82 00 20 lq r4,32\(r2\)
+ +28: e0 82 00 20 lq r4,32\(r2\)
2a: R_PPC64_TOC16_DS \.toc\+0x20
- +2c: e0 82 00 20 lq r4,32\(r2\)
+ +2c: e0 82 00 20 lq r4,32\(r2\)
2e: R_PPC64_TOC16_DS \.toc\+0x28
- +30: e0 c2 00 20 lq r6,32\(r2\)
+ +30: e0 c2 00 20 lq r6,32\(r2\)
32: R_PPC64_TOC16_LO_DS \.toc\+0x28
- +34: e0 80 00 00 lq r4,0\(r0\)
+ +34: e0 80 00 00 lq r4,0\(0\)
36: R_PPC64_ADDR16_LO_DS \.text
- +38: e0 c3 00 00 lq r6,0\(r3\)
+ +38: e0 c3 00 00 lq r6,0\(r3\)
3a: R_PPC64_GOT16_DS dsym0
- +3c: e0 c3 00 00 lq r6,0\(r3\)
+ +3c: e0 c3 00 00 lq r6,0\(r3\)
3e: R_PPC64_GOT16_LO_DS dsym0
- +40: e0 c3 00 00 lq r6,0\(r3\)
+ +40: e0 c3 00 00 lq r6,0\(r3\)
42: R_PPC64_PLT16_LO_DS dsym0
- +44: e0 c3 00 00 lq r6,0\(r3\)
+ +44: e0 c3 00 00 lq r6,0\(r3\)
46: R_PPC64_SECTOFF_DS dsym1
- +48: e0 c3 00 00 lq r6,0\(r3\)
+ +48: e0 c3 00 00 lq r6,0\(r3\)
4a: R_PPC64_SECTOFF_LO_DS dsym1
- +4c: e0 c4 00 10 lq r6,16\(r4\)
- +50: f8 c7 00 02 stq r6,0\(r7\)
- +54: f8 c7 00 12 stq r6,16\(r7\)
- +58: f8 c7 ff f2 stq r6,-16\(r7\)
- +5c: f8 c7 80 02 stq r6,-32768\(r7\)
- +60: f8 c7 7f f2 stq r6,32752\(r7\)
+ +4c: e0 c4 00 10 lq r6,16\(r4\)
+ +50: f8 c7 00 02 stq r6,0\(r7\)
+ +54: f8 c7 00 12 stq r6,16\(r7\)
+ +58: f8 c7 ff f2 stq r6,-16\(r7\)
+ +5c: f8 c7 80 02 stq r6,-32768\(r7\)
+ +60: f8 c7 7f f2 stq r6,32752\(r7\)
+64: 00 00 02 00 attn
- +68: 7c 6f f1 20 mtcr r3
- +6c: 7c 6f f1 20 mtcr r3
- +70: 7c 68 11 20 mtcrf 129,r3
- +74: 7c 70 11 20 mtcrf 1,r3
- +78: 7c 70 21 20 mtcrf 2,r3
- +7c: 7c 70 41 20 mtcrf 4,r3
- +80: 7c 70 81 20 mtcrf 8,r3
- +84: 7c 71 01 20 mtcrf 16,r3
- +88: 7c 72 01 20 mtcrf 32,r3
- +8c: 7c 74 01 20 mtcrf 64,r3
- +90: 7c 78 01 20 mtcrf 128,r3
- +94: 7c 60 00 26 mfcr r3
- +98: 7c 70 10 26 mfcr r3,1
- +9c: 7c 70 20 26 mfcr r3,2
- +a0: 7c 70 40 26 mfcr r3,4
- +a4: 7c 70 80 26 mfcr r3,8
- +a8: 7c 71 00 26 mfcr r3,16
- +ac: 7c 72 00 26 mfcr r3,32
- +b0: 7c 74 00 26 mfcr r3,64
- +b4: 7c 78 00 26 mfcr r3,128
+ +68: 7c 6f f1 20 mtcr r3
+ +6c: 7c 6f f1 20 mtcr r3
+ +70: 7c 68 11 20 mtcrf 129,r3
+ +74: 7c 70 11 20 mtcrf 1,r3
+ +78: 7c 70 21 20 mtcrf 2,r3
+ +7c: 7c 70 41 20 mtcrf 4,r3
+ +80: 7c 70 81 20 mtcrf 8,r3
+ +84: 7c 71 01 20 mtcrf 16,r3
+ +88: 7c 72 01 20 mtcrf 32,r3
+ +8c: 7c 74 01 20 mtcrf 64,r3
+ +90: 7c 78 01 20 mtcrf 128,r3
+ +94: 7c 60 00 26 mfcr r3
+ +98: 7c 70 10 26 mfcr r3,1
+ +9c: 7c 70 20 26 mfcr r3,2
+ +a0: 7c 70 40 26 mfcr r3,4
+ +a4: 7c 70 80 26 mfcr r3,8
+ +a8: 7c 71 00 26 mfcr r3,16
+ +ac: 7c 72 00 26 mfcr r3,32
+ +b0: 7c 74 00 26 mfcr r3,64
+ +b4: 7c 78 00 26 mfcr r3,128
diff --git a/gas/testsuite/gas/ppc/test1elf32.d b/gas/testsuite/gas/ppc/test1elf32.d
index e7f2da6..5654282 100644
--- a/gas/testsuite/gas/ppc/test1elf32.d
+++ b/gas/testsuite/gas/ppc/test1elf32.d
@@ -35,50 +35,50 @@ SYMBOL TABLE:
Disassembly of section \.text:
0+0000 <\.text>:
- 0: 80 63 00 00 lwz r3,0\(r3\)
+ 0: 80 63 00 00 lwz r3,0\(r3\)
2: R_PPC_ADDR16_LO dsym0
- 4: 80 63 00 00 lwz r3,0\(r3\)
+ 4: 80 63 00 00 lwz r3,0\(r3\)
6: R_PPC_ADDR16_LO dsym1
- 8: 80 63 00 00 lwz r3,0\(r3\)
+ 8: 80 63 00 00 lwz r3,0\(r3\)
a: R_PPC_ADDR16_LO usym0
- c: 80 63 00 00 lwz r3,0\(r3\)
+ c: 80 63 00 00 lwz r3,0\(r3\)
e: R_PPC_ADDR16_LO usym1
- 10: 80 63 00 00 lwz r3,0\(r3\)
+ 10: 80 63 00 00 lwz r3,0\(r3\)
12: R_PPC_ADDR16_LO esym0
- 14: 80 63 00 00 lwz r3,0\(r3\)
+ 14: 80 63 00 00 lwz r3,0\(r3\)
16: R_PPC_ADDR16_LO esym1
- 18: 38 60 00 04 li r3,4
- 1c: 38 60 ff fc li r3,-4
- 20: 38 60 00 04 li r3,4
- 24: 38 60 ff fc li r3,-4
- 28: 38 60 ff fc li r3,-4
- 2c: 38 60 00 04 li r3,4
- 30: 38 60 00 00 li r3,0
+ 18: 38 60 00 04 li r3,4
+ 1c: 38 60 ff fc li r3,-4
+ 20: 38 60 00 04 li r3,4
+ 24: 38 60 ff fc li r3,-4
+ 28: 38 60 ff fc li r3,-4
+ 2c: 38 60 00 04 li r3,4
+ 30: 38 60 00 00 li r3,0
32: R_PPC_ADDR16_LO dsym0
- 34: 38 60 00 00 li r3,0
+ 34: 38 60 00 00 li r3,0
36: R_PPC_ADDR16_HI dsym0
- 38: 38 60 00 00 li r3,0
+ 38: 38 60 00 00 li r3,0
3a: R_PPC_ADDR16_HA dsym0
- 3c: 38 60 ff fc li r3,-4
- 40: 38 60 ff ff li r3,-1
- 44: 38 60 00 00 li r3,0
- 48: 80 64 00 04 lwz r3,4\(r4\)
- 4c: 80 60 00 00 lwz r3,0\(r0\)
+ 3c: 38 60 ff fc li r3,-4
+ 40: 38 60 ff ff li r3,-1
+ 44: 38 60 00 00 li r3,0
+ 48: 80 64 00 04 lwz r3,4\(r4\)
+ 4c: 80 60 00 00 lwz r3,0\(0\)
4e: R_PPC_ADDR16_LO \.text
Disassembly of section \.data:
0+0000 <dsym0>:
- 0: de ad be ef stfdu f21,-16657\(r13\)
+ 0: de ad be ef stfdu f21,-16657\(r13\)
0+0004 <dsym1>:
- 4: ca fe ba be lfd f23,-17730\(r30\)
+ 4: ca fe ba be lfd f23,-17730\(r30\)
0+0008 <datpt>:
8: 00 98 96 80 \.long 0x989680
8: R_PPC_REL32 jk\+0x989680
0+000c <dat0>:
- c: ff ff ff fc fnmsub f31,f31,f31,f31
+ c: ff ff ff fc fnmsub f31,f31,f31,f31
c: R_PPC_REL32 jk\+0xf+fffc
0+0010 <dat1>:
diff --git a/gas/testsuite/gas/ppc/test1elf64.d b/gas/testsuite/gas/ppc/test1elf64.d
index bd8ae9f..bfdd4e8 100644
--- a/gas/testsuite/gas/ppc/test1elf64.d
+++ b/gas/testsuite/gas/ppc/test1elf64.d
@@ -40,80 +40,80 @@ SYMBOL TABLE:
Disassembly of section \.text:
0000000000000000 <\.text>:
- 0: e8 63 00 00 ld r3,0\(r3\)
+ 0: e8 63 00 00 ld r3,0\(r3\)
2: R_PPC64_ADDR16_LO_DS dsym0
- 4: e8 63 00 00 ld r3,0\(r3\)
+ 4: e8 63 00 00 ld r3,0\(r3\)
6: R_PPC64_ADDR16_LO_DS dsym1
- 8: e8 63 00 00 ld r3,0\(r3\)
+ 8: e8 63 00 00 ld r3,0\(r3\)
a: R_PPC64_ADDR16_LO_DS usym0
- c: e8 63 00 00 ld r3,0\(r3\)
+ c: e8 63 00 00 ld r3,0\(r3\)
e: R_PPC64_ADDR16_LO_DS usym1
- 10: e8 63 00 00 ld r3,0\(r3\)
+ 10: e8 63 00 00 ld r3,0\(r3\)
12: R_PPC64_ADDR16_LO_DS esym0
- 14: e8 63 00 00 ld r3,0\(r3\)
+ 14: e8 63 00 00 ld r3,0\(r3\)
16: R_PPC64_ADDR16_LO_DS esym1
- 18: e8 62 00 00 ld r3,0\(r2\)
+ 18: e8 62 00 00 ld r3,0\(r2\)
1a: R_PPC64_TOC16_DS \.toc
- 1c: e8 62 00 08 ld r3,8\(r2\)
+ 1c: e8 62 00 08 ld r3,8\(r2\)
1e: R_PPC64_TOC16_DS \.toc\+0x8
- 20: e8 62 00 10 ld r3,16\(r2\)
+ 20: e8 62 00 10 ld r3,16\(r2\)
22: R_PPC64_TOC16_DS \.toc\+0x10
- 24: e8 62 00 18 ld r3,24\(r2\)
+ 24: e8 62 00 18 ld r3,24\(r2\)
26: R_PPC64_TOC16_DS \.toc\+0x18
- 28: e8 62 00 20 ld r3,32\(r2\)
+ 28: e8 62 00 20 ld r3,32\(r2\)
2a: R_PPC64_TOC16_DS \.toc\+0x20
- 2c: e8 62 00 28 ld r3,40\(r2\)
+ 2c: e8 62 00 28 ld r3,40\(r2\)
2e: R_PPC64_TOC16_DS \.toc\+0x28
- 30: 3c 80 00 28 lis r4,40
+ 30: 3c 80 00 28 lis r4,40
32: R_PPC64_TOC16_HA \.toc\+0x28
- 34: e8 62 00 28 ld r3,40\(r2\)
+ 34: e8 62 00 28 ld r3,40\(r2\)
36: R_PPC64_TOC16_LO_DS \.toc\+0x28
- 38: 38 60 00 08 li r3,8
- 3c: 38 60 ff f8 li r3,-8
- 40: 38 60 00 08 li r3,8
- 44: 38 60 ff f8 li r3,-8
- 48: 38 60 ff f8 li r3,-8
- 4c: 38 60 00 08 li r3,8
- 50: 38 60 00 00 li r3,0
+ 38: 38 60 00 08 li r3,8
+ 3c: 38 60 ff f8 li r3,-8
+ 40: 38 60 00 08 li r3,8
+ 44: 38 60 ff f8 li r3,-8
+ 48: 38 60 ff f8 li r3,-8
+ 4c: 38 60 00 08 li r3,8
+ 50: 38 60 00 00 li r3,0
52: R_PPC64_ADDR16_LO dsym0
- 54: 38 60 00 00 li r3,0
+ 54: 38 60 00 00 li r3,0
56: R_PPC64_ADDR16_HI dsym0
- 58: 38 60 00 00 li r3,0
+ 58: 38 60 00 00 li r3,0
5a: R_PPC64_ADDR16_HA dsym0
- 5c: 38 60 00 00 li r3,0
+ 5c: 38 60 00 00 li r3,0
5e: R_PPC64_ADDR16_HIGHER dsym0
- 60: 38 60 00 00 li r3,0
+ 60: 38 60 00 00 li r3,0
62: R_PPC64_ADDR16_HIGHERA dsym0
- 64: 38 60 00 00 li r3,0
+ 64: 38 60 00 00 li r3,0
66: R_PPC64_ADDR16_HIGHEST dsym0
- 68: 38 60 00 00 li r3,0
+ 68: 38 60 00 00 li r3,0
6a: R_PPC64_ADDR16_HIGHESTA dsym0
- 6c: 38 60 ff f8 li r3,-8
- 70: 38 60 ff ff li r3,-1
- 74: 38 60 00 00 li r3,0
- 78: 38 60 ff ff li r3,-1
- 7c: 38 60 00 00 li r3,0
- 80: 38 60 ff ff li r3,-1
- 84: 38 60 00 00 li r3,0
- 88: e8 64 00 08 ld r3,8\(r4\)
- 8c: e8 60 00 00 ld r3,0\(r0\)
+ 6c: 38 60 ff f8 li r3,-8
+ 70: 38 60 ff ff li r3,-1
+ 74: 38 60 00 00 li r3,0
+ 78: 38 60 ff ff li r3,-1
+ 7c: 38 60 00 00 li r3,0
+ 80: 38 60 ff ff li r3,-1
+ 84: 38 60 00 00 li r3,0
+ 88: e8 64 00 08 ld r3,8\(r4\)
+ 8c: e8 60 00 00 ld r3,0\(0\)
8e: R_PPC64_ADDR16_LO_DS \.text
Disassembly of section \.data:
0000000000000000 <dsym0>:
0: 00 00 00 00 \.long 0x0
- 4: de ad be ef stfdu f21,-16657\(r13\)
+ 4: de ad be ef stfdu f21,-16657\(r13\)
0000000000000008 <dsym1>:
8: 00 00 00 00 \.long 0x0
- c: ca fe ba be lfd f23,-17730\(r30\)
+ c: ca fe ba be lfd f23,-17730\(r30\)
0000000000000010 <datpt>:
10: 00 98 96 80 \.long 0x989680
10: R_PPC64_REL32 jk\+0x989680
0000000000000014 <dat0>:
- 14: ff ff ff fc fnmsub f31,f31,f31,f31
+ 14: ff ff ff fc fnmsub f31,f31,f31,f31
14: R_PPC64_REL32 jk\+0xfffffffffffffffc
0000000000000018 <dat1>:
diff --git a/gas/testsuite/gas/ppc/test1xcoff32.d b/gas/testsuite/gas/ppc/test1xcoff32.d
index e720587..7e7a7a7 100644
--- a/gas/testsuite/gas/ppc/test1xcoff32.d
+++ b/gas/testsuite/gas/ppc/test1xcoff32.d
@@ -64,50 +64,50 @@ Disassembly of section \.text:
4: 00 be ef ed \.long 0xbeefed
0+0008 <reference_csect_relative_symbols>:
- 8: 80 63 00 00 l r3,0\(r3\)
- c: 80 63 00 04 l r3,4\(r3\)
- 10: 80 63 00 04 l r3,4\(r3\)
- 14: 80 63 00 00 l r3,0\(r3\)
+ 8: 80 63 00 00 l r3,0\(r3\)
+ c: 80 63 00 04 l r3,4\(r3\)
+ 10: 80 63 00 04 l r3,4\(r3\)
+ 14: 80 63 00 00 l r3,0\(r3\)
0+0018 <dubious_references_to_default_RW_csect>:
- 18: 80 63 00 00 l r3,0\(r3\)
- 1c: 80 63 00 04 l r3,4\(r3\)
- 20: 80 63 00 04 l r3,4\(r3\)
- 24: 80 63 00 08 l r3,8\(r3\)
+ 18: 80 63 00 00 l r3,0\(r3\)
+ 1c: 80 63 00 04 l r3,4\(r3\)
+ 20: 80 63 00 04 l r3,4\(r3\)
+ 24: 80 63 00 08 l r3,8\(r3\)
0+0028 <reference_via_toc>:
- 28: 80 62 00 0c l r3,12\(r2\)
+ 28: 80 62 00 0c l r3,12\(r2\)
2a: R_TOC ignored0\+0xf+ff8c
- 2c: 80 62 00 10 l r3,16\(r2\)
+ 2c: 80 62 00 10 l r3,16\(r2\)
2e: R_TOC ignored1\+0xf+ff88
- 30: 80 62 00 14 l r3,20\(r2\)
+ 30: 80 62 00 14 l r3,20\(r2\)
32: R_TOC ignored2\+0xf+ff84
- 34: 80 62 00 18 l r3,24\(r2\)
+ 34: 80 62 00 18 l r3,24\(r2\)
36: R_TOC ignored3\+0xf+ff80
- 38: 80 62 00 1c l r3,28\(r2\)
+ 38: 80 62 00 1c l r3,28\(r2\)
3a: R_TOC ignored4\+0xf+ff7c
- 3c: 80 62 00 20 l r3,32\(r2\)
+ 3c: 80 62 00 20 l r3,32\(r2\)
3e: R_TOC ignored5\+0xf+ff78
0+0040 <subtract_symbols>:
- 40: 38 60 00 04 lil r3,4
- 44: 38 60 ff fc lil r3,-4
- 48: 38 60 00 04 lil r3,4
- 4c: 38 60 ff fc lil r3,-4
- 50: 38 60 ff fc lil r3,-4
- 54: 38 60 00 04 lil r3,4
- 58: 80 64 00 04 l r3,4\(r4\)
+ 40: 38 60 00 04 lil r3,4
+ 44: 38 60 ff fc lil r3,-4
+ 48: 38 60 00 04 lil r3,4
+ 4c: 38 60 ff fc lil r3,-4
+ 50: 38 60 ff fc lil r3,-4
+ 54: 38 60 00 04 lil r3,4
+ 58: 80 64 00 04 l r3,4\(r4\)
0+005c <load_addresses>:
- 5c: 38 60 00 00 lil r3,0
- 60: 38 60 00 04 lil r3,4
- 64: 38 62 00 24 cal r3,36\(r2\)
+ 5c: 38 60 00 00 lil r3,0
+ 60: 38 60 00 04 lil r3,4
+ 64: 38 62 00 24 cal r3,36\(r2\)
66: R_TOC ignored6\+0xf+ff74
Disassembly of section \.data:
0+0068 <TOC-0xc>:
- 68: de ad be ef stfdu f21,-16657\(r13\)
- 6c: ca fe ba be lfd f23,-17730\(r30\)
+ 68: de ad be ef stfdu f21,-16657\(r13\)
+ 6c: ca fe ba be lfd f23,-17730\(r30\)
70: 00 00 ba ad \.long 0xbaad
0+0074 <TOC>: