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author | Jim Wilson <jimw@sifive.com> | 2017-11-27 19:20:53 -0800 |
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committer | Jim Wilson <jimw@sifive.com> | 2017-11-27 19:20:53 -0800 |
commit | f0531ed6a429b0e6e6509e6852ccd3586f3fa1bd (patch) | |
tree | b6e472cad38218619f2ee4f4ccad5af5efd1aaa2 /gas/testsuite | |
parent | 033bfb739b525703bfe23f151d09e9beee3a2afe (diff) | |
download | gdb-f0531ed6a429b0e6e6509e6852ccd3586f3fa1bd.zip gdb-f0531ed6a429b0e6e6509e6852ccd3586f3fa1bd.tar.gz gdb-f0531ed6a429b0e6e6509e6852ccd3586f3fa1bd.tar.bz2 |
Compress loads/stores with implicit 0 offset.
gas/
* config/tc-riscv.c (riscv_handle_implicit_zero_offset): New.
(riscv_ip): Cases 'k', 'l', 'm', 'n', 'M', 'N', add call to
riscv_handle_implicit_zero_offset. At label load_store, replace
existing code with call to riscv_handle_implicit_zero_offset.
* testsuite/gas/riscv/c-ld.d, testsuite/gas/riscv/c-ld.s: New.
* testsuite/gas/riscv/c-lw.d, testsuite/gas/riscv/c-lw.s: New.
* testsuite/gas/riscv/riscv.exp: Run new tests.
Diffstat (limited to 'gas/testsuite')
-rw-r--r-- | gas/testsuite/gas/riscv/c-ld.d | 17 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/c-ld.s | 9 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/c-lw.d | 17 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/c-lw.s | 9 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/riscv.exp | 2 |
5 files changed, 54 insertions, 0 deletions
diff --git a/gas/testsuite/gas/riscv/c-ld.d b/gas/testsuite/gas/riscv/c-ld.d new file mode 100644 index 0000000..29315e6 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-ld.d @@ -0,0 +1,17 @@ +#as: -march=rv64ic +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+6108[ ]+ld[ ]+a0,0\(a0\) +[ ]+2:[ ]+6108[ ]+ld[ ]+a0,0\(a0\) +[ ]+4:[ ]+e108[ ]+sd[ ]+a0,0\(a0\) +[ ]+6:[ ]+e108[ ]+sd[ ]+a0,0\(a0\) +[ ]+8:[ ]+6502[ ]+ld[ ]+a0,0\(sp\) +[ ]+a:[ ]+6502[ ]+ld[ ]+a0,0\(sp\) +[ ]+c:[ ]+e02a[ ]+sd[ ]+a0,0\(sp\) +[ ]+e:[ ]+e02a[ ]+sd[ ]+a0,0\(sp\) diff --git a/gas/testsuite/gas/riscv/c-ld.s b/gas/testsuite/gas/riscv/c-ld.s new file mode 100644 index 0000000..11b9e55 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-ld.s @@ -0,0 +1,9 @@ +target: + ld a0, (a0) # 'Cl' + ld a0, 0(a0) # 'Cl' + sd a0, (a0) # 'Cl' + sd a0, 0(a0) # 'Cl' + ld a0, (sp) # 'Cn' + ld a0, 0(sp) # 'Cn' + sd a0, (sp) # 'CN' + sd a0, 0(sp) # 'CN' diff --git a/gas/testsuite/gas/riscv/c-lw.d b/gas/testsuite/gas/riscv/c-lw.d new file mode 100644 index 0000000..f3ea3b2 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-lw.d @@ -0,0 +1,17 @@ +#as: -march=rv32ic +#objdump: -dr + +.*:[ ]+file format .* + + +Disassembly of section .text: + +0+000 <target>: +[ ]+0:[ ]+4108[ ]+lw[ ]+a0,0\(a0\) +[ ]+2:[ ]+4108[ ]+lw[ ]+a0,0\(a0\) +[ ]+4:[ ]+c108[ ]+sw[ ]+a0,0\(a0\) +[ ]+6:[ ]+c108[ ]+sw[ ]+a0,0\(a0\) +[ ]+8:[ ]+4502[ ]+lw[ ]+a0,0\(sp\) +[ ]+a:[ ]+4502[ ]+lw[ ]+a0,0\(sp\) +[ ]+c:[ ]+c02a[ ]+sw[ ]+a0,0\(sp\) +[ ]+e:[ ]+c02a[ ]+sw[ ]+a0,0\(sp\) diff --git a/gas/testsuite/gas/riscv/c-lw.s b/gas/testsuite/gas/riscv/c-lw.s new file mode 100644 index 0000000..3cf58f9 --- /dev/null +++ b/gas/testsuite/gas/riscv/c-lw.s @@ -0,0 +1,9 @@ +target: + lw a0, (a0) # 'Ck' + lw a0, 0(a0) # 'Ck' + sw a0, (a0) # 'Ck' + sw a0, 0(a0) # 'Ck' + lw a0, (sp) # 'Cm' + lw a0, 0(sp) # 'Cm' + sw a0, (sp) # 'CM' + sw a0, 0(sp) # 'CM' diff --git a/gas/testsuite/gas/riscv/riscv.exp b/gas/testsuite/gas/riscv/riscv.exp index 8a128ac..5ef92f5 100644 --- a/gas/testsuite/gas/riscv/riscv.exp +++ b/gas/testsuite/gas/riscv/riscv.exp @@ -26,4 +26,6 @@ if [istarget riscv*-*-*] { run_dump_test "c-addi16sp-fail" run_dump_test "satp" run_dump_test "eh-relocs" + run_dump_test "c-lw" + run_dump_test "c-ld" } |