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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 16:54:38 +0000 |
|---|---|---|
| committer | Matthew Wahab <matthew.wahab@arm.com> | 2015-12-14 16:54:38 +0000 |
| commit | f3aa142b8b04bfccef2cbc3233b565c2b3faa01a (patch) | |
| tree | c6da746e97aa275e59be5765c801cdd5791b7213 /gas/testsuite/ChangeLog | |
| parent | 6b4680fbd08221530ad3d541cd51a866eefef6fc (diff) | |
| download | gdb-f3aa142b8b04bfccef2cbc3233b565c2b3faa01a.zip gdb-f3aa142b8b04bfccef2cbc3233b565c2b3faa01a.tar.gz gdb-f3aa142b8b04bfccef2cbc3233b565c2b3faa01a.tar.bz2 | |
[AArch64][PATCH 4/14] Support FP16 Vector Two Register Misc. instructions.
ARMv8.2 adds 16-bit floating point operations as an optional extension
to the floating point and Adv.SIMD support. This patch adds FP16
instructions to the group Vector Two Register Misc, making them
available when +simd+fp16 is enabled.
The instructions added are: FCMGT, FCMGE, FCMEQ, FCMLE, FCMLT, FABS,
FNEG, FRINTN, FRINTA, FRINTP, FRINTM, FRINTX, FRINTZ, FRINTI, FCVTNS,
FCVTNU, FCVTPS, FCVTPU, FCVTMS, FCVTMU, FCVTZS, FCVTZU, FCVTAS, FCVTAU,
SCVTF, UCVTF, FRECPE, FRSQRTE and FSQRT.
The general form for these instructions is
<OP> <Vd>.<T>, <Vs>.<T>
where T is 4h or 8h.
gas/testsuite/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/advsimd-fp16.d: Update expected output.
* gas/aarch64/advsimd-fp16.s: Add tests for vector two register misc.
instructions.
opcodes/
2015-12-14 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
* aarch64-tbl.h (QL_V2SAMEH): New.
(aarch64_opcode_table): Add fp16 versions of frintn, frintm,
fcvtns, fcvtms, fcvtas, scvtf, fcmgt, fcmeq, fcmlt, fabs, frintp,
frintz, fcvtps, fcvtzs, frecpe, frinta, frintx, fcvtnu, fcvtmu,
fcvtau, ucvtf, fcmge, fcmle, fneg, frinti, fcvtpu, fcvtzu, frsqrte
and fsqrt to the vector register misc. group.
Change-Id: I0267511a7f7ea14247504d29fe4752e84c9af9ad
Diffstat (limited to 'gas/testsuite/ChangeLog')
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index d6e3e48..6a377c8 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,6 +1,12 @@ 2015-12-14 Matthew Wahab <matthew.wahab@arm.com> * gas/aarch64/advsimd-fp16.d: Update expected output. + * gas/aarch64/advsimd-fp16.s: Add tests for vector two register + misc. instructions. + +2015-12-14 Matthew Wahab <matthew.wahab@arm.com> + + * gas/aarch64/advsimd-fp16.d: Update expected output. * gas/aarch64/advsimd-fp16.s: Add tests for scalar three register same instructions. |