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authorNick Clifton <nickc@redhat.com>2020-10-05 10:40:07 +0100
committerNick Clifton <nickc@redhat.com>2020-10-05 10:40:07 +0100
commitb71702f1c01052b70b4fd8157982eadc2132fc24 (patch)
tree55fbf234a5e3fc887375ce3c3bcec983dce38417 /gas/NEWS
parent1ba0655539bcbde49171691582d5e804c3e4f975 (diff)
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GAS: Update the .section directive so that a numeric section index can be provided when the "o" flag is used.
PR 26253 gas * config/obj-elf.c (obj_elf_section): Accept a numeric value for the "o" section flag. Interpret it as a section index. Allow an index of zero. * doc/as.texi: Document the new behaviour. * NEWS: Mention the new feature. Tidy entries. * testsuite/gas/elf/sh-link-zero.s: New test. * testsuite/gas/elf/sh-link-zero.d: New test driver. * testsuite/gas/elf/elf.exp: Run the new test. * testsuite/gas/elf/section21.l: Updated expected assembler output. bfd * elf.c (_bfd_elf_setup_sections): Do not complain about an sh_link value of zero when the SLF_LINK_ORDER flag is set. (assign_section_numbers): Likewise.
Diffstat (limited to 'gas/NEWS')
-rw-r--r--gas/NEWS21
1 files changed, 6 insertions, 15 deletions
diff --git a/gas/NEWS b/gas/NEWS
index 8394f74..8f83beb 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -1,21 +1,12 @@
-*- text -*-
-* Add support for Cortex-A78 and Cortex-A78AE for ARM.
+* When setting the link order attribute of ELF sections, it is now possible to
+ use a numeric section index instead of symbol name.
-* Add support for Cortex-A78 and Cortex-A78AE for AArch64.
+* Add support for Cortex-A78, Cortex-A78AE and Cortex-X1 for AArch64 and ARM.
+ Add support for Cortex-R82, Neoverse V1, and Neoverse N2 for ARM.
-* Add support for ETMv4 (Embedded Trace Macrocell) system registers for
- AArch64.
-
-* Add support for ETE (Embedded Trace Extension) system registers for AArch64.
-
-* Add support for TRBE (Trace Buffer Extension) system registers for AArch64.
-
-* Add support for Cortex-X1 for AArch64.
-
-* Add support for Cortex-X1 for ARM.
-
-* Add support for Arm's Cortex-R82, Neoverse V1, and Neoverse N2
- processors.
+* Add support for ETMv4 (Embedded Trace Macrocell), ETE (Embedded Trace
+ Extension) and TRBE (Trace Buffer Extension) system registers for AArch64.
* Add support for Armv8-R AArch64.