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authorDoug Evans <dje@google.com>2010-02-12 04:38:21 +0000
committerDoug Evans <dje@google.com>2010-02-12 04:38:21 +0000
commit5ff58fb071f5d3d4ee7572af1221cdf80d10f4e8 (patch)
tree4567802d74329b8f4627486d88507faedf4d9ed3 /cpu
parent93ceb76464b573cae4b2f94d3dd36665b3174628 (diff)
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* m32r.cpu (HASH-PREFIX): Delete.
(duhpo, dshpo): New pmacros. (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX attribute, define with dshpo. (uimm24): Delete HASH-PREFIX attribute. * m32r.opc (CGEN_PRINT_NORMAL): Delete. (print_signed_with_hash_prefix): New function. (print_unsigned_with_hash_prefix): New function. * xc16x.cpu (dowh): New pmacro. (upof16): Define with dowh, specify print handler. (qbit, qlobit, qhibit): Ditto. (upag16): Ditto. * xc16x.opc (CGEN_PRINT_NORMAL): Delete. (print_with_dot_prefix): New functions. (print_with_pof_prefix, print_with_pag_prefix): New functions.
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ChangeLog19
-rw-r--r--cpu/m32r.cpu48
-rw-r--r--cpu/m32r.opc41
-rw-r--r--cpu/xc16x.cpu19
-rw-r--r--cpu/xc16x.opc67
5 files changed, 150 insertions, 44 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 939544c..975feea 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,22 @@
+2010-02-11 Doug Evans <dje@sebabeach.org>
+
+ * m32r.cpu (HASH-PREFIX): Delete.
+ (duhpo, dshpo): New pmacros.
+ (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
+ (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
+ attribute, define with dshpo.
+ (uimm24): Delete HASH-PREFIX attribute.
+ * m32r.opc (CGEN_PRINT_NORMAL): Delete.
+ (print_signed_with_hash_prefix): New function.
+ (print_unsigned_with_hash_prefix): New function.
+ * xc16x.cpu (dowh): New pmacro.
+ (upof16): Define with dowh, specify print handler.
+ (qbit, qlobit, qhibit): Ditto.
+ (upag16): Ditto.
+ * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
+ (print_with_dot_prefix): New functions.
+ (print_with_pof_prefix, print_with_pag_prefix): New functions.
+
2010-01-24 Doug Evans <dje@sebabeach.org>
* frv.cpu (floating-point-conversion): Update call to fp conv op.
diff --git a/cpu/m32r.cpu b/cpu/m32r.cpu
index e24fc3d..003c848 100644
--- a/cpu/m32r.cpu
+++ b/cpu/m32r.cpu
@@ -638,13 +638,21 @@
; code. Usually there's a bit of over-specification, but in more complicated
; instruction sets there isn't.
-; M32R specific operand attributes:
+;; Print some operands take a hash prefix.
+;; ??? Why don't we also handle one when parsing?
-(define-attr
- (for operand)
- (type boolean)
- (name HASH-PREFIX)
- (comment "immediates have an optional '#' prefix")
+(define-pmacro (duhpo x-name x-comment x-attrs x-type x-index)
+ (define-operand (name x-name) (comment x-comment)
+ (.splice attrs (.unsplice x-attrs))
+ (type x-type) (index x-index)
+ (handlers (print "unsigned_with_hash_prefix")))
+)
+
+(define-pmacro (dshpo x-name x-comment x-attrs x-type x-index)
+ (define-operand (name x-name) (comment x-comment)
+ (.splice attrs (.unsplice x-attrs))
+ (type x-type) (index x-index)
+ (handlers (print "signed_with_hash_prefix")))
)
; ??? Convention says this should be o-sr, but then the insn definitions
@@ -662,21 +670,23 @@
(dnop scr "source control register" () h-cr f-r2)
(dnop dcr "destination control register" () h-cr f-r1)
-(dnop simm8 "8 bit signed immediate" (HASH-PREFIX) h-sint f-simm8)
-(dnop simm16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-simm16)
-(dnop uimm3 "3 bit unsigned number" (HASH-PREFIX) h-uint f-uimm3)
-(dnop uimm4 "4 bit trap number" (HASH-PREFIX) h-uint f-uimm4)
-(dnop uimm5 "5 bit shift count" (HASH-PREFIX) h-uint f-uimm5)
-(dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8)
-(dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16)
+(dshpo simm8 "8 bit signed immediate" () h-sint f-simm8)
+(dshpo simm16 "16 bit signed immediate" () h-sint f-simm16)
+(duhpo uimm3 "3 bit unsigned number" () h-uint f-uimm3)
+(duhpo uimm4 "4 bit trap number" () h-uint f-uimm4)
+(duhpo uimm5 "5 bit shift count" () h-uint f-uimm5)
+(duhpo uimm8 "8 bit unsigned immediate" () h-uint f-uimm8)
+(duhpo uimm16 "16 bit unsigned immediate" () h-uint f-uimm16)
+
+(duhpo imm1 "1 bit immediate" ((MACH m32rx,m32r2)) h-uint f-imm1)
-(dnop imm1 "1 bit immediate" ((MACH m32rx,m32r2) HASH-PREFIX) h-uint f-imm1)
-(dnop accd "accumulator destination register" ((MACH m32rx,m32r2)) h-accums f-accd)
-(dnop accs "accumulator source register" ((MACH m32rx,m32r2)) h-accums f-accs)
-(dnop acc "accumulator reg (d)" ((MACH m32rx,m32r2)) h-accums f-acc)
+(dnop accd "accumulator destination register" ((MACH m32rx,m32r2)) h-accums f-accd)
+(dnop accs "accumulator source register" ((MACH m32rx,m32r2)) h-accums f-accs)
+(dnop acc "accumulator reg (d)" ((MACH m32rx,m32r2)) h-accums f-acc)
; slo16,ulo16 are used in both with-hash-prefix/no-hash-prefix cases.
-; e.g. add3 r3,r3,#1 and ld r3,@(4,r4). We could use HASH-PREFIX.
+; e.g. add3 r3,r3,#1 and ld r3,@(4,r4). We could use special handlers on
+; the operands themselves.
; Instead we create a fake operand `hash'. The m32r is an illustration port,
; so we often try out various ways of doing things.
@@ -716,7 +726,7 @@
(handlers (parse "ulo16"))
)
-(dnop uimm24 "24 bit address" (HASH-PREFIX) h-addr f-uimm24)
+(dnop uimm24 "24 bit address" () h-addr f-uimm24)
(define-operand
(name disp8)
diff --git a/cpu/m32r.opc b/cpu/m32r.opc
index 3100fee..30e0956 100644
--- a/cpu/m32r.opc
+++ b/cpu/m32r.opc
@@ -238,15 +238,38 @@ parse_ulo16 (CGEN_CPU_DESC cd,
/* -- */
/* -- dis.c */
-/* Immediate values are prefixed with '#'. */
-
-#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
- do \
- { \
- if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
- (*info->fprintf_func) (info->stream, "#"); \
- } \
- while (0)
+
+/* Print signed operands with '#' prefixes. */
+
+static void
+print_signed_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ (*info->fprintf_func) (info->stream, "#");
+ (*info->fprintf_func) (info->stream, "%ld", value);
+}
+
+/* Print unsigned operands with '#' prefixes. */
+
+static void
+print_unsigned_with_hash_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned int attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ (*info->fprintf_func) (info->stream, "#");
+ (*info->fprintf_func) (info->stream, "0x%lx", value);
+}
/* Handle '#' prefixes as operands. */
diff --git a/cpu/xc16x.cpu b/cpu/xc16x.cpu
index 1d2057a..4903b81 100644
--- a/cpu/xc16x.cpu
+++ b/cpu/xc16x.cpu
@@ -528,6 +528,15 @@
(comment "segment")
)
+;; Define an operand that takes a set of handlers.
+;; dowh: define-operand-with-handlers
+(define-pmacro (dowh x-name x-comment x-attrs x-type x-index x-handlers)
+ (define-operand (name x-name) (comment x-comment)
+ (.splice attrs (.unsplice x-attrs))
+ (type x-type) (index x-index)
+ (.splice handlers (.unsplice x-handlers)))
+)
+
(dnop sr "source register" () h-gr f-r2)
(dnop dr "destination register" () h-gr f-r1)
(dnop dri "destination register" () h-gr f-r4)
@@ -544,7 +553,7 @@
(dnop uimm7 "7 bit trap number" (HASH-PREFIX) h-uint f-uimm7)
(dnop uimm8 "8 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm8)
(dnop uimm16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-uimm16)
-(dnop upof16 "16 bit unsigned immediate" (POF-PREFIX) h-addr f-memory)
+(dowh upof16 "16 bit unsigned immediate" (POF-PREFIX) h-addr f-memory ((print "with_pof_prefix")))
(dnop reg8 "8 bit word register number" () h-r8 f-reg8)
(dnop regmem8 "8 bit word register number" () h-regmem8 f-regmem8)
(dnop regbmem8 "8 bit byte register number" () h-regbmem8 f-regmem8)
@@ -573,16 +582,16 @@
(dnop memory "16 bit memory" () h-addr f-memory)
(dnop memgr8 "16 bit memory" () h-memgr8 f-memgr8)
(dnop cbit "carry bit" (SEM-ONLY) h-cbit f-nil)
-(dnop qbit "bit addr" (DOT-PREFIX) h-uint f-qbit)
-(dnop qlobit "bit addr" (DOT-PREFIX) h-uint f-qlobit)
-(dnop qhibit "bit addr" (DOT-PREFIX) h-uint f-qhibit)
+(dowh qbit "bit addr" (DOT-PREFIX) h-uint f-qbit ((print "with_dot_prefix")))
+(dowh qlobit "bit addr" (DOT-PREFIX) h-uint f-qlobit ((print "with_dot_prefix")))
+(dowh qhibit "bit addr" (DOT-PREFIX) h-uint f-qhibit ((print "with_dot_prefix")))
(dnop mask8 "8 bit mask" (HASH-PREFIX) h-uint f-mask8)
(dnop masklo8 "8 bit mask" (HASH-PREFIX) h-uint f-datahi8)
(dnop pagenum "10 bit page number" (HASH-PREFIX) h-uint f-pagenum)
(dnop data8 "8 bit data" (HASH-PREFIX) h-uint f-data8)
(dnop datahi8 "8 bit data" (HASH-PREFIX) h-uint f-datahi8)
(dnop sgtdisbit "segmentation enable bit" (SEM-ONLY) h-sgtdis f-nil)
-(dnop upag16 "16 bit unsigned immediate" (PAG-PREFIX) h-uint f-uimm16)
+(dowh upag16 "16 bit unsigned immediate" (PAG-PREFIX) h-uint f-uimm16 ((print "with_pag_prefix")))
(dnop useg8 "8 bit segment " (SEG-PREFIX) h-uint f-seg8)
(dnop useg16 "16 bit address offset" (SEG-PREFIX) h-uint f-offset16)
(dnop usof16 "16 bit address offset" (SOF-PREFIX) h-uint f-offset16)
diff --git a/cpu/xc16x.opc b/cpu/xc16x.opc
index 455f3fb..47b7c69 100644
--- a/cpu/xc16x.opc
+++ b/cpu/xc16x.opc
@@ -149,17 +149,62 @@ parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
/* -- dis.c */
-#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
- do \
- { \
- if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_DOT_PREFIX)) \
- info->fprintf_func (info->stream, "."); \
- if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_POF_PREFIX)) \
- info->fprintf_func (info->stream, "#pof:"); \
- if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_PAG_PREFIX)) \
- info->fprintf_func (info->stream, "#pag:"); \
- } \
- while (0)
+/* Print an operand with a "." prefix.
+ NOTE: This prints the operand in hex.
+ ??? This exists to maintain disassembler compatibility with previous
+ versions. Ideally we'd print the "." in print_dot. */
+
+static void
+print_with_dot_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, ".");
+ info->fprintf_func (info->stream, "0x%lx", value);
+}
+
+/* Print an operand with a "#pof:" prefix.
+ NOTE: This prints the operand as an address.
+ ??? This exists to maintain disassembler compatibility with previous
+ versions. Ideally we'd print "#pof:" in print_pof. */
+
+static void
+print_with_pof_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ bfd_vma value,
+ unsigned attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "#pof:");
+ info->fprintf_func (info->stream, "0x%lx", (long) value);
+}
+
+/* Print an operand with a "#pag:" prefix.
+ NOTE: This prints the operand in hex.
+ ??? This exists to maintain disassembler compatibility with previous
+ versions. Ideally we'd print "#pag:" in print_pag. */
+
+static void
+print_with_pag_prefix (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+ void * dis_info,
+ long value,
+ unsigned attrs ATTRIBUTE_UNUSED,
+ bfd_vma pc ATTRIBUTE_UNUSED,
+ int length ATTRIBUTE_UNUSED)
+{
+ disassemble_info *info = (disassemble_info *) dis_info;
+
+ info->fprintf_func (info->stream, "#pag:");
+ info->fprintf_func (info->stream, "0x%lx", value);
+}
/* Print a 'pof:' prefix to an operand. */