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authorNick Clifton <nickc@redhat.com>2013-03-08 17:25:12 +0000
committerNick Clifton <nickc@redhat.com>2013-03-08 17:25:12 +0000
commit87a8d6cbe0768ba278220a71b2ecb02e441f7403 (patch)
tree14db34d809a65a4cc794bfec962f5891f83fed33 /cpu/lm32.cpu
parentabb3f6cca7cd9d8ab574d252cab8e64928d7c40f (diff)
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PR binutils/15241
* lm32.cpu (Control and status registers): Add CFG2, PSW, TLBVADDR, TLBPADDR and TLBBADVADDR. * lm32-desc.c: Regenerate.
Diffstat (limited to 'cpu/lm32.cpu')
-rw-r--r--cpu/lm32.cpu4
1 files changed, 3 insertions, 1 deletions
diff --git a/cpu/lm32.cpu b/cpu/lm32.cpu
index 31b943d..83c839f 100644
--- a/cpu/lm32.cpu
+++ b/cpu/lm32.cpu
@@ -1,5 +1,5 @@
; Lattice Mico32 CPU description. -*- Scheme -*-
-; Copyright 2008, 2009 Free Software Foundation, Inc.
+; Copyright 2008-2013 Free Software Foundation, Inc.
; Contributed by Jon Beniston <jon@beniston.com>
;
; This file is part of the GNU Binutils.
@@ -101,9 +101,11 @@
(EBA 7)
(DC 8)
(DEBA 9)
+ (CFG2 10)
(JTX 14) (JRX 15)
(BP0 16) (BP1 17) (BP2 18) (BP3 19)
(WP0 24) (WP1 25) (WP2 26) (WP3 27)
+ (PSW 29) (TLBVADDR 30) (TLBPADDR 31) (TLBBADVADDR 31)
)
)
() ()