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authorRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 09:26:33 +0000
committerRichard Sandiford <rdsandiford@googlemail.com>2004-03-01 09:26:33 +0000
commit8ae0baa2685df96375cc43b44b5632044288f74a (patch)
treef66d697cb45e2fb7bb61ddd1e25047cfd75f4e65 /cpu/frv.cpu
parent3ce2bf1815f79e33ffbcebcf7da5f6896536f390 (diff)
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cpu/
* frv.cpu (r-store, r-store-dual, r-store-quad): Delete. (rstb, rsth, rst, rstd, rstq): Delete. (rstbf, rsthf, rstf, rstdf, rstqf): Delete. gas/testsuite/ * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops. (rstbf, rsthf, rstf, rstdf, rstqf): Likewise. * gas/frv/allinsn.d: Update accordingly. opcodes/ * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate. sim/frv/ * decode.c, decode.h, model.c, sem.c: Regenerate. sim/testsuite/ * sim/frv/{rstb,rsth,rst,rstd,rstq}.cgs: Delete. * sim/frv/{rstbf,rsthf,rstf,rstdf,rstqf}.cgs: Delete.
Diffstat (limited to 'cpu/frv.cpu')
-rw-r--r--cpu/frv.cpu69
1 files changed, 0 insertions, 69 deletions
diff --git a/cpu/frv.cpu b/cpu/frv.cpu
index 28e7833..238575f 100644
--- a/cpu/frv.cpu
+++ b/cpu/frv.cpu
@@ -4469,36 +4469,6 @@
(store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word")
-(define-pmacro (r-store name mode op ope reg size is_float profile comment)
- (dni name
- (comment)
- ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv))
- (.str name "$pack $" reg "k,@($GRi,$GRj)")
- (+ pack (.sym reg k) op GRi ope GRj)
- (sequence ((WI address))
- (set address (add GRi GRj))
- (c-call VOID (.str "@cpu@_write_mem_" mode)
- pc address (.sym reg k))
- (c-call VOID "@cpu@_check_recovering_store"
- address (index-of (.sym reg k)) size is_float))
- profile
- )
-)
-
-(r-store rstb QI OP_03 OPE1_20 GR 1 0
- ((fr500 (unit u-gr-r-store))) "Store unsigned byte")
-(r-store rsth HI OP_03 OPE1_21 GR 2 0
- ((fr500 (unit u-gr-r-store))) "Store unsigned half")
-(r-store rst SI OP_03 OPE1_22 GR 4 0
- ((fr500 (unit u-gr-r-store))) "Store word")
-
-(r-store rstbf QI OP_03 OPE1_28 FRint 1 1
- ((fr500 (unit u-fr-r-store))) "Store byte float")
-(r-store rsthf HI OP_03 OPE1_29 FRint 2 1
- ((fr500 (unit u-fr-r-store))) "Store half float")
-(r-store rstf SI OP_03 OPE1_2A FRint 4 1
- ((fr500 (unit u-fr-r-store))) "Store word float")
-
; Semantics for a store-double insn
;
(define-pmacro (store-double-semantics mode regtype address arg)
@@ -4530,26 +4500,6 @@
(store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv)
() "Store coprocessor double word")
-(define-pmacro (r-store-double
- name mode op ope regtype is_float attr profile comment)
- (dni name
- (comment)
- ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
- (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
- (+ pack (.sym regtype doublek) op GRi ope GRj)
- (sequence ((WI address))
- (store-double-semantics mode regtype address GRj)
- (c-call VOID "@cpu@_check_recovering_store"
- address (index-of (.sym regtype doublek)) 8 is_float))
- profile
- )
-)
-
-(r-store-double rstd DI OP_03 OPE1_23 GR 0 NA
- ((fr500 (unit u-gr-r-store))) "Store double word")
-(r-store-double rstdf DF OP_03 OPE1_2B FR 1 FR-ACCESS
- ((fr500 (unit u-fr-r-store))) "Store double float")
-
; Semantics for a store-quad insn
;
(define-pmacro (store-quad-semantics regtype address arg)
@@ -4579,25 +4529,6 @@
(store-quad-r-r stqc OP_03 OPE1_27 CPR NA
() "Store coprocessor quad word")
-(define-pmacro (r-store-quad name op ope regtype is_float attr profile comment)
- (dni name
- (comment)
- ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
- (.str name "$pack $" regtype "k,@($GRi,$GRj)")
- (+ pack (.sym regtype k) op GRi ope GRj)
- (sequence ((WI address))
- (store-quad-semantics regtype address GRj)
- (c-call VOID "@cpu@_check_recovering_store"
- address (index-of (.sym regtype k)) 16 is_float))
- profile
- )
-)
-
-(r-store-quad rstq OP_03 OPE1_24 GR 0 NA
- ((fr500 (unit u-gr-r-store))) "Store quad word")
-(r-store-quad rstqf OP_03 OPE1_2C FRint 1 FR-ACCESS
- ((fr500 (unit u-fr-r-store))) "Store quad float")
-
(define-pmacro (store-r-r-u name mode op ope regtype attr profile comment)
(dni name
(comment)