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authorKazu Hirata <kazu@codesourcery.com>2001-01-23 11:45:53 +0000
committerKazu Hirata <kazu@codesourcery.com>2001-01-23 11:45:53 +0000
commitb653e1b1521ac68fc398311345fe7df54803f1ec (patch)
treef9e78fc2031a775e9deacd975271d7c136ffb59e /bfd
parent70256ad8ae2e7d73d603434bb2144912de0e9d89 (diff)
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2001-01-23 Kazu Hirata <kazu@hxi.com>
* coff64-rs6000.c: Fix formatting. * coff-arm.c: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coff-mcore.c: Likewise. * coff-mips.c: Likewise. * coff-pmac.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * elf32.c: Likewise. * elf32-fr30.c: Likewise. * elf32-i370.c: Likewise. * elf32-i860.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-ppc.c: Likewise. * elf32-sh.c: Likewise. * elf32-v850.c: Likewise. * elf64-alpha.c: Likewise. * elf64-sparc.c: Likewise. * elflink.c: Likewise. * elflink.h: Likewise. * elf-m10200.c: Likewise. * elf-m10300.c: Likewise. * elfxx-ia64.c: Likewise.
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog29
-rw-r--r--bfd/coff-arm.c2
-rw-r--r--bfd/coff-mcore.c4
-rw-r--r--bfd/coff-mips.c1
-rw-r--r--bfd/coff-pmac.c1
-rw-r--r--bfd/coff-ppc.c15
-rw-r--r--bfd/coff-rs6000.c3
-rw-r--r--bfd/coff64-rs6000.c1
-rw-r--r--bfd/coffgen.c1
-rw-r--r--bfd/cofflink.c1
-rw-r--r--bfd/elf-m10200.c1
-rw-r--r--bfd/elf-m10300.c1
-rw-r--r--bfd/elf32-fr30.c2
-rw-r--r--bfd/elf32-i370.c12
-rw-r--r--bfd/elf32-i860.c3
-rw-r--r--bfd/elf32-m32r.c2
-rw-r--r--bfd/elf32-m68k.c1
-rw-r--r--bfd/elf32-mcore.c3
-rw-r--r--bfd/elf32-ppc.c4
-rw-r--r--bfd/elf32-sh.c1
-rw-r--r--bfd/elf32-v850.c8
-rw-r--r--bfd/elf32.c1
-rw-r--r--bfd/elf64-alpha.c1
-rw-r--r--bfd/elf64-sparc.c2
-rw-r--r--bfd/elflink.c4
-rw-r--r--bfd/elflink.h5
-rw-r--r--bfd/elfxx-ia64.c1
27 files changed, 29 insertions, 81 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index e1e2ec5..c584b2c 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,32 @@
+2001-01-23 Kazu Hirata <kazu@hxi.com>
+
+ * coff64-rs6000.c: Fix formatting.
+ * coff-arm.c: Likewise.
+ * coffgen.c: Likewise.
+ * cofflink.c: Likewise.
+ * coff-mcore.c: Likewise.
+ * coff-mips.c: Likewise.
+ * coff-pmac.c: Likewise.
+ * coff-ppc.c: Likewise.
+ * coff-rs6000.c: Likewise.
+ * elf32.c: Likewise.
+ * elf32-fr30.c: Likewise.
+ * elf32-i370.c: Likewise.
+ * elf32-i860.c: Likewise.
+ * elf32-m32r.c: Likewise.
+ * elf32-m68k.c: Likewise.
+ * elf32-mcore.c: Likewise.
+ * elf32-ppc.c: Likewise.
+ * elf32-sh.c: Likewise.
+ * elf32-v850.c: Likewise.
+ * elf64-alpha.c: Likewise.
+ * elf64-sparc.c: Likewise.
+ * elflink.c: Likewise.
+ * elflink.h: Likewise.
+ * elf-m10200.c: Likewise.
+ * elf-m10300.c: Likewise.
+ * elfxx-ia64.c: Likewise.
+
2001-01-22 Bo Thorsen <bo@suse.de>
* elf64-x86-64.c: Added PIC support for X86-64.
diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c
index 14c6365..7ec7b8e 100644
--- a/bfd/coff-arm.c
+++ b/bfd/coff-arm.c
@@ -992,7 +992,6 @@ insert_thumb_branch (br_insn, rel_off)
return br_insn;
}
-
static struct coff_link_hash_entry *
find_thumb_glue (info, name, input_bfd)
@@ -2550,4 +2549,3 @@ extern const bfd_target TARGET_BIG_SYM ;
/* Target vectors. */
CREATE_LITTLE_COFF_TARGET_VEC (TARGET_LITTLE_SYM, TARGET_LITTLE_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_BIG_SYM)
CREATE_BIG_COFF_TARGET_VEC (TARGET_BIG_SYM, TARGET_BIG_NAME, D_PAGED, EXTRA_S_FLAGS, TARGET_UNDERSCORE, & TARGET_LITTLE_SYM)
-
diff --git a/bfd/coff-mcore.c b/bfd/coff-mcore.c
index edd1a90..f5763b5 100644
--- a/bfd/coff-mcore.c
+++ b/bfd/coff-mcore.c
@@ -65,7 +65,6 @@ static reloc_howto_type * coff_mcore_rtype_to_howto
/* In case we're on a 32-bit machine, construct a 64-bit "-1" value
from smaller values. Start with zero, widen, *then* decrement. */
#define MINUS_ONE (((bfd_vma)0) - 1)
-
static reloc_howto_type mcore_coff_howto_table[] =
{
@@ -283,7 +282,6 @@ mcore_coff_unsupported_reloc (abfd, reloc_entry, symbol, data, input_section,
return bfd_reloc_notsupported;
}
-
/* A cheesy little macro to make the code a little more readable. */
#define HOW2MAP(bfd_rtype, mcore_rtype) \
@@ -361,7 +359,6 @@ in_reloc_p (abfd, howto)
{
return ! howto->pc_relative && howto->type != IMAGE_REL_MCORE_RVA;
}
-
/* The reloc processing routine for the optimized COFF linker. */
static boolean
@@ -560,7 +557,6 @@ coff_mcore_relocate_section (output_bfd, info, input_bfd, input_section,
return true;
}
-
/* Tailor coffcode.h -- macro heaven. */
diff --git a/bfd/coff-mips.c b/bfd/coff-mips.c
index cf884c5..5634ca5 100644
--- a/bfd/coff-mips.c
+++ b/bfd/coff-mips.c
@@ -115,7 +115,6 @@ static boolean mips_relax_pcrel16 PARAMS ((struct bfd_link_info *, bfd *,
bfd_byte *, bfd_vma));
static reloc_howto_type *mips_bfd_reloc_type_lookup
PARAMS ((bfd *, bfd_reloc_code_real_type));
-
/* ECOFF has COFF sections, but the debugging information is stored in
a completely different format. ECOFF targets use some of the
diff --git a/bfd/coff-pmac.c b/bfd/coff-pmac.c
index 9ae9791..1d68158 100644
--- a/bfd/coff-pmac.c
+++ b/bfd/coff-pmac.c
@@ -31,4 +31,3 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "coff/rs6000.h"
#include "libcoff.h"
#include "xcoff-target.h"
-
diff --git a/bfd/coff-ppc.c b/bfd/coff-ppc.c
index 2fd4731..798399d 100644
--- a/bfd/coff-ppc.c
+++ b/bfd/coff-ppc.c
@@ -218,7 +218,6 @@ ppc_coff_link_hash_table_create (abfd)
/* Now, tailor coffcode.h to use our hash stuff */
#define coff_bfd_link_hash_table_create ppc_coff_link_hash_table_create
-
/* The nt loader points the toc register to &toc + 32768, in order to */
/* use the complete range of a 16-bit displacement. We have to adjust */
@@ -316,7 +315,6 @@ ppc_coff_link_hash_table_create (abfd)
#define EXTRACT_FLAGS(x) ((x) & IMAGE_REL_PPC_FLAGMASK)
#define EXTRACT_JUNK(x) \
((x) & ~(IMAGE_REL_PPC_TYPEMASK | IMAGE_REL_PPC_FLAGMASK))
-
/* static helper functions to make relocation work */
/* (Work In Progress) */
@@ -344,7 +342,6 @@ static bfd_reloc_status_type ppc_pair_reloc PARAMS ((bfd *abfd,
asection *section,
bfd *output_bfd,
char **error));
-
static bfd_reloc_status_type ppc_toc16_reloc PARAMS ((bfd *abfd,
arelent *reloc,
@@ -388,7 +385,6 @@ static bfd_reloc_status_type ppc_imglue_reloc PARAMS ((bfd *abfd,
char **error));
static boolean in_reloc_p PARAMS((bfd *abfd, reloc_howto_type *howto));
-
/* FIXME: It'll take a while to get through all of these. I only need a few to
get us started, so those I'll make sure work. Those marked FIXME are either
@@ -769,9 +765,7 @@ static reloc_howto_type ppc_coff_howto_table[] =
false), /* pcrel_offset */
};
-
-
/* Some really cheezy macros that can be turned on to test stderr :-) */
#ifdef DEBUG_RELOC
@@ -814,7 +808,6 @@ static reloc_howto_type ppc_coff_howto_table[] =
#define DUMP_RELOC(n,r)
#define DUMP_RELOC2(n,r)
#endif
-
/* toc construction and management routines */
@@ -994,7 +987,6 @@ ppc_mark_symbol_as_glue(abfd, sym, rel)
#endif /* COFF_IMAGE_WITH_PE */
-
/* Return true if this relocation should
appear in the output .reloc section. */
@@ -1865,7 +1857,6 @@ ppc_pair_reloc (abfd,
return bfd_reloc_undefined;
}
-
static bfd_reloc_status_type
ppc_toc16_reloc (abfd,
@@ -2000,9 +1991,7 @@ ppc_imglue_reloc (abfd,
return bfd_reloc_ok;
}
-
-
#define MAX_RELOC_INDEX \
(sizeof (ppc_coff_howto_table) / sizeof (ppc_coff_howto_table[0]) - 1)
@@ -2183,7 +2172,6 @@ ppc_coff_reloc_type_lookup (abfd, code)
}
#undef HOW2MAP
-
/* Tailor coffcode.h -- macro heaven. */
@@ -2229,9 +2217,7 @@ static void ppc_coff_swap_sym_in_hook PARAMS ((bfd *, PTR, PTR));
COFF_ALIGNMENT_FIELD_EMPTY, COFF_ALIGNMENT_FIELD_EMPTY, 1 }
#include "coffcode.h"
-
-
#ifndef COFF_IMAGE_WITH_PE
/* FIXME:
What we're trying to do here is allocate a toc section (early), and attach
@@ -2826,7 +2812,6 @@ ppc_bfd_coff_final_link (abfd, info)
}
#endif
-
/* Forward declaration for use by alternative_target field. */
#ifdef TARGET_BIG_SYM
extern const bfd_target TARGET_BIG_SYM;
diff --git a/bfd/coff-rs6000.c b/bfd/coff-rs6000.c
index da0e147..76e58ea 100644
--- a/bfd/coff-rs6000.c
+++ b/bfd/coff-rs6000.c
@@ -130,7 +130,6 @@ _bfd_xcoff_is_local_label_name (abfd, name)
return false;
}
-
void
_bfd_xcoff_swap_sym_in (abfd, ext1, in1)
bfd *abfd;
@@ -402,7 +401,6 @@ _bfd_xcoff_swap_aux_out (abfd, inp, type, class, indx, numaux, extp)
end:
return bfd_coff_auxesz (abfd);
}
-
/* The XCOFF reloc table. Actually, XCOFF relocations specify the
bitsize and whether they are signed or not, along with a
@@ -872,7 +870,6 @@ _bfd_xcoff_reloc_type_lookup (abfd, code)
return NULL;
}
}
-
/* XCOFF archive support. The original version of this code was by
Damon A. Permezel. It was enhanced to permit cross support, and
diff --git a/bfd/coff64-rs6000.c b/bfd/coff64-rs6000.c
index 913b2f7..64fd39b 100644
--- a/bfd/coff64-rs6000.c
+++ b/bfd/coff64-rs6000.c
@@ -349,4 +349,3 @@ end:
#define TARGET_SYM rs6000coff64_vec
#include "xcoff-target.h"
-
diff --git a/bfd/coffgen.c b/bfd/coffgen.c
index 35ac1b9..49b43ed 100644
--- a/bfd/coffgen.c
+++ b/bfd/coffgen.c
@@ -2455,4 +2455,3 @@ bfd_coff_set_symbol_class (abfd, symbol, class)
return true;
}
-
diff --git a/bfd/cofflink.c b/bfd/cofflink.c
index 91de3d0..223ccbf 100644
--- a/bfd/cofflink.c
+++ b/bfd/cofflink.c
@@ -3018,4 +3018,3 @@ _bfd_coff_generic_relocate_section (output_bfd, info, input_bfd,
}
return true;
}
-
diff --git a/bfd/elf-m10200.c b/bfd/elf-m10200.c
index acdb3dd..0053e0e 100644
--- a/bfd/elf-m10200.c
+++ b/bfd/elf-m10200.c
@@ -318,7 +318,6 @@ mn10200_elf_final_link_relocate (howto, input_bfd, output_bfd,
return bfd_reloc_notsupported;
}
}
-
/* Relocate an MN10200 ELF section. */
static boolean
diff --git a/bfd/elf-m10300.c b/bfd/elf-m10300.c
index ac320d6..9208857 100644
--- a/bfd/elf-m10300.c
+++ b/bfd/elf-m10300.c
@@ -526,7 +526,6 @@ mn10300_elf_final_link_relocate (howto, input_bfd, output_bfd,
return bfd_reloc_notsupported;
}
}
-
/* Relocate an MN10300 ELF section. */
static boolean
diff --git a/bfd/elf32-fr30.c b/bfd/elf32-fr30.c
index 6b457b3..0339b0a 100644
--- a/bfd/elf32-fr30.c
+++ b/bfd/elf32-fr30.c
@@ -283,7 +283,6 @@ fr30_elf_i20_reloc (abfd, reloc_entry, symbol, data,
return bfd_reloc_ok;
}
-
/* Utility to actually perform a R_FR30_48 reloc. */
@@ -460,7 +459,6 @@ fr30_final_link_relocate (howto, input_bfd, input_section, contents, rel, reloca
return r;
}
-
/* Relocate an FR30 ELF section.
There is some attempt to make this function usable for many architectures,
diff --git a/bfd/elf32-i370.c b/bfd/elf32-i370.c
index d5b060e..b8afdba 100644
--- a/bfd/elf32-i370.c
+++ b/bfd/elf32-i370.c
@@ -58,7 +58,6 @@ enum i370_reloc_type
R_I370_max
};
-
static reloc_howto_type *i370_elf_howto_table[ (int)R_I370_max ];
@@ -251,13 +250,11 @@ static reloc_howto_type i370_elf_howto_raw[] =
false), /* pcrel_offset */
};
-
static void i370_elf_howto_init PARAMS ((void));
static void i370_elf_info_to_howto PARAMS ((bfd *abfd, arelent *cache_ptr,
Elf32_Internal_Rela *dst));
static boolean i370_elf_set_private_flags PARAMS ((bfd *, flagword));
-
/* Initialize the i370_elf_howto_table, so that linear accesses can be done. */
@@ -273,7 +270,6 @@ i370_elf_howto_init ()
i370_elf_howto_table[type] = &i370_elf_howto_raw[i];
}
}
-
static reloc_howto_type *
i370_elf_reloc_type_lookup (abfd, code)
@@ -434,7 +430,6 @@ i370_elf_merge_private_bfd_data (ibfd, obfd)
return true;
}
-
/* Handle an i370 specific section when reading an object file. This
is called when elfcode.h finds a section with an unknown type. */
@@ -466,7 +461,6 @@ i370_elf_section_from_shdr (abfd, hdr, name)
bfd_set_section_flags (abfd, newsect, flags);
return true;
}
-
/* Set up any other section flags and such that may be necessary. */
/* XXX hack alert bogus This routine is mostly all junk and almost
@@ -488,7 +482,6 @@ i370_elf_fake_sections (abfd, shdr, asect)
return true;
}
-
#if 0
/* Create a special linker section */
@@ -735,7 +728,6 @@ i370_elf_adjust_dynamic_symbol (info, h)
return true;
}
-
/* Increment the index of a dynamic symbol by a given amount. Called
via elf_link_hash_traverse. */
@@ -762,7 +754,6 @@ i370_elf_adjust_dynindx (h, cparg)
return true;
}
-
/* Set the sizes of the dynamic sections. */
/* XXX hack alert bogus This routine is mostly all junk and almost
@@ -995,7 +986,6 @@ i370_elf_size_dynamic_sections (output_bfd, info)
return true;
}
-
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table or procedure linkage
@@ -1100,7 +1090,6 @@ i370_elf_check_relocs (abfd, info, sec, relocs)
return true;
}
-
/* Finish up the dynamic sections. */
/* XXX hack alert bogus This routine is mostly all junk and almost
@@ -1241,7 +1230,6 @@ i370_elf_finish_dynamic_sections (output_bfd, info)
return true;
}
-
/* The RELOCATE_SECTION function is called by the ELF backend linker
to handle the relocations for a section.
diff --git a/bfd/elf32-i860.c b/bfd/elf32-i860.c
index 2857a16..a2e3e5d 100644
--- a/bfd/elf32-i860.c
+++ b/bfd/elf32-i860.c
@@ -541,7 +541,6 @@ static reloc_howto_type elf32_i860_howto_table [] =
0xffffffff, /* dst_mask */
false), /* pcrel_offset */
};
-
static unsigned char elf_code_to_howto_index[R_860_max + 1];
@@ -698,7 +697,6 @@ elf32_i860_info_to_howto_rela (abfd, bfd_reloc, elf_reloc)
{
bfd_reloc->howto = lookup_howto (ELF32_R_TYPE (elf_reloc->r_info));
}
-
/* Specialized relocation handler for R_860_SPLITn. These relocations
involves a 16-bit field that is split into two contiguous parts. */
@@ -1091,7 +1089,6 @@ elf32_i860_is_local_label_name (abfd, name)
return _bfd_elf_is_local_label_name (abfd, name);
}
-
#define TARGET_BIG_SYM bfd_elf32_i860_vec
#define TARGET_BIG_NAME "elf32-i860"
diff --git a/bfd/elf32-m32r.c b/bfd/elf32-m32r.c
index 5b2d63f..cfdb1c3 100644
--- a/bfd/elf32-m32r.c
+++ b/bfd/elf32-m32r.c
@@ -2156,9 +2156,7 @@ m32r_elf_check_relocs (abfd, info, sec, relocs)
return true;
}
-
-
#define ELF_ARCH bfd_arch_m32r
#define ELF_MACHINE_CODE EM_CYGNUS_M32R
#define ELF_MAXPAGESIZE 0x1 /* Explicitly requested by Mitsubishi. */
diff --git a/bfd/elf32-m68k.c b/bfd/elf32-m68k.c
index c37bb5a9..e7ebc1b 100644
--- a/bfd/elf32-m68k.c
+++ b/bfd/elf32-m68k.c
@@ -181,7 +181,6 @@ reloc_type_lookup (abfd, code)
/* end code generated by elf.el */
#define USE_RELA
-
/* Functions for the m68k ELF linker. */
diff --git a/bfd/elf32-mcore.c b/bfd/elf32-mcore.c
index 6bb2e75..051bd0d 100644
--- a/bfd/elf32-mcore.c
+++ b/bfd/elf32-mcore.c
@@ -233,7 +233,6 @@ mcore_elf_howto_init ()
mcore_elf_howto_table [type] = & mcore_elf_howto_raw [i];
}
}
-
static reloc_howto_type *
mcore_elf_reloc_type_lookup (abfd, code)
@@ -346,7 +345,6 @@ mcore_elf_merge_private_bfd_data (ibfd, obfd)
return true;
}
-
/* Don't pretend we can deal with unsupported relocs. */
@@ -370,7 +368,6 @@ mcore_elf_unsupported_reloc (abfd, reloc_entry, symbol, data, input_section,
return bfd_reloc_notsupported;
}
-
/* The RELOCATE_SECTION function is called by the ELF backend linker
to handle the relocations for a section.
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index 58ffce4..d3152ce 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -1487,7 +1487,6 @@ ppc_elf_merge_private_bfd_data (ibfd, obfd)
return true;
}
-
/* Handle a PowerPC specific section when reading an object file. This
is called when elfcode.h finds a section with an unknown type. */
@@ -1515,7 +1514,6 @@ ppc_elf_section_from_shdr (abfd, hdr, name)
bfd_set_section_flags (abfd, newsect, flags);
return true;
}
-
/* Set up any other section flags and such that may be necessary. */
@@ -1533,7 +1531,6 @@ ppc_elf_fake_sections (abfd, shdr, asect)
return true;
}
-
/* Create a special linker section */
static elf_linker_section_t *
@@ -2057,7 +2054,6 @@ ppc_elf_size_dynamic_sections (output_bfd, info)
return true;
}
-
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table or procedure linkage
diff --git a/bfd/elf32-sh.c b/bfd/elf32-sh.c
index 1648b71..56bf5f3 100644
--- a/bfd/elf32-sh.c
+++ b/bfd/elf32-sh.c
@@ -2845,7 +2845,6 @@ sh_elf_discard_copies (h, ignore)
return true;
}
-
/* Relocate an SH ELF section. */
diff --git a/bfd/elf32-v850.c b/bfd/elf32-v850.c
index 687f180..67fede0 100644
--- a/bfd/elf32-v850.c
+++ b/bfd/elf32-v850.c
@@ -501,7 +501,6 @@ static const struct v850_elf_reloc_map v850_elf_reloc_map[] =
{ BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY },
};
-
/* Map a bfd relocation into the appropriate howto structure */
static reloc_howto_type *
@@ -525,7 +524,6 @@ v850_elf_reloc_type_lookup (abfd, code)
return NULL;
}
-
/* Set the howto pointer for an V850 ELF reloc. */
static void
@@ -554,7 +552,6 @@ v850_elf_info_to_howto_rela (abfd, cache_ptr, dst)
BFD_ASSERT (r_type < (unsigned int) R_V850_max);
cache_ptr->howto = &v850_elf_howto_table[r_type];
}
-
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table or procedure linkage
@@ -1243,7 +1240,6 @@ v850_elf_perform_relocation (abfd, r_type, addend, address)
bfd_put_16 (abfd, insn, address);
return bfd_reloc_ok;
}
-
/* Insert the addend into the instruction. */
static bfd_reloc_status_type
@@ -1317,7 +1313,6 @@ v850_elf_reloc (abfd, reloc, symbol, data, isection, obfd, err)
reloc->addend = relocation;
return bfd_reloc_ok;
}
-
static boolean
v850_elf_is_local_label_name (abfd, name)
@@ -1327,7 +1322,6 @@ v850_elf_is_local_label_name (abfd, name)
return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
|| (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_'));
}
-
/* Perform a relocation as part of a final link. */
static bfd_reloc_status_type
@@ -1489,7 +1483,6 @@ v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
/* Perform the relocation. */
return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data);
}
-
/* Relocate an V850 ELF section. */
static boolean
@@ -2189,7 +2182,6 @@ v850_elf_fake_sections (abfd, hdr, sec)
return true;
}
-
#define TARGET_LITTLE_SYM bfd_elf32_v850_vec
#define TARGET_LITTLE_NAME "elf32-v850"
diff --git a/bfd/elf32.c b/bfd/elf32.c
index f222969..2d3bebf 100644
--- a/bfd/elf32.c
+++ b/bfd/elf32.c
@@ -19,5 +19,4 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#define ARCH_SIZE 32
-
#include "elfcode.h"
diff --git a/bfd/elf64-alpha.c b/bfd/elf64-alpha.c
index ce63cc7..dd41e9d 100644
--- a/bfd/elf64-alpha.c
+++ b/bfd/elf64-alpha.c
@@ -129,7 +129,6 @@ static boolean elf64_alpha_merge_ind_symbols
PARAMS((struct alpha_elf_link_hash_entry *, PTR));
static Elf_Internal_Rela * elf64_alpha_find_reloc_at_ofs
PARAMS ((Elf_Internal_Rela *, Elf_Internal_Rela *, bfd_vma, int));
-
struct alpha_elf_link_hash_entry
{
diff --git a/bfd/elf64-sparc.c b/bfd/elf64-sparc.c
index 087fe96..0627913 100644
--- a/bfd/elf64-sparc.c
+++ b/bfd/elf64-sparc.c
@@ -651,7 +651,6 @@ sparc64_elf_bfd_link_hash_table_create (abfd)
return &ret->root.root;
}
-
/* Utility for performing the standard initial work of an instruction
relocation.
@@ -961,7 +960,6 @@ sparc64_elf_plt_ptr_offset (index, max)
+ last * 6*4
+ ofs * 8);
}
-
/* Look through the relocs for a section during the first phase, and
allocate space in the global offset table or procedure linkage
diff --git a/bfd/elflink.c b/bfd/elflink.c
index 1aa2db0..bfaf44b 100644
--- a/bfd/elflink.c
+++ b/bfd/elflink.c
@@ -97,7 +97,6 @@ _bfd_elf_create_got_section (abfd, info)
return true;
}
-
/* Create dynamic sections when linking against a dynamic object. */
boolean
@@ -212,7 +211,6 @@ _bfd_elf_create_dynamic_sections (abfd, info)
return true;
}
-
/* Record a new dynamic symbol. We record the dynamic symbols as we
read the input files, since we need to have a list of all of them
before we can determine the final sizes of the output sections.
@@ -498,7 +496,6 @@ _bfd_elf_create_linker_section (abfd, info, which, defaults)
return lsect;
}
-
/* Find a linker generated pointer with a given addend and type. */
@@ -516,7 +513,6 @@ _bfd_elf_find_pointer_linker_section (linker_pointers, addend, which)
return (elf_linker_section_pointers_t *)0;
}
-
/* Make the .rela section corresponding to the generated linker section. */
diff --git a/bfd/elflink.h b/bfd/elflink.h
index 6606bf2..d3b44e8 100644
--- a/bfd/elflink.h
+++ b/bfd/elflink.h
@@ -211,7 +211,6 @@ elf_link_is_defined_archive_symbol (abfd, symdef)
return result;
}
-
/* Add symbols from an ELF archive file to the linker hash table. We
don't use _bfd_generic_link_add_archive_symbols because of a
problem which arises on UnixWare. The UnixWare libc.so is an
@@ -2409,7 +2408,6 @@ elf_link_record_local_dynamic_symbol (info, input_bfd, input_indx)
return true;
}
-
/* Read and swap the relocs from the section indicated by SHDR. This
may be either a REL or a RELA section. The relocations are
translated into RELA relocations and stored in INTERNAL_RELOCS,
@@ -2587,7 +2585,6 @@ NAME(_bfd_elf,link_read_relocs) (abfd, o, external_relocs, internal_relocs,
return NULL;
}
-
/* Record an assignment to a symbol made by a linker script. We need
this in case some dynamic object refers to this symbol. */
@@ -6053,7 +6050,6 @@ elf_reloc_link_order (output_bfd, info, output_section, link_order)
return true;
}
-
/* Allocate a pointer to live in a linker created section. */
@@ -6176,7 +6172,6 @@ elf_create_pointer_linker_section (abfd, info, lsect, h, rel)
return true;
}
-
#if ARCH_SIZE==64
#define bfd_put_ptr(BFD,VAL,ADDR) bfd_put_64 (BFD, VAL, ADDR)
diff --git a/bfd/elfxx-ia64.c b/bfd/elfxx-ia64.c
index 5105c4e..e620938 100644
--- a/bfd/elfxx-ia64.c
+++ b/bfd/elfxx-ia64.c
@@ -273,7 +273,6 @@ static boolean elfNN_ia64_merge_private_bfd_data
PARAMS ((bfd *ibfd, bfd *obfd));
static boolean elfNN_ia64_print_private_bfd_data
PARAMS ((bfd *abfd, PTR ptr));
-
/* ia64-specific relocation */