RISC-V: Add bfd/cpu-riscv.h to support all spec versions controlling.

Make the opcode/riscv-opc.c and include/opcode/riscv.h tidy, move the
spec versions stuff to bfd/cpu-riscv.h.  Also move the csr stuff and
ext_version_table to gas/config/tc-riscv.c for internal use.  To avoid
too many repeated code, define general RISCV_GET_SPEC_NAME/SPEC_CLASS
macros.  Therefore, assembler/dis-assembler/linker/gdb can get all spec
versions related stuff from cpu-riscv.h and cpu-riscv.c, since the stuff
are defined there uniformly.

bfd/
    * Makefile.am: Added cpu-riscv.h.
    * Makefile.in: Regenerated.
    * po/SRC-POTFILES.in: Regenerated.
    * cpu-riscv.h: Added to support spec versions controlling.
    Also added extern arrays and functions for cpu-riscv.c.
    (enum riscv_spec_class): Define all spec classes here uniformly.
    (struct riscv_spec): Added for all specs.
    (RISCV_GET_SPEC_CLASS): Added to reduce repeated code.
    (RISCV_GET_SPEC_NAME): Likewise.
    (RISCV_GET_ISA_SPEC_CLASS): Added to get ISA spec class.
    (RISCV_GET_PRIV_SPEC_CLASS): Added to get privileged spec class.
    (RISCV_GET_PRIV_SPEC_NAME): Added to get privileged spec name.
    * cpu-riscv.c (struct priv_spec_t): Replaced with struct riscv_spec.
    (riscv_get_priv_spec_class): Replaced with RISCV_GET_PRIV_SPEC_CLASS.
    (riscv_get_priv_spec_name): Replaced with RISCV_GET_PRIV_SPEC_NAME.
    (riscv_priv_specs): Moved below.
    (riscv_get_priv_spec_class_from_numbers): Likewise, updated.
    (riscv_isa_specs): Moved from include/opcode/riscv.h.
    * elfnn-riscv.c: Included cpu-riscv.h.
    (riscv_merge_attributes): Initialize in_priv_spec and out_priv_spec.
    * elfxx-riscv.c: Included cpu-riscv.h and opcode/riscv.h.
    (RISCV_UNKNOWN_VERSION): Moved from include/opcode/riscv.h.
    * elfxx-riscv.h: Removed extern functions to cpu-riscv.h.
gas/
    * config/tc-riscv.c: Included cpu-riscv.h.
    (enum riscv_csr_clas): Moved from include/opcode/riscv.h.
    (struct riscv_csr_extra): Likewise.
    (struct riscv_ext_version): Likewise.
    (ext_version_table): Moved from opcodes/riscv-opc.c.
    (default_isa_spec): Updated type to riscv_spec_class.
    (default_priv_spec): Likewise.
    (riscv_set_default_isa_spec): Updated.
    (init_ext_version_hash): Likewise.
    (riscv_init_csr_hash): Likewise, also fixed indent.
include/
    * opcode/riscv.h: Moved stuff and make the file tidy.
opcodes/
    * riscv-dis.c: Included cpu-riscv.h, and removed elfxx-riscv.h.
    (default_priv_spec): Updated type to riscv_spec_class.
    (parse_riscv_dis_option): Updated.
    * riscv-opc.c: Moved stuff and make the file tidy.

1 files changed, 81 insertions, 0 deletions

diff --git a/bfd/cpu-riscv.h b/bfd/cpu-riscv.h
new file mode 100644
index 0000000..cafaca2
--- /dev/null
+++ b/bfd/cpu-riscv.h
@@ -0,0 +1,81 @@
+/* RISC-V spec version controlling support.
+   Copyright (C) 2019-2020 Free Software Foundation, Inc.
+
+   This file is part of BFD, the Binary File Descriptor library.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+   MA 02110-1301, USA.  */
+
+enum riscv_spec_class
+{
+  /* ISA spec.  */
+  ISA_SPEC_CLASS_NONE = 0,
+  ISA_SPEC_CLASS_2P2,
+  ISA_SPEC_CLASS_20190608,
+  ISA_SPEC_CLASS_20191213,
+  ISA_SPEC_CLASS_DRAFT,
+
+  /* Privileged spec.  */
+  PRIV_SPEC_CLASS_NONE,
+  PRIV_SPEC_CLASS_1P9P1,
+  PRIV_SPEC_CLASS_1P10,
+  PRIV_SPEC_CLASS_1P11,
+  PRIV_SPEC_CLASS_DRAFT,
+};
+
+struct riscv_spec
+{
+  const char *name;
+  enum riscv_spec_class spec_class;
+};
+
+extern const struct riscv_spec riscv_isa_specs[];
+extern const struct riscv_spec riscv_priv_specs[];
+
+#define RISCV_GET_SPEC_CLASS(UTYPE, LTYPE, NAME, CLASS)			\
+  do									\
+    {									\
+      if (NAME == NULL)							\
+	break;								\
+									\
+      int i_spec = UTYPE##_SPEC_CLASS_NONE + 1;				\
+      for (; i_spec < UTYPE##_SPEC_CLASS_DRAFT; i_spec++)		\
+	{								\
+	  int j_spec = i_spec - UTYPE##_SPEC_CLASS_NONE -1;		\
+	  if (riscv_##LTYPE##_specs[j_spec].name			\
+	      && strcmp (riscv_##LTYPE##_specs[j_spec].name, NAME) == 0)\
+	  {								\
+	    CLASS = riscv_##LTYPE##_specs[j_spec].spec_class;		\
+	    break;							\
+	  }								\
+	}								\
+    }									\
+  while (0)
+
+#define RISCV_GET_SPEC_NAME(UTYPE, LTYPE, NAME, CLASS)			\
+  (NAME) = riscv_##LTYPE##_specs[(CLASS) - UTYPE##_SPEC_CLASS_NONE - 1].name
+
+#define RISCV_GET_ISA_SPEC_CLASS(NAME, CLASS)	\
+  RISCV_GET_SPEC_CLASS(ISA, isa, NAME, CLASS)
+#define RISCV_GET_PRIV_SPEC_CLASS(NAME, CLASS)	\
+  RISCV_GET_SPEC_CLASS(PRIV, priv, NAME, CLASS)
+#define RISCV_GET_PRIV_SPEC_NAME(NAME, CLASS)	\
+  RISCV_GET_SPEC_NAME(PRIV, priv, NAME, CLASS)
+
+extern void
+riscv_get_priv_spec_class_from_numbers (unsigned int,
+					unsigned int,
+					unsigned int,
+					enum riscv_spec_class *);