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authorJakub Jelinek <jakub@redhat.com>2000-10-20 10:38:47 +0000
committerJakub Jelinek <jakub@redhat.com>2000-10-20 10:38:47 +0000
commit19f7b01094d236648a8b0de2ef24cf8510594e9c (patch)
treef2b5235c189cdf610e5e892e7e2e8f48df8e2221 /bfd/bfd-in2.h
parentbb160f3e2dc2b422903eca471137e204c55793c2 (diff)
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* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p instructions to loose any special insn->architecture mask. * config/tc-sparc.c (v9a_asr_table): Add v9b ASRs. (sparc_md_end, sparc_arch_types, sparc_arch, sparc_elf_final_processing): Handle v8plusb and v9b architectures. (sparc_ip): Handle siam mode operands. Support v9b ASRs (and request v9b architecture if they are used). bfd/ * elf32-sparc.c (elf32_sparc_merge_private_bfd_data, elf32_sparc_object_p, elf32_sparc_final_write_processing): Support v8plusb. * elf64-sparc.c (sparc64_elf_merge_private_bfd_data, sparc64_elf_object_p): Support v9b. * archures.c: Declare v8plusb and v9b machines. * bfd-in2.h: Ditto. * cpu-sparc.c: Ditto. include/opcode/ * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B. Note that '3' is used for siam operand. opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs. (compute_arch_mask): Add v8plusb and v9b machines. (print_insn_sparc): siam mode decoding, accept ASRs up to 25. * opcodes/sparc-opc.c: Support for Cheetah instruction set. (prefetch_table): Add #invalidate.
Diffstat (limited to 'bfd/bfd-in2.h')
-rw-r--r--bfd/bfd-in2.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 64238ac..55c2dba 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1379,9 +1379,12 @@ enum bfd_architecture
#define bfd_mach_sparc_sparclite_le 6
#define bfd_mach_sparc_v9 7
#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns */
+#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns */
+#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns */
/* Nonzero if MACH has the v9 instruction set. */
#define bfd_mach_sparc_v9_p(mach) \
- ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a)
+ ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9a \
+ && (mach) != bfd_mach_sparc_sparclite_le)
bfd_arch_mips, /* MIPS Rxxxx */
#define bfd_mach_mips3000 3000
#define bfd_mach_mips3900 3900