RISC-V: Add 'Sstc' extension and its CSRs

This commit adds "stimecmp / vstimecmp" Extension (Sstc) and its CSRs.

bfd/ChangeLog:

	* elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Sstc'
	extension to valid 'S' extension list.

gas/ChangeLog:

	* config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for
	'Sstc' extension. (riscv_csr_address): Add handling for new CSR
	classes.
	* testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs.
	* testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
	* testsuite/gas/riscv/csr.s: Add new CSRs.
	* testsuite/gas/riscv/csr-version-1p9p1.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p9p1.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p10.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p11.l: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.d: Likewise.
	* testsuite/gas/riscv/csr-version-1p12.l: Likewise.

include/ChangeLog:

	* opcode/riscv-opc.h (CSR_STIMECMP, CSR_STIMECMPH,
	CSR_VSTIMECMP, CSR_VSTIMECMPH): New CSR macros.

14 files changed, 136 insertions, 0 deletions

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 855501c..bf7dc20 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1233,6 +1233,7 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
 {
   {"smstateen",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"sscofpmf",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
+  {"sstc",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {"svinval",		ISA_SPEC_CLASS_DRAFT,		1, 0, 0 },
   {NULL, 0, 0, 0, 0}
 };
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index 2f6180e..a0e8456 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -74,6 +74,10 @@ enum riscv_csr_class
   CSR_CLASS_SMSTATEEN_AND_H_32,	/* Smstateen RV32 only (with H) */
   CSR_CLASS_SSCOFPMF,		/* Sscofpmf only */
   CSR_CLASS_SSCOFPMF_32,	/* Sscofpmf RV32 only */
+  CSR_CLASS_SSTC,		/* Sstc only */
+  CSR_CLASS_SSTC_AND_H,		/* Sstc only (with H) */
+  CSR_CLASS_SSTC_32,		/* Sstc RV32 only */
+  CSR_CLASS_SSTC_AND_H_32,	/* Sstc RV32 only (with H) */
 };
 
 /* This structure holds all restricted conditions for a CSR.  */
@@ -949,6 +953,16 @@ riscv_csr_address (const char *csr_name,
     case CSR_CLASS_SSCOFPMF:
       extension = "sscofpmf";
       break;
+    case CSR_CLASS_SSTC:
+    case CSR_CLASS_SSTC_AND_H:
+    case CSR_CLASS_SSTC_32:
+    case CSR_CLASS_SSTC_AND_H_32:
+      is_rv32_only = (csr_class == CSR_CLASS_SSTC_32
+		      || csr_class == CSR_CLASS_SSTC_AND_H_32);
+      is_h_required = (csr_class == CSR_CLASS_SSTC_AND_H
+		      || csr_class == CSR_CLASS_SSTC_AND_H_32);
+      extension = "sstc";
+      break;
     case CSR_CLASS_DEBUG:
       break;
     default:
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.d b/gas/testsuite/gas/riscv/csr-dw-regnums.d
index 2f35329..b4b3806 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.d
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.d
@@ -363,6 +363,10 @@ Contents of the .* section:
   DW_CFA_offset_extended_sf: r5949 \(mhpmevent29h\) at cfa\+7412
   DW_CFA_offset_extended_sf: r5950 \(mhpmevent30h\) at cfa\+7416
   DW_CFA_offset_extended_sf: r5951 \(mhpmevent31h\) at cfa\+7420
+  DW_CFA_offset_extended_sf: r4429 \(stimecmp\) at cfa\+1332
+  DW_CFA_offset_extended_sf: r4445 \(stimecmph\) at cfa\+1396
+  DW_CFA_offset_extended_sf: r4685 \(vstimecmp\) at cfa\+2356
+  DW_CFA_offset_extended_sf: r4701 \(vstimecmph\) at cfa\+2420
   DW_CFA_offset_extended_sf: r4163 \(utval\) at cfa\+268
   DW_CFA_offset_extended_sf: r4419 \(stval\) at cfa\+1292
   DW_CFA_offset_extended_sf: r4480 \(satp\) at cfa\+1536
diff --git a/gas/testsuite/gas/riscv/csr-dw-regnums.s b/gas/testsuite/gas/riscv/csr-dw-regnums.s
index caac321..6cfa415 100644
--- a/gas/testsuite/gas/riscv/csr-dw-regnums.s
+++ b/gas/testsuite/gas/riscv/csr-dw-regnums.s
@@ -359,6 +359,11 @@ _start:
 	.cfi_offset mhpmevent29h, 7412
 	.cfi_offset mhpmevent30h, 7416
 	.cfi_offset mhpmevent31h, 7420
+	# Sstc extension
+	.cfi_offset stimecmp, 1332
+	.cfi_offset stimecmph, 1396
+	.cfi_offset vstimecmp, 2356
+	.cfi_offset vstimecmph, 2420
 	# dropped
 	.cfi_offset ubadaddr, 268	# aliases
 	.cfi_offset sbadaddr, 1292	# aliases
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.d b/gas/testsuite/gas/riscv/csr-version-1p10.d
index 90cc5dd..bd8b103 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.d
@@ -701,6 +701,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
+[ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph
+[ 	]+[0-9a-f]+:[ 	]+15d59073[ 	]+csrw[ 	]+stimecmph,a1
+[ 	]+[0-9a-f]+:[ 	]+24d02573[ 	]+csrr[ 	]+a0,vstimecmp
+[ 	]+[0-9a-f]+:[ 	]+24d59073[ 	]+csrw[ 	]+vstimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+25d02573[ 	]+csrr[ 	]+a0,vstimecmph
+[ 	]+[0-9a-f]+:[ 	]+25d59073[ 	]+csrw[ 	]+vstimecmph,a1
 [ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
 [ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
 [ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
diff --git a/gas/testsuite/gas/riscv/csr-version-1p10.l b/gas/testsuite/gas/riscv/csr-version-1p10.l
index e4144b6..b778453 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p10.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p10.l
@@ -602,6 +602,22 @@
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Warning: invalid CSR `mhpmevent31h', needs rv32i extension
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
 .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.10'
 .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.10'
 .*Warning: invalid CSR `sbadaddr' for the privileged spec `1.10'
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.d b/gas/testsuite/gas/riscv/csr-version-1p11.d
index a85875a..5d63338 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.d
@@ -701,6 +701,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
+[ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph
+[ 	]+[0-9a-f]+:[ 	]+15d59073[ 	]+csrw[ 	]+stimecmph,a1
+[ 	]+[0-9a-f]+:[ 	]+24d02573[ 	]+csrr[ 	]+a0,vstimecmp
+[ 	]+[0-9a-f]+:[ 	]+24d59073[ 	]+csrw[ 	]+vstimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+25d02573[ 	]+csrr[ 	]+a0,vstimecmph
+[ 	]+[0-9a-f]+:[ 	]+25d59073[ 	]+csrw[ 	]+vstimecmph,a1
 [ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,utval
 [ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+utval,a1
 [ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
diff --git a/gas/testsuite/gas/riscv/csr-version-1p11.l b/gas/testsuite/gas/riscv/csr-version-1p11.l
index f4a57f2..78bae81 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p11.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p11.l
@@ -600,6 +600,22 @@
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Warning: invalid CSR `mhpmevent31h', needs rv32i extension
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
 .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.11'
 .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.11'
 .*Warning: invalid CSR `sbadaddr' for the privileged spec `1.11'
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.d b/gas/testsuite/gas/riscv/csr-version-1p12.d
index 60f19bf..728e647 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.d
@@ -701,6 +701,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
+[ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph
+[ 	]+[0-9a-f]+:[ 	]+15d59073[ 	]+csrw[ 	]+stimecmph,a1
+[ 	]+[0-9a-f]+:[ 	]+24d02573[ 	]+csrr[ 	]+a0,vstimecmp
+[ 	]+[0-9a-f]+:[ 	]+24d59073[ 	]+csrw[ 	]+vstimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+25d02573[ 	]+csrr[ 	]+a0,vstimecmph
+[ 	]+[0-9a-f]+:[ 	]+25d59073[ 	]+csrw[ 	]+vstimecmph,a1
 [ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,0x43
 [ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+0x43,a1
 [ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,stval
diff --git a/gas/testsuite/gas/riscv/csr-version-1p12.l b/gas/testsuite/gas/riscv/csr-version-1p12.l
index 37522fa..cb026bb 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p12.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p12.l
@@ -462,6 +462,22 @@
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Warning: invalid CSR `mhpmevent31h', needs rv32i extension
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
 .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.12'
 .*Warning: invalid CSR `ubadaddr' for the privileged spec `1.12'
 .*Warning: invalid CSR `sbadaddr' for the privileged spec `1.12'
diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.d b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
index e9eb8c0..a34b99f 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p9p1.d
+++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.d
@@ -701,6 +701,14 @@ Disassembly of section .text:
 [ 	]+[0-9a-f]+:[ 	]+73e59073[ 	]+csrw[ 	]+mhpmevent30h,a1
 [ 	]+[0-9a-f]+:[ 	]+73f02573[ 	]+csrr[ 	]+a0,mhpmevent31h
 [ 	]+[0-9a-f]+:[ 	]+73f59073[ 	]+csrw[ 	]+mhpmevent31h,a1
+[ 	]+[0-9a-f]+:[ 	]+14d02573[ 	]+csrr[ 	]+a0,stimecmp
+[ 	]+[0-9a-f]+:[ 	]+14d59073[ 	]+csrw[ 	]+stimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+15d02573[ 	]+csrr[ 	]+a0,stimecmph
+[ 	]+[0-9a-f]+:[ 	]+15d59073[ 	]+csrw[ 	]+stimecmph,a1
+[ 	]+[0-9a-f]+:[ 	]+24d02573[ 	]+csrr[ 	]+a0,vstimecmp
+[ 	]+[0-9a-f]+:[ 	]+24d59073[ 	]+csrw[ 	]+vstimecmp,a1
+[ 	]+[0-9a-f]+:[ 	]+25d02573[ 	]+csrr[ 	]+a0,vstimecmph
+[ 	]+[0-9a-f]+:[ 	]+25d59073[ 	]+csrw[ 	]+vstimecmph,a1
 [ 	]+[0-9a-f]+:[ 	]+04302573[ 	]+csrr[ 	]+a0,ubadaddr
 [ 	]+[0-9a-f]+:[ 	]+04359073[ 	]+csrw[ 	]+ubadaddr,a1
 [ 	]+[0-9a-f]+:[ 	]+14302573[ 	]+csrr[ 	]+a0,sbadaddr
diff --git a/gas/testsuite/gas/riscv/csr-version-1p9p1.l b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
index 893f8c8..4fac40f 100644
--- a/gas/testsuite/gas/riscv/csr-version-1p9p1.l
+++ b/gas/testsuite/gas/riscv/csr-version-1p9p1.l
@@ -652,6 +652,22 @@
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
 .*Warning: invalid CSR `mhpmevent31h', needs rv32i extension
 .*Warning: invalid CSR `mhpmevent31h', needs `sscofpmf' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmp', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `stimecmph', needs rv32i extension
+.*Warning: invalid CSR `stimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmp', needs `h' extension
+.*Warning: invalid CSR `vstimecmp', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
+.*Warning: invalid CSR `vstimecmph', needs rv32i extension
+.*Warning: invalid CSR `vstimecmph', needs `h' extension
+.*Warning: invalid CSR `vstimecmph', needs `sstc' extension
 .*Warning: invalid CSR `utval' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `utval' for the privileged spec `1.9.1'
 .*Warning: invalid CSR `fflags', needs `f' extension
diff --git a/gas/testsuite/gas/riscv/csr.s b/gas/testsuite/gas/riscv/csr.s
index 2a72312..128aeb8 100644
--- a/gas/testsuite/gas/riscv/csr.s
+++ b/gas/testsuite/gas/riscv/csr.s
@@ -391,6 +391,12 @@
 	csr mhpmevent30h
 	csr mhpmevent31h
 
+	# Sstc extension
+	csr stimecmp
+	csr stimecmph
+	csr vstimecmp
+	csr vstimecmph
+
 	# Supported in previous priv spec, but dropped now
 
 	csr ubadaddr		# 0x043 in 1.9.1, but the value is utval since 1.10
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 8546a6e..88b8d7f 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -2484,6 +2484,11 @@
 #define CSR_MHPMEVENT29H 0x73d
 #define CSR_MHPMEVENT30H 0x73e
 #define CSR_MHPMEVENT31H 0x73f
+/* Sstc extension */
+#define CSR_STIMECMP 0x14d
+#define CSR_STIMECMPH 0x15d
+#define CSR_VSTIMECMP 0x24d
+#define CSR_VSTIMECMPH 0x25d
 /* Unprivileged Floating-Point CSR addresses.  */
 #define CSR_FFLAGS 0x1
 #define CSR_FRM 0x2
@@ -3201,6 +3206,11 @@ DECLARE_CSR(mhpmevent28h, CSR_MHPMEVENT28H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLA
 DECLARE_CSR(mhpmevent29h, CSR_MHPMEVENT29H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(mhpmevent30h, CSR_MHPMEVENT30H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 DECLARE_CSR(mhpmevent31h, CSR_MHPMEVENT31H, CSR_CLASS_SSCOFPMF_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+/* Sstc extension */
+DECLARE_CSR(stimecmp, CSR_STIMECMP, CSR_CLASS_SSTC, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(stimecmph, CSR_STIMECMPH, CSR_CLASS_SSTC_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(vstimecmp, CSR_VSTIMECMP, CSR_CLASS_SSTC_AND_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
+DECLARE_CSR(vstimecmph, CSR_VSTIMECMPH, CSR_CLASS_SSTC_AND_H_32, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
 /* Dropped CSRs.  */
 DECLARE_CSR(mbase, CSR_MBASE, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
 DECLARE_CSR(mbound, CSR_MBOUND, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)