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authorTristan Gingold <gingold@adacore.com>2013-01-31 09:40:05 +0000
committerTristan Gingold <gingold@adacore.com>2013-01-31 09:40:05 +0000
commitd1aeba008ecbb502e6b0c0b5f4559cdf514c12fc (patch)
tree3953dcd7430204dcad82a8cbb4ac0f89cc5e9253
parentfe4b0b463295fa285e1cf4acdde92208c29c48ec (diff)
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2013-01-31 Tristan Gingold <gingold@adacore.com>
* gas/ppc/test1xcoff32.d: Updated. * gas/all/fwdexp.d: Adjusted for AIX.
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/all/fwdexp.d2
-rw-r--r--gas/testsuite/gas/ppc/test1xcoff32.d22
3 files changed, 17 insertions, 12 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 5a85b86..ab91689 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2013-01-31 Tristan Gingold <gingold@adacore.com>
+
+ * gas/ppc/test1xcoff32.d: Updated.
+ * gas/all/fwdexp.d: Adjusted for AIX.
+
2013-01-30 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/alias.s: Add new tests.
diff --git a/gas/testsuite/gas/all/fwdexp.d b/gas/testsuite/gas/all/fwdexp.d
index 5c16ea9..eee91c0 100644
--- a/gas/testsuite/gas/all/fwdexp.d
+++ b/gas/testsuite/gas/all/fwdexp.d
@@ -8,4 +8,4 @@ OFFSET +TYPE +VALUE
0+ .*(\.data|i)(|\+0xf+e|\+0xf+c|\+0xf+8|-0x0*2|-0x0*4|-0x0*8)
Contents of section .*
- 0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8) .*
+ 0+ (0+|feff|fffe|fcffffff|fffffffc|f8ffffff|f8ffffff ffffffff|ffffffff fffffff8|0+4) .*
diff --git a/gas/testsuite/gas/ppc/test1xcoff32.d b/gas/testsuite/gas/ppc/test1xcoff32.d
index 75e93a8..2f8f502 100644
--- a/gas/testsuite/gas/ppc/test1xcoff32.d
+++ b/gas/testsuite/gas/ppc/test1xcoff32.d
@@ -79,17 +79,17 @@ Disassembly of section \.text:
0+0028 <reference_via_toc>:
28: 80 62 00 00 l r3,0\(r2\)
- 2a: R_TOC ignored0\+0xf+ff8c
+ 2a: R_TOC ignored0-0x74
2c: 80 62 00 04 l r3,4\(r2\)
- 2e: R_TOC ignored1\+0xf+ff88
+ 2e: R_TOC ignored1-0x78
30: 80 62 00 08 l r3,8\(r2\)
- 32: R_TOC ignored2\+0xf+ff84
+ 32: R_TOC ignored2-0x7c
34: 80 62 00 0c l r3,12\(r2\)
- 36: R_TOC ignored3\+0xf+ff80
+ 36: R_TOC ignored3-0x80
38: 80 62 00 10 l r3,16\(r2\)
- 3a: R_TOC ignored4\+0xf+ff7c
+ 3a: R_TOC ignored4-0x84
3c: 80 62 00 14 l r3,20\(r2\)
- 3e: R_TOC ignored5\+0xf+ff78
+ 3e: R_TOC ignored5-0x88
0+0040 <subtract_symbols>:
40: 38 60 00 04 lil r3,4
@@ -104,7 +104,7 @@ Disassembly of section \.text:
5c: 38 60 00 00 lil r3,0
60: 38 60 00 04 lil r3,4
64: 38 62 00 18 cal r3,24\(r2\)
- 66: R_TOC ignored6\+0xf+ff74
+ 66: R_TOC ignored6-0x8c
Disassembly of section \.data:
0+0068 <TOC-0xc>:
@@ -114,19 +114,19 @@ Disassembly of section \.data:
0+0074 <TOC>:
74: 00 00 00 68 \.long 0x68
- 74: R_POS \.data\+0xf+ff98
+ 74: R_POS \.data-0x68
0+0078 <ignored1>:
78: 00 00 00 6c \.long 0x6c
- 78: R_POS \.data\+0xf+ff98
+ 78: R_POS \.data-0x68
0+007c <ignored2>:
7c: 00 00 00 6c \.long 0x6c
- 7c: R_POS \.data\+0xf+ff98
+ 7c: R_POS \.data-0x68
0+0080 <ignored3>:
80: 00 00 00 70 \.long 0x70
- 80: R_POS \.data\+0xf+ff98
+ 80: R_POS \.data-0x68
0+0084 <ignored4>:
84: 00 00 00 00 \.long 0x0