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| author | Nick Clifton <nickc@redhat.com> | 2002-02-05 11:22:26 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2002-02-05 11:22:26 +0000 |
| commit | c17aa31873e864b932e2f2d562b19d94029352a1 (patch) | |
| tree | cc8338a66d4e22d7eff78e74fd2622be68764614 | |
| parent | 82f6addb5616a5d06f7e44b5a1c8ea6cc97479eb (diff) | |
| download | gdb-c17aa31873e864b932e2f2d562b19d94029352a1.zip gdb-c17aa31873e864b932e2f2d562b19d94029352a1.tar.gz gdb-c17aa31873e864b932e2f2d562b19d94029352a1.tar.bz2 | |
Modify previous patch so that it is only triggered for COFF format executables.
| -rw-r--r-- | sim/arm/ChangeLog | 11 | ||||
| -rw-r--r-- | sim/arm/wrapper.c | 20 |
2 files changed, 20 insertions, 11 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index fbfc595..fc072e7 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,8 +1,13 @@ +2002-02-05 Nick Clifton <nickc@cambridge.redhat.com> + + * wrapper.c (sim_create_inferior): Modify previous patch so that + it is only triggered for COFF format executables. + 2002-02-04 Nick Clifton <nickc@cambridge.redhat.com> - * wrapper.c: If a v5 architecture is detected, assume it might be - an XScale binary, since there is no way to distinguish between - the two in the COFF file format. + * wrapper.c (sin_create_inferior): If a v5 architecture is + detected, assume it might be an XScale binary, since there is no + way to distinguish between the two in the COFF file format. 2002-01-10 Nick Clifton <nickc@cambridge.redhat.com> diff --git a/sim/arm/wrapper.c b/sim/arm/wrapper.c index c2fd8be..e00c21b 100644 --- a/sim/arm/wrapper.c +++ b/sim/arm/wrapper.c @@ -234,14 +234,18 @@ sim_create_inferior (sd, abfd, argv, env) break; case bfd_mach_arm_5: - /* This is a special case in order to support COFF based ARM toolchains. - The COFF header does not have enough room to store all the different - kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default - to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5 - machine type here, we assume it could be any of the above architectures - and so select the most feature-full. */ - ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop); - break; + if (bfd_family_coff (abfd)) + { + /* This is a special case in order to support COFF based ARM toolchains. + The COFF header does not have enough room to store all the different + kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default + to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5 + machine type here, we assume it could be any of the above architectures + and so select the most feature-full. */ + ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop); + break; + } + /* Otherwise drop through. */ case bfd_mach_arm_5T: ARMul_SelectProcessor (state, ARM_v5_Prop); |