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| author | Richard Henderson <rth@redhat.com> | 1999-08-31 02:01:22 +0000 |
|---|---|---|
| committer | Richard Henderson <rth@redhat.com> | 1999-08-31 02:01:22 +0000 |
| commit | bfe5c752f15d646b9ba63defc600ea511dc17703 (patch) | |
| tree | 24084d747c3ba0708799ff87a783139674e7781b | |
| parent | 104c1213b4821a4b8664e66db4643a951b461576 (diff) | |
| download | gdb-bfe5c752f15d646b9ba63defc600ea511dc17703.zip gdb-bfe5c752f15d646b9ba63defc600ea511dc17703.tar.gz gdb-bfe5c752f15d646b9ba63defc600ea511dc17703.tar.bz2 | |
* alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31.
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/alpha-opc.c | 8 |
2 files changed, 8 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4834d16..0939724 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +Mon Aug 30 18:56:14 1999 Richard Henderson <rth@cygnus.com> + + * alpha-opc.c (fetch, fetch_m, ecb, wh64): RA must be R31. + 1999-08-04 Doug Evans <devans@casey.cygnus.com> * fr30-asm.c,fr30-desc.h,fr30-dis.c,fr30-ibld.c,fr30-opc.c: Rebuild. diff --git a/opcodes/alpha-opc.c b/opcodes/alpha-opc.c index cceaf79..9e63a5d 100644 --- a/opcodes/alpha-opc.c +++ b/opcodes/alpha-opc.c @@ -1096,13 +1096,13 @@ const struct alpha_opcode alpha_opcodes[] = { { "excb", MFC(0x18,0x0400), BASE, ARG_NONE }, { "mb", MFC(0x18,0x4000), BASE, ARG_NONE }, { "wmb", MFC(0x18,0x4400), BASE, ARG_NONE }, - { "fetch", MFC(0x18,0x8000), BASE, { PRB } }, - { "fetch_m", MFC(0x18,0xA000), BASE, { PRB } }, + { "fetch", MFC(0x18,0x8000), BASE, { ZA, PRB } }, + { "fetch_m", MFC(0x18,0xA000), BASE, { ZA, PRB } }, { "rpcc", MFC(0x18,0xC000), BASE, { RA } }, { "rc", MFC(0x18,0xE000), BASE, { RA } }, - { "ecb", MFC(0x18,0xE800), BASE, { PRB } }, /* ev56 una */ + { "ecb", MFC(0x18,0xE800), BASE, { ZA, PRB } }, /* ev56 una */ { "rs", MFC(0x18,0xF000), BASE, { RA } }, - { "wh64", MFC(0x18,0xF800), BASE, { PRB } }, /* ev56 una */ + { "wh64", MFC(0x18,0xF800), BASE, { ZA, PRB } }, /* ev56 una */ { "hw_mfpr", OPR(0x19,0x00), EV4, { RA, RBA, EV4EXTHWINDEX } }, { "hw_mfpr", OP(0x19), OP_MASK, EV5, { RA, RBA, EV5HWINDEX } }, |