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| author | Richard Ball <richard.ball@arm.com> | 2023-08-16 14:08:09 +0100 |
|---|---|---|
| committer | Richard Ball <richard.ball@arm.com> | 2023-08-16 14:08:09 +0100 |
| commit | 7d6a2e34ee8eb061cf73014efefefaa074b499db (patch) | |
| tree | 4705a8e14b070f93df2e5cefd23850dde5bf5311 | |
| parent | da1f552dc79476275af282b65c5317ab3b4dbd9a (diff) | |
| download | gdb-7d6a2e34ee8eb061cf73014efefefaa074b499db.zip gdb-7d6a2e34ee8eb061cf73014efefefaa074b499db.tar.gz gdb-7d6a2e34ee8eb061cf73014efefefaa074b499db.tar.bz2 | |
aarch64: Enable Cortex-A720 CPU
This patch adds support for the Cortex-A720 CPU to binutils.
bfd/ChangeLog:
* cpu-aarch64.c: Add Cortex-A720.
gas/ChangeLog:
* NEWS: Update docs.
* config/tc-aarch64.c: Add Cortex-A720.
* doc/c-aarch64.texi: Update docs.
* testsuite/gas/aarch64/cpu-cortex-a720.d: New test.
| -rw-r--r-- | bfd/cpu-aarch64.c | 3 | ||||
| -rw-r--r-- | gas/NEWS | 2 | ||||
| -rw-r--r-- | gas/config/tc-aarch64.c | 5 | ||||
| -rw-r--r-- | gas/doc/c-aarch64.texi | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/aarch64/cpu-cortex-a720.d | 6 |
5 files changed, 16 insertions, 1 deletions
diff --git a/bfd/cpu-aarch64.c b/bfd/cpu-aarch64.c index 75a0338..df0d8c8 100644 --- a/bfd/cpu-aarch64.c +++ b/bfd/cpu-aarch64.c @@ -73,7 +73,8 @@ processors[] = { bfd_mach_aarch64, "cortex-a65" }, { bfd_mach_aarch64, "cortex-a65ae" }, { bfd_mach_aarch64, "cortex-a76ae" }, - { bfd_mach_aarch64, "cortex-a77" } + { bfd_mach_aarch64, "cortex-a77" }, + { bfd_mach_aarch64, "cortex-a720" } }; static bool @@ -12,6 +12,8 @@ * Add support for Cortex-A520 for AArch64. +* Add support for Cortex-A720 for AArch64. + Changes in 2.41: * Add support for Intel FRED instructions. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index e692161..19fbc7c 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10237,6 +10237,11 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = { | AARCH64_FEATURE_MEMTAG | AARCH64_FEATURE_SVE2_BITPERM), "Cortex-A710"}, + {"cortex-a720", AARCH64_FEATURE (AARCH64_ARCH_V9_2, + AARCH64_FEATURE_MEMTAG + | AARCH64_FEATURE_PROFILE + | AARCH64_FEATURE_SVE2_BITPERM), + "Cortex-A720"}, {"ares", AARCH64_FEATURE (AARCH64_ARCH_V8_2, AARCH64_FEATURE_RCPC | AARCH64_FEATURE_F16 | AARCH64_FEATURE_DOTPROD diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index ed6b46e..5e8ac0b 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -74,6 +74,7 @@ on the target processor. The following processor names are recognized: @code{cortex-a510}, @code{cortex-a520}, @code{cortex-a710}, +@code{cortex-a720}, @code{ares}, @code{exynos-m1}, @code{falkor}, diff --git a/gas/testsuite/gas/aarch64/cpu-cortex-a720.d b/gas/testsuite/gas/aarch64/cpu-cortex-a720.d new file mode 100644 index 0000000..c0b1f2b --- /dev/null +++ b/gas/testsuite/gas/aarch64/cpu-cortex-a720.d @@ -0,0 +1,6 @@ +# name: Assemble and dump for cortex-a720 CPU +# source: nop-asm.s +# as: -mcpu=cortex-a720 +# objdump: -d -mcortex-a720 + +#... |