1999-05-28 Linus Nordberg <linus.nordberg@canit.se>

	* m68k-opc.c: Rename MACL/MSACL to MAC/MSAC.  Add MACM/MSACM.  Add
	MOVE MACSR,CCR.
	* m68k-dis.c (fetch_arg): Add places `n', `o'.
	* m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
	Add mcf5206e to appropriate instructions.
	Add alias for MAC, MSAC.
	* m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
	`N'.
	* m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
	macw, remsl, remul for mcf5307.  Change mcf5200 --> mcf.
	* m68k-dis.c: Add format `u' and places `h', `m', `M'.

3 files changed, 384 insertions, 203 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5f90842..d4f8080 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,22 @@
+1999-05-28  Linus Nordberg  <linus.nordberg@canit.se>
+
+	* m68k-opc.c: Rename MACL/MSACL to MAC/MSAC.  Add MACM/MSACM.  Add
+	MOVE MACSR,CCR.
+
+	* m68k-dis.c (fetch_arg): Add places `n', `o'.
+
+	* m68k-opc.c: Add MSAC, MACL, MOVE to/from ACC, MACSR, MASK.
+	Add mcf5206e to appropriate instructions.
+	Add alias for MAC, MSAC.
+
+	* m68k-dis.c (print_insn_arg): Add formats `E', `G', `H' and place
+	`N'.
+
+	* m68k-opc.c (m68k_opcodes): Add divsw, divsl, divuw, divul, macl,
+	macw, remsl, remul for mcf5307.  Change mcf5200 --> mcf.
+
+	* m68k-dis.c: Add format `u' and places `h', `m', `M'.
+
 1999-05-18  Alan Modra  <alan@spri.levels.unisa.edu.au>
 
 	* i386-dis.c (Ed): Define.
diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
index a316c21..23d3a821 100644
--- a/opcodes/m68k-dis.c
+++ b/opcodes/m68k-dis.c
@@ -1,5 +1,5 @@
 /* Print Motorola 68k instructions.
-   Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 97, 1998
+   Copyright 1986, 87, 89, 91, 92, 93, 94, 95, 96, 97, 98, 1999
    Free Software Foundation, Inc.
 
 This file is free software; you can redistribute it and/or modify
@@ -504,6 +504,18 @@ print_insn_arg (d, buffer, p0, addr, info)
       (*info->fprintf_func) (info->stream, "%%usp");
       break;
 
+    case 'E':
+      (*info->fprintf_func) (info->stream, "%%acc");
+      break;
+
+    case 'G':
+      (*info->fprintf_func) (info->stream, "%%macsr");
+      break;
+
+    case 'H':
+      (*info->fprintf_func) (info->stream, "%%mask");
+      break;
+
     case 'J':
       {
 	static const struct { char *name; int value; } names[]
@@ -539,10 +551,19 @@ print_insn_arg (d, buffer, p0, addr, info)
       break;
 
     case 'M':
-      val = fetch_arg (buffer, place, 8, info);
-      if (val & 0x80)
-	val = val - 0x100;
-      (*info->fprintf_func) (info->stream, "#%d", val);
+      if (place == 'h')
+	{
+	  static char *const scalefactor_name[] = { "<<", ">>" };
+	  val = fetch_arg (buffer, place, 1, info);
+	  (*info->fprintf_func) (info->stream, scalefactor_name[val]);
+	}
+      else
+	{
+	  val = fetch_arg (buffer, place, 8, info);
+	  if (val & 0x80)
+	    val = val - 0x100;
+	  (*info->fprintf_func) (info->stream, "#%d", val);
+	}
       break;
 
     case 'T':
@@ -979,6 +1000,22 @@ print_insn_arg (d, buffer, p0, addr, info)
       }
       break;
 
+    case 'u':
+      {
+	short is_upper = 0;
+	int reg = fetch_arg (buffer, place, 5, info);
+	
+	if (reg & 0x10)
+	  {
+	    is_upper = 1;
+	    reg &= 0xf;
+	  }
+	(*info->fprintf_func) (info->stream, "%s%s",
+			       reg_names[reg],
+			       is_upper ? "u" : "l");
+      }
+      break;
+	
     default:
       return -2;
     }
@@ -1082,12 +1119,40 @@ fetch_arg (buffer, code, bits, info)
       val = (buffer[1] >> 6);
       break;
 
+    case 'm': 
+      val = (buffer[1] & 0x40 ? 0x8 : 0)
+	| ((buffer[0] >> 1) & 0x7)
+	| (buffer[3] & 0x80 ? 0x10 : 0);
+      break;
+
+    case 'n': 
+      val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7);
+      break;
+
+    case 'o':
+      val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0);
+      break;
+
+    case 'M':
+      val = buffer[1] | (buffer[3] & 0x40 ? 0x10 : 0);
+      break;
+
+    case 'N':
+      val = buffer[3] | (buffer[3] & 0x40 ? 0x10 : 0);
+      break;
+
+    case 'h':
+      val = buffer[2] >> 2;
+      break;
+
     default:
       abort ();
     }
 
   switch (bits)
     {
+    case 1:
+      return val & 1;
     case 2:
       return val & 3;
     case 3:
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 15e1b8d..847ad7c 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -35,16 +35,16 @@ const struct m68k_opcode m68k_opcodes[] =
 {"abcd",	one(0140410),	one(0170770), "-s-d", m68000up },
 
 {"addaw",	one(0150300),	one(0170700), "*wAd", m68000up },
-{"addal",	one(0150700),	one(0170700), "*lAd", m68000up | mcf5200 },
+{"addal",	one(0150700),	one(0170700), "*lAd", m68000up | mcf },
 
 {"addib",	one(0003000),	one(0177700), "#b$s", m68000up },
 {"addiw",	one(0003100),	one(0177700), "#w$s", m68000up },
 {"addil",	one(0003200),	one(0177700), "#l$s", m68000up },
-{"addil",	one(0003200),	one(0177700), "#lDs", mcf5200 },
+{"addil",	one(0003200),	one(0177700), "#lDs", mcf },
 
 {"addqb",	one(0050000),	one(0170700), "Qd$b", m68000up },
 {"addqw",	one(0050100),	one(0170700), "Qd%w", m68000up },
-{"addql",	one(0050200),	one(0170700), "Qd%l", m68000up | mcf5200 },
+{"addql",	one(0050200),	one(0170700), "Qd%l", m68000up | mcf },
 
 /* The add opcode can generate the adda, addi, and addq instructions.  */
 {"addb",	one(0050000),	one(0170700), "Qd$b", m68000up },
@@ -56,18 +56,18 @@ const struct m68k_opcode m68k_opcodes[] =
 {"addw",	one(0003100),	one(0177700), "#w$s", m68000up },
 {"addw",	one(0150100),	one(0170700), "*wDd", m68000up },
 {"addw",	one(0150500),	one(0170700), "Dd~w", m68000up },
-{"addl",	one(0050200),	one(0170700), "Qd%l", m68000up | mcf5200 },
+{"addl",	one(0050200),	one(0170700), "Qd%l", m68000up | mcf },
 {"addl",	one(0003200),	one(0177700), "#l$s", m68000up },
-{"addl",	one(0003200),	one(0177700), "#lDs", mcf5200 },
-{"addl",	one(0150700),	one(0170700), "*lAd", m68000up | mcf5200 },
-{"addl",	one(0150200),	one(0170700), "*lDd", m68000up | mcf5200 },
-{"addl",	one(0150600),	one(0170700), "Dd~l", m68000up | mcf5200 },
+{"addl",	one(0003200),	one(0177700), "#lDs", mcf },
+{"addl",	one(0150700),	one(0170700), "*lAd", m68000up | mcf },
+{"addl",	one(0150200),	one(0170700), "*lDd", m68000up | mcf },
+{"addl",	one(0150600),	one(0170700), "Dd~l", m68000up | mcf },
 
 {"addxb",	one(0150400),	one(0170770), "DsDd", m68000up },
 {"addxb",	one(0150410),	one(0170770), "-s-d", m68000up },
 {"addxw",	one(0150500),	one(0170770), "DsDd", m68000up },
 {"addxw",	one(0150510),	one(0170770), "-s-d", m68000up },
-{"addxl",	one(0150600),	one(0170770), "DsDd", m68000up | mcf5200 },
+{"addxl",	one(0150600),	one(0170770), "DsDd", m68000up | mcf },
 {"addxl",	one(0150610),	one(0170770), "-s-d", m68000up },
 
 {"andib",	one(0001000),	one(0177700), "#b$s", m68000up },
@@ -75,7 +75,7 @@ const struct m68k_opcode m68k_opcodes[] =
 {"andiw",	one(0001100),	one(0177700), "#w$s", m68000up },
 {"andiw",	one(0001174),	one(0177777), "#wSs", m68000up },
 {"andil",	one(0001200),	one(0177700), "#l$s", m68000up },
-{"andil",	one(0001200),	one(0177700), "#lDs", mcf5200 },
+{"andil",	one(0001200),	one(0177700), "#lDs", mcf },
 {"andi",	one(0001100),	one(0177700), "#w$s", m68000up },
 {"andi",	one(0001074),	one(0177777), "#bCs", m68000up },
 {"andi",	one(0001174),	one(0177777), "#wSs", m68000up },
@@ -90,9 +90,9 @@ const struct m68k_opcode m68k_opcodes[] =
 {"andw",	one(0140100),	one(0170700), ";wDd", m68000up },
 {"andw",	one(0140500),	one(0170700), "Dd~w", m68000up },
 {"andl",	one(0001200),	one(0177700), "#l$s", m68000up },
-{"andl",	one(0001200),	one(0177700), "#lDs", mcf5200 },
-{"andl",	one(0140200),	one(0170700), ";lDd", m68000up | mcf5200 },
-{"andl",	one(0140600),	one(0170700), "Dd~l", m68000up | mcf5200 },
+{"andl",	one(0001200),	one(0177700), "#lDs", mcf },
+{"andl",	one(0140200),	one(0170700), ";lDd", m68000up | mcf },
+{"andl",	one(0140600),	one(0170700), "Dd~l", m68000up | mcf },
 {"and",		one(0001100),	one(0177700), "#w$w", m68000up },
 {"and",		one(0001074),	one(0177777), "#bCs", m68000up },
 {"and",		one(0001174),	one(0177777), "#wSs", m68000up },
@@ -104,31 +104,31 @@ const struct m68k_opcode m68k_opcodes[] =
 {"aslw",	one(0160500),	one(0170770), "QdDs", m68000up },
 {"aslw",	one(0160540),	one(0170770), "DdDs", m68000up },
 {"aslw",	one(0160700),	one(0177700), "~s",   m68000up },
-{"asll",	one(0160600),	one(0170770), "QdDs", m68000up | mcf5200 },
-{"asll",	one(0160640),	one(0170770), "DdDs", m68000up | mcf5200 },
+{"asll",	one(0160600),	one(0170770), "QdDs", m68000up | mcf },
+{"asll",	one(0160640),	one(0170770), "DdDs", m68000up | mcf },
 
 {"asrb",	one(0160000),	one(0170770), "QdDs", m68000up },
 {"asrb",	one(0160040),	one(0170770), "DdDs", m68000up },
 {"asrw",	one(0160100),	one(0170770), "QdDs", m68000up },
 {"asrw",	one(0160140),	one(0170770), "DdDs", m68000up },
 {"asrw",	one(0160300),	one(0177700), "~s",   m68000up },
-{"asrl",	one(0160200),	one(0170770), "QdDs", m68000up | mcf5200 },
-{"asrl",	one(0160240),	one(0170770), "DdDs", m68000up | mcf5200 },
-
-{"bhiw",	one(0061000),	one(0177777), "BW", m68000up | mcf5200 },
-{"blsw",	one(0061400),	one(0177777), "BW", m68000up | mcf5200 },
-{"bccw",	one(0062000),	one(0177777), "BW", m68000up | mcf5200 },
-{"bcsw",	one(0062400),	one(0177777), "BW", m68000up | mcf5200 },
-{"bnew",	one(0063000),	one(0177777), "BW", m68000up | mcf5200 },
-{"beqw",	one(0063400),	one(0177777), "BW", m68000up | mcf5200 },
-{"bvcw",	one(0064000),	one(0177777), "BW", m68000up | mcf5200 },
-{"bvsw",	one(0064400),	one(0177777), "BW", m68000up | mcf5200 },
-{"bplw",	one(0065000),	one(0177777), "BW", m68000up | mcf5200 },
-{"bmiw",	one(0065400),	one(0177777), "BW", m68000up | mcf5200 },
-{"bgew",	one(0066000),	one(0177777), "BW", m68000up | mcf5200 },
-{"bltw",	one(0066400),	one(0177777), "BW", m68000up | mcf5200 },
-{"bgtw",	one(0067000),	one(0177777), "BW", m68000up | mcf5200 },
-{"blew",	one(0067400),	one(0177777), "BW", m68000up | mcf5200 },
+{"asrl",	one(0160200),	one(0170770), "QdDs", m68000up | mcf },
+{"asrl",	one(0160240),	one(0170770), "DdDs", m68000up | mcf },
+
+{"bhiw",	one(0061000),	one(0177777), "BW", m68000up | mcf },
+{"blsw",	one(0061400),	one(0177777), "BW", m68000up | mcf },
+{"bccw",	one(0062000),	one(0177777), "BW", m68000up | mcf },
+{"bcsw",	one(0062400),	one(0177777), "BW", m68000up | mcf },
+{"bnew",	one(0063000),	one(0177777), "BW", m68000up | mcf },
+{"beqw",	one(0063400),	one(0177777), "BW", m68000up | mcf },
+{"bvcw",	one(0064000),	one(0177777), "BW", m68000up | mcf },
+{"bvsw",	one(0064400),	one(0177777), "BW", m68000up | mcf },
+{"bplw",	one(0065000),	one(0177777), "BW", m68000up | mcf },
+{"bmiw",	one(0065400),	one(0177777), "BW", m68000up | mcf },
+{"bgew",	one(0066000),	one(0177777), "BW", m68000up | mcf },
+{"bltw",	one(0066400),	one(0177777), "BW", m68000up | mcf },
+{"bgtw",	one(0067000),	one(0177777), "BW", m68000up | mcf },
+{"blew",	one(0067400),	one(0177777), "BW", m68000up | mcf },
 
 {"bhil",	one(0061377),	one(0177777), "BL", m68020up | cpu32 },
 {"blsl",	one(0061777),	one(0177777), "BL", m68020up | cpu32 },
@@ -145,44 +145,44 @@ const struct m68k_opcode m68k_opcodes[] =
 {"bgtl",	one(0067377),	one(0177777), "BL", m68020up | cpu32 },
 {"blel",	one(0067777),	one(0177777), "BL", m68020up | cpu32 },
 
-{"bhis",	one(0061000),	one(0177400), "BB", m68000up | mcf5200 },
-{"blss",	one(0061400),	one(0177400), "BB", m68000up | mcf5200 },
-{"bccs",	one(0062000),	one(0177400), "BB", m68000up | mcf5200 },
-{"bcss",	one(0062400),	one(0177400), "BB", m68000up | mcf5200 },
-{"bnes",	one(0063000),	one(0177400), "BB", m68000up | mcf5200 },
-{"beqs",	one(0063400),	one(0177400), "BB", m68000up | mcf5200 },
-{"bvcs",	one(0064000),	one(0177400), "BB", m68000up | mcf5200 },
-{"bvss",	one(0064400),	one(0177400), "BB", m68000up | mcf5200 },
-{"bpls",	one(0065000),	one(0177400), "BB", m68000up | mcf5200 },
-{"bmis",	one(0065400),	one(0177400), "BB", m68000up | mcf5200 },
-{"bges",	one(0066000),	one(0177400), "BB", m68000up | mcf5200 },
-{"blts",	one(0066400),	one(0177400), "BB", m68000up | mcf5200 },
-{"bgts",	one(0067000),	one(0177400), "BB", m68000up | mcf5200 },
-{"bles",	one(0067400),	one(0177400), "BB", m68000up | mcf5200 },
-
-{"jhi",		one(0061000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jls",		one(0061400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jcc",		one(0062000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jcs",		one(0062400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jne",		one(0063000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jeq",		one(0063400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jvc",		one(0064000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jvs",		one(0064400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jpl",		one(0065000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jmi",		one(0065400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jge",		one(0066000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jlt",		one(0066400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jgt",		one(0067000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jle",		one(0067400),	one(0177400), "Bg", m68000up | mcf5200 },
-
-{"bchg",	one(0000500),	one(0170700), "Dd$s", m68000up | mcf5200 },
+{"bhis",	one(0061000),	one(0177400), "BB", m68000up | mcf },
+{"blss",	one(0061400),	one(0177400), "BB", m68000up | mcf },
+{"bccs",	one(0062000),	one(0177400), "BB", m68000up | mcf },
+{"bcss",	one(0062400),	one(0177400), "BB", m68000up | mcf },
+{"bnes",	one(0063000),	one(0177400), "BB", m68000up | mcf },
+{"beqs",	one(0063400),	one(0177400), "BB", m68000up | mcf },
+{"bvcs",	one(0064000),	one(0177400), "BB", m68000up | mcf },
+{"bvss",	one(0064400),	one(0177400), "BB", m68000up | mcf },
+{"bpls",	one(0065000),	one(0177400), "BB", m68000up | mcf },
+{"bmis",	one(0065400),	one(0177400), "BB", m68000up | mcf },
+{"bges",	one(0066000),	one(0177400), "BB", m68000up | mcf },
+{"blts",	one(0066400),	one(0177400), "BB", m68000up | mcf },
+{"bgts",	one(0067000),	one(0177400), "BB", m68000up | mcf },
+{"bles",	one(0067400),	one(0177400), "BB", m68000up | mcf },
+
+{"jhi",		one(0061000),	one(0177400), "Bg", m68000up | mcf },
+{"jls",		one(0061400),	one(0177400), "Bg", m68000up | mcf },
+{"jcc",		one(0062000),	one(0177400), "Bg", m68000up | mcf },
+{"jcs",		one(0062400),	one(0177400), "Bg", m68000up | mcf },
+{"jne",		one(0063000),	one(0177400), "Bg", m68000up | mcf },
+{"jeq",		one(0063400),	one(0177400), "Bg", m68000up | mcf },
+{"jvc",		one(0064000),	one(0177400), "Bg", m68000up | mcf },
+{"jvs",		one(0064400),	one(0177400), "Bg", m68000up | mcf },
+{"jpl",		one(0065000),	one(0177400), "Bg", m68000up | mcf },
+{"jmi",		one(0065400),	one(0177400), "Bg", m68000up | mcf },
+{"jge",		one(0066000),	one(0177400), "Bg", m68000up | mcf },
+{"jlt",		one(0066400),	one(0177400), "Bg", m68000up | mcf },
+{"jgt",		one(0067000),	one(0177400), "Bg", m68000up | mcf },
+{"jle",		one(0067400),	one(0177400), "Bg", m68000up | mcf },
+
+{"bchg",	one(0000500),	one(0170700), "Dd$s", m68000up | mcf },
 {"bchg",	one(0004100),	one(0177700), "#b$s", m68000up },
-{"bchg",	one(0004100),	one(0177700), "#bqs", mcf5200 },
+{"bchg",	one(0004100),	one(0177700), "#bqs", mcf },
 
 {"bclr",	one(0000600),	one(0170700), "Dd$s", m68000up },
-{"bclr",	one(0000600),	one(0170700), "Ddvs", mcf5200 },
+{"bclr",	one(0000600),	one(0170700), "Ddvs", mcf },
 {"bclr",	one(0004200),	one(0177700), "#b$s", m68000up },
-{"bclr",	one(0004200),	one(0177700), "#bqs", mcf5200 },
+{"bclr",	one(0004200),	one(0177700), "#bqs", mcf },
 
 {"bfchg",	two(0165300, 0), two(0177700, 0170000),	"?sO2O3",   m68020up },
 {"bfclr",	two(0166300, 0), two(0177700, 0170000),	"?sO2O3",   m68020up },
@@ -197,22 +197,22 @@ const struct m68k_opcode m68k_opcodes[] =
 
 {"bkpt",	one(0044110),		one(0177770), "ts", m68010up },
 
-{"braw",	one(0060000),	one(0177777), "BW", m68000up | mcf5200 },
+{"braw",	one(0060000),	one(0177777), "BW", m68000up | mcf },
 {"bral",	one(0060377),	one(0177777), "BL", m68020up | cpu32 },
-{"bras",	one(0060000),	one(0177400), "BB", m68000up | mcf5200 },
+{"bras",	one(0060000),	one(0177400), "BB", m68000up | mcf },
 
 {"bset",	one(0000700),	one(0170700), "Dd$s", m68000up },
-{"bset",	one(0000700),	one(0170700), "Ddvs", mcf5200 },
+{"bset",	one(0000700),	one(0170700), "Ddvs", mcf },
 {"bset",	one(0004300),	one(0177700), "#b$s", m68000up },
-{"bset",	one(0004300),	one(0177700), "#bqs", mcf5200 },
+{"bset",	one(0004300),	one(0177700), "#bqs", mcf },
 
-{"bsrw",	one(0060400),	one(0177777), "BW", m68000up | mcf5200 },
+{"bsrw",	one(0060400),	one(0177777), "BW", m68000up | mcf },
 {"bsrl",	one(0060777),	one(0177777), "BL", m68020up | cpu32 },
-{"bsrs",	one(0060400),	one(0177400), "BB", m68000up | mcf5200 },
+{"bsrs",	one(0060400),	one(0177400), "BB", m68000up | mcf },
 
-{"btst",	one(0000400),	one(0170700), "Dd;b", m68000up | mcf5200 },
+{"btst",	one(0000400),	one(0170700), "Dd;b", m68000up | mcf },
 {"btst",	one(0004000),	one(0177700), "#b@s", m68000up },
-{"btst",	one(0004000),	one(0177700), "#bqs", mcf5200 },
+{"btst",	one(0004000),	one(0177700), "#bqs", mcf },
 
 {"callm",	one(0003300),		one(0177700), "#b!s", m68020 },
 
@@ -242,28 +242,28 @@ const struct m68k_opcode m68k_opcodes[] =
 
 {"cpusha",	one(0xf420|SCOPE_ALL),  one(0xff38), "ce",   m68040up },
 {"cpushl",	one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up },
-{"cpushl",	one(0x04e8),		one(0xfff8), "as",   mcf5200  },
+{"cpushl",	one(0x04e8),		one(0xfff8), "as",   mcf },
 {"cpushp",	one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up },
 
 #undef SCOPE_LINE
 #undef SCOPE_PAGE
 #undef SCOPE_ALL
 
-{"clrb",	one(0041000),	one(0177700), "$s", m68000up | mcf5200 },
-{"clrw",	one(0041100),	one(0177700), "$s", m68000up | mcf5200 },
-{"clrl",	one(0041200),	one(0177700), "$s", m68000up | mcf5200 },
+{"clrb",	one(0041000),	one(0177700), "$s", m68000up | mcf },
+{"clrw",	one(0041100),	one(0177700), "$s", m68000up | mcf },
+{"clrl",	one(0041200),	one(0177700), "$s", m68000up | mcf },
 
 {"cmp2b",	two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
 {"cmp2w",	two(0001300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
 {"cmp2l",	two(0002300,0),	two(0177700,07777), "!sR1", m68020up | cpu32 },
 
 {"cmpaw",	one(0130300),	one(0170700), "*wAd", m68000up },
-{"cmpal",	one(0130700),	one(0170700), "*lAd", m68000up | mcf5200 },
+{"cmpal",	one(0130700),	one(0170700), "*lAd", m68000up | mcf },
 
 {"cmpib",	one(0006000),	one(0177700), "#b@s", m68000up },
 {"cmpiw",	one(0006100),	one(0177700), "#w@s", m68000up },
 {"cmpil",	one(0006200),	one(0177700), "#l@s", m68000up },
-{"cmpil",	one(0006200),	one(0177700), "#lDs", mcf5200 },
+{"cmpil",	one(0006200),	one(0177700), "#lDs", mcf },
 
 {"cmpmb",	one(0130410),	one(0170770), "+s+d", m68000up },
 {"cmpmw",	one(0130510),	one(0170770), "+s+d", m68000up },
@@ -277,11 +277,11 @@ const struct m68k_opcode m68k_opcodes[] =
 {"cmpw",	one(0006100),	one(0177700), "#w@s", m68000up },
 {"cmpw",	one(0130510),	one(0170770), "+s+d", m68000up },
 {"cmpw",	one(0130100),	one(0170700), "*wDd", m68000up },
-{"cmpl",	one(0130700),	one(0170700), "*lAd", m68000up | mcf5200 },
+{"cmpl",	one(0130700),	one(0170700), "*lAd", m68000up | mcf },
 {"cmpl",	one(0006200),	one(0177700), "#l@s", m68000up },
-{"cmpl",	one(0006200),	one(0177700), "#lDs", mcf5200 },
+{"cmpl",	one(0006200),	one(0177700), "#lDs", mcf },
 {"cmpl",	one(0130610),	one(0170770), "+s+d", m68000up },
-{"cmpl",	one(0130200),	one(0170700), "*lDd", m68000up | mcf5200 },
+{"cmpl",	one(0130200),	one(0170700), "*lDd", m68000up | mcf },
 
 {"dbcc",	one(0052310),	one(0177770), "DsBw", m68000up },
 {"dbcs",	one(0052710),	one(0177770), "DsBw", m68000up },
@@ -301,17 +301,21 @@ const struct m68k_opcode m68k_opcodes[] =
 {"dbvs",	one(0054710),	one(0177770), "DsBw", m68000up },
 
 {"divsw",	one(0100700),		one(0170700), ";wDd", m68000up },
+{"divsw",	one(0100700),   one(0170700), "vsDd", mcf5307 | mcf5206e },
 
 {"divsl", two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
 {"divsl", two(0046100,0004000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
+{"divsl", two(0046100,0004000),two(0177700,0107770),"vsDD",   mcf5307 | mcf5206e },
 
 {"divsll", two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
 {"divsll", two(0046100,0004000),two(0177700,0107770),";lDD",  m68020up|cpu32 },
 
 {"divuw",	one(0100300),		one(0170700), ";wDd", m68000up },
+{"divuw",	one(0100300),		one(0170700), "vsDd", mcf5307 | mcf5206e },
 
 {"divul", two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
 {"divul", two(0046100,0000000),two(0177700,0107770),";lDD",   m68020up|cpu32 },
+{"divul", two(0046100,0000000),two(0177700,0107770),"vsDD",   mcf5307 | mcf5206e },
 
 {"divull", two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
 {"divull", two(0046100,0000000),two(0177700,0107770),";lDD",  m68020up|cpu32 },
@@ -321,7 +325,7 @@ const struct m68k_opcode m68k_opcodes[] =
 {"eoriw",	one(0005100),	one(0177700), "#w$s", m68000up },
 {"eoriw",	one(0005174),	one(0177777), "#wSs", m68000up },
 {"eoril",	one(0005200),	one(0177700), "#l$s", m68000up },
-{"eoril",	one(0005200),	one(0177700), "#lDs", mcf5200 },
+{"eoril",	one(0005200),	one(0177700), "#lDs", mcf },
 {"eori",	one(0005074),	one(0177777), "#bCs", m68000up },
 {"eori",	one(0005174),	one(0177777), "#wSs", m68000up },
 {"eori",	one(0005100),	one(0177700), "#w$s", m68000up },
@@ -334,8 +338,8 @@ const struct m68k_opcode m68k_opcodes[] =
 {"eorw",	one(0005174),	one(0177777), "#wSs", m68000up },
 {"eorw",	one(0130500),	one(0170700), "Dd$s", m68000up },
 {"eorl",	one(0005200),	one(0177700), "#l$s", m68000up },
-{"eorl",	one(0005200),	one(0177700), "#lDs", mcf5200 },
-{"eorl",	one(0130600),	one(0170700), "Dd$s", m68000up | mcf5200 },
+{"eorl",	one(0005200),	one(0177700), "#lDs", mcf },
+{"eorl",	one(0130600),	one(0170700), "Dd$s", m68000up | mcf },
 {"eor",		one(0005074),	one(0177777), "#bCs", m68000up },
 {"eor",		one(0005174),	one(0177777), "#wSs", m68000up },
 {"eor",		one(0005100),	one(0177700), "#w$s", m68000up },
@@ -346,9 +350,9 @@ const struct m68k_opcode m68k_opcodes[] =
 {"exg",		one(0140610),	one(0170770), "DdAs", m68000up },
 {"exg",		one(0140610),	one(0170770), "AsDd", m68000up },
 
-{"extw",	one(0044200),	one(0177770), "Ds", m68000up|mcf5200 },
-{"extl",	one(0044300),	one(0177770), "Ds", m68000up|mcf5200 },
-{"extbl",	one(0044700),	one(0177770), "Ds", m68020up|cpu32|mcf5200 },
+{"extw",	one(0044200),	one(0177770), "Ds", m68000up|mcf },
+{"extl",	one(0044300),	one(0177770), "Ds", m68000up|mcf },
+{"extbl",	one(0044700),	one(0177770), "Ds", m68020up|cpu32|mcf },
 
 /* float stuff starts here */
 
@@ -1198,27 +1202,27 @@ const struct m68k_opcode m68k_opcodes[] =
 {"ftwotoxx",	two(0xF000, 0x4811), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
 {"ftwotoxx",	two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiFt",   mfloat },
 
-{"halt",	one(0045310),	one(0177777), "",     m68060 | mcf5200 },
+{"halt",	one(0045310),	one(0177777), "",     m68060 | mcf },
 
 {"illegal",	one(0045374),	one(0177777), "",     m68000up },
 
-{"jmp",		one(0047300),	one(0177700), "!s", m68000up | mcf5200 },
+{"jmp",		one(0047300),	one(0177700), "!s", m68000up | mcf },
 
-{"jra",		one(0060000),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jra",		one(0047300),	one(0177700), "!s", m68000up | mcf5200 },
+{"jra",		one(0060000),	one(0177400), "Bg", m68000up | mcf },
+{"jra",		one(0047300),	one(0177700), "!s", m68000up | mcf },
 
-{"jsr",		one(0047200),	one(0177700), "!s", m68000up | mcf5200 },
+{"jsr",		one(0047200),	one(0177700), "!s", m68000up | mcf },
 
-{"jbsr",	one(0060400),	one(0177400), "Bg", m68000up | mcf5200 },
-{"jbsr",	one(0047200),	one(0177700), "!s", m68000up | mcf5200 },
+{"jbsr",	one(0060400),	one(0177400), "Bg", m68000up | mcf },
+{"jbsr",	one(0047200),	one(0177700), "!s", m68000up | mcf },
 
-{"lea",		one(0040700),	one(0170700), "!sAd", m68000up | mcf5200 },
+{"lea",		one(0040700),	one(0170700), "!sAd", m68000up | mcf },
 
 {"lpstop",	two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 },
 
-{"linkw",	one(0047120),	one(0177770), "As#w", m68000up | mcf5200 },
+{"linkw",	one(0047120),	one(0177770), "As#w", m68000up | mcf },
 {"linkl",	one(0044010),	one(0177770), "As#l", m68020up | cpu32 },
-{"link",	one(0047120),	one(0177770), "As#W", m68000up | mcf5200 },
+{"link",	one(0047120),	one(0177770), "As#W", m68000up | mcf },
 {"link",	one(0044010),	one(0177770), "As#l", m68020up | cpu32 },
 
 {"lslb",	one(0160410),	one(0170770), "QdDs", m68000up },
@@ -1226,16 +1230,55 @@ const struct m68k_opcode m68k_opcodes[] =
 {"lslw",	one(0160510),	one(0170770), "QdDs", m68000up },
 {"lslw",	one(0160550),	one(0170770), "DdDs", m68000up },
 {"lslw",	one(0161700),	one(0177700), "~s",   m68000up },
-{"lsll",	one(0160610),	one(0170770), "QdDs", m68000up | mcf5200 },
-{"lsll",	one(0160650),	one(0170770), "DdDs", m68000up | mcf5200 },
+{"lsll",	one(0160610),	one(0170770), "QdDs", m68000up | mcf },
+{"lsll",	one(0160650),	one(0170770), "DdDs", m68000up | mcf },
 
 {"lsrb",	one(0160010),	one(0170770), "QdDs", m68000up },
 {"lsrb",	one(0160050),	one(0170770), "DdDs", m68000up },
 {"lsrw",	one(0160110),	one(0170770), "QdDs", m68000up },
 {"lsrw",	one(0160150),	one(0170770), "DdDs", m68000up },
 {"lsrw",	one(0161300),	one(0177700), "~s",   m68000up },
-{"lsrl",	one(0160210),	one(0170770), "QdDs", m68000up | mcf5200 },
-{"lsrl",	one(0160250),	one(0170770), "DdDs", m68000up | mcf5200 },
+{"lsrl",	one(0160210),	one(0170770), "QdDs", m68000up | mcf },
+{"lsrl",	one(0160250),	one(0170770), "DdDs", m68000up | mcf },
+
+  /* FIXME: add MAM mode (`&' after <ea> operand) / remove MACM */
+{"macw",  two(0120000, 0000000), two(0170660, 0005400), "uMum", mcf5307 | mcf5206e },
+{"macw",  two(0120000, 0001000), two(0170660, 0005400), "uMumMh", mcf5307 | mcf5206e },
+{"macw",  two(0120220, 0000000), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e },
+{"macw",  two(0120230, 0000000), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e },
+{"macw",  two(0120240, 0000000), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e },
+{"macw",  two(0120250, 0000000), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e },
+{"macw",  two(0120220, 0001000), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e },
+{"macw",  two(0120230, 0001000), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e },
+{"macw",  two(0120240, 0001000), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e },
+{"macw",  two(0120250, 0001000), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e },
+{"macmw", two(0120220, 0000040), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e },
+{"macmw", two(0120230, 0000040), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e },
+{"macmw", two(0120240, 0000040), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e },
+{"macmw", two(0120250, 0000040), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e },
+{"macmw", two(0120220, 0001040), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e },
+{"macmw", two(0120230, 0001040), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e },
+{"macmw", two(0120240, 0001040), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e },
+{"macmw", two(0120250, 0001040), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e },
+
+{"macl",  two(0120000, 0004000), two(0170660, 0005400), "RsRm", mcf5307 | mcf5206e },
+{"macl",  two(0120000, 0005000), two(0170660, 0005400), "RsRmMh", mcf5307 | mcf5206e },
+{"macl",  two(0120220, 0004000), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e },
+{"macl",  two(0120230, 0004000), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e },
+{"macl",  two(0120240, 0004000), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e },
+{"macl",  two(0120250, 0004000), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e },
+{"macl",  two(0120220, 0005000), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e },
+{"macl",  two(0120230, 0005000), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e },
+{"macl",  two(0120240, 0005000), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e },
+{"macl",  two(0120250, 0005000), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e },
+{"macml", two(0120220, 0004040), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e },
+{"macml", two(0120230, 0004040), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e },
+{"macml", two(0120240, 0004040), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e },
+{"macml", two(0120250, 0004040), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e },
+{"macml", two(0120220, 0005040), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e },
+{"macml", two(0120230, 0005040), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e },
+{"macml", two(0120240, 0005040), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e },
+{"macml", two(0120250, 0005040), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e },
 
 /* NOTE: The mcf5200 family programmer's reference manual does not 
    indicate the byte form of the movea instruction is invalid (as it
@@ -1254,11 +1297,11 @@ const struct m68k_opcode m68k_opcodes[] =
 	jtc@cygnus.com - 97/01/24
  */
 
-{"moveal",	one(0020100),	one(0170700), "*lAd", m68000up | mcf5200 },
-{"moveaw",	one(0030100),	one(0170700), "*wAd", m68000up | mcf5200 },
+{"moveal",	one(0020100),	one(0170700), "*lAd", m68000up | mcf },
+{"moveaw",	one(0030100),	one(0170700), "*wAd", m68000up | mcf },
 
-{"movec",	one(0047173),	one(0177777), "R1Jj", m68010up | mcf5200 },
-{"movec",	one(0047173),	one(0177777), "R1#j", m68010up | mcf5200 },
+{"movec",	one(0047173),	one(0177777), "R1Jj", m68010up | mcf },
+{"movec",	one(0047173),	one(0177777), "R1#j", m68010up | mcf },
 {"movec",	one(0047172),	one(0177777), "JjR1", m68010up },
 {"movec",	one(0047172),	one(0177777), "#jR1", m68010up },
 
@@ -1273,66 +1316,76 @@ const struct m68k_opcode m68k_opcodes[] =
 {"moveml",	one(0046300),	one(0177700), "<sLw", m68000up },
 {"moveml",	one(0046300),	one(0177700), "<s#w", m68000up },
 /* FIXME: need specifier for mode 2 and 5 to simplify below insn patterns */
-{"moveml",	one(0044320),	one(0177770), "Lwas", mcf5200 },
-{"moveml",	one(0044320),	one(0177770), "#was", mcf5200 },
-{"moveml",	one(0044350),	one(0177770), "Lwds", mcf5200 },
-{"moveml",	one(0044350),	one(0177770), "#wds", mcf5200 },
-{"moveml",	one(0046320),	one(0177770), "asLw", mcf5200 },
-{"moveml",	one(0046320),	one(0177770), "as#w", mcf5200 },
-{"moveml",	one(0046350),	one(0177770), "dsLw", mcf5200 },
-{"moveml",	one(0046350),	one(0177770), "ds#w", mcf5200 },
+{"moveml",	one(0044320),	one(0177770), "Lwas", mcf },
+{"moveml",	one(0044320),	one(0177770), "#was", mcf },
+{"moveml",	one(0044350),	one(0177770), "Lwds", mcf },
+{"moveml",	one(0044350),	one(0177770), "#wds", mcf },
+{"moveml",	one(0046320),	one(0177770), "asLw", mcf },
+{"moveml",	one(0046320),	one(0177770), "as#w", mcf },
+{"moveml",	one(0046350),	one(0177770), "dsLw", mcf },
+{"moveml",	one(0046350),	one(0177770), "ds#w", mcf },
 
 {"movepw",	one(0000410),	one(0170770), "dsDd", m68000up },
 {"movepw",	one(0000610),	one(0170770), "Ddds", m68000up },
 {"movepl",	one(0000510),	one(0170770), "dsDd", m68000up },
 {"movepl",	one(0000710),	one(0170770), "Ddds", m68000up },
 
-{"moveq",	one(0070000),	one(0170400), "MsDd", m68000up | mcf5200 },
-{"moveq",	one(0070000),	one(0170400), "#BDd", m68000up | mcf5200 },
+{"moveq",	one(0070000),	one(0170400), "MsDd", m68000up | mcf },
+{"moveq",	one(0070000),	one(0170400), "#BDd", m68000up | mcf },
 
 /* The move opcode can generate the movea and moveq instructions.  */
 {"moveb",	one(0010000),	one(0170000), ";b$d", m68000up },
-{"moveb",	one(0010000),	one(0170000), "ms%d", mcf5200 },
-{"moveb",	one(0010000),	one(0170000), "nspd", mcf5200 },
-{"moveb",	one(0010000),	one(0170000), "obmd", mcf5200 },
+{"moveb",	one(0010000),	one(0170000), "ms%d", mcf },
+{"moveb",	one(0010000),	one(0170000), "nspd", mcf },
+{"moveb",	one(0010000),	one(0170000), "obmd", mcf },
 
 {"movew",	one(0030000),	one(0170000), "*w%d", m68000up },
-{"movew",	one(0030000),	one(0170000), "ms%d", mcf5200 },
-{"movew",	one(0030000),	one(0170000), "nspd", mcf5200 },
-{"movew",	one(0030000),	one(0170000), "owmd", mcf5200 },
+{"movew",	one(0030000),	one(0170000), "ms%d", mcf },
+{"movew",	one(0030000),	one(0170000), "nspd", mcf },
+{"movew",	one(0030000),	one(0170000), "owmd", mcf },
 {"movew",	one(0040300),	one(0177700), "Ss$s", m68000up },
-{"movew",	one(0040300),	one(0177770), "SsDs", mcf5200 },
+{"movew",	one(0040300),	one(0177770), "SsDs", mcf },
 {"movew",	one(0041300),	one(0177700), "Cs$s", m68010up },
-{"movew",	one(0041300),	one(0177770), "CsDs", mcf5200 },
+{"movew",	one(0041300),	one(0177770), "CsDs", mcf },
 {"movew",	one(0042300),	one(0177700), ";wCd", m68000up },
-{"movew",	one(0042300),	one(0177700), "DsCd", mcf5200 },
-{"movew",	one(0042374),	one(0177777), "#wCd", mcf5200 },
+{"movew",	one(0042300),	one(0177700), "DsCd", mcf },
+{"movew",	one(0042374),	one(0177777), "#wCd", mcf },
 {"movew",	one(0043300),	one(0177700), ";wSd", m68000up },
-{"movew",	one(0043300),	one(0177700), "DsSd", mcf5200 },
-{"movew",	one(0043374),	one(0177777), "#wSd", mcf5200 },
+{"movew",	one(0043300),	one(0177700), "DsSd", mcf },
+{"movew",	one(0043374),	one(0177777), "#wSd", mcf },
 
-{"movel",	one(0070000),	one(0170400), "MsDd", m68000up | mcf5200 },
+{"movel",	one(0070000),	one(0170400), "MsDd", m68000up | mcf },
 {"movel",	one(0020000),	one(0170000), "*l%d", m68000up },
-{"movel",	one(0020000),	one(0170000), "ms%d", mcf5200 },
-{"movel",	one(0020000),	one(0170000), "nspd", mcf5200 },
-{"movel",	one(0020000),	one(0170000), "olmd", mcf5200 },
+{"movel",	one(0020000),	one(0170000), "ms%d", mcf },
+{"movel",	one(0020000),	one(0170000), "nspd", mcf },
+{"movel",	one(0020000),	one(0170000), "olmd", mcf },
 {"movel",	one(0047140),	one(0177770), "AsUd", m68000up },
 {"movel",	one(0047150),	one(0177770), "UdAs", m68000up },
+{"movel",	one(0120600),	one(0177760), "EsRs", mcf5307 | mcf5206e },
+{"movel",	one(0120400),	one(0177760), "RsEs", mcf5307 | mcf5206e },
+{"movel",	one(0120474),	one(0177777), "#lEs", mcf5307 | mcf5206e },
+{"movel",	one(0124600),	one(0177760), "GsRs", mcf5307 | mcf5206e },
+{"movel",	one(0124400),	one(0177760), "RsGs", mcf5307 | mcf5206e },
+{"movel",	one(0124474),	one(0177777), "#lGs", mcf5307 | mcf5206e },
+{"movel",	one(0126600),	one(0177760), "HsRs", mcf5307 | mcf5206e },
+{"movel",	one(0126400),	one(0177760), "RsHs", mcf5307 | mcf5206e },
+{"movel",	one(0126474),	one(0177777), "#lHs", mcf5307 | mcf5206e },
+{"movel",	one(0124700),	one(0177777), "GsCs", mcf5307 | mcf5206e },
 
 {"move",	one(0030000),	one(0170000), "*w%d", m68000up },
-{"move",	one(0030000),	one(0170000), "ms%d", mcf5200 },
-{"move",	one(0030000),	one(0170000), "nspd", mcf5200 },
-{"move",	one(0030000),	one(0170000), "owmd", mcf5200 },
+{"move",	one(0030000),	one(0170000), "ms%d", mcf },
+{"move",	one(0030000),	one(0170000), "nspd", mcf },
+{"move",	one(0030000),	one(0170000), "owmd", mcf },
 {"move",	one(0040300),	one(0177700), "Ss$s", m68000up },
-{"move",	one(0040300),	one(0177770), "SsDs", mcf5200 },
+{"move",	one(0040300),	one(0177770), "SsDs", mcf },
 {"move",	one(0041300),	one(0177700), "Cs$s", m68010up },
-{"move",	one(0041300),	one(0177770), "CsDs", mcf5200 },
+{"move",	one(0041300),	one(0177770), "CsDs", mcf },
 {"move",	one(0042300),	one(0177700), ";wCd", m68000up },
-{"move",	one(0042300),	one(0177700), "DsCd", mcf5200 },
-{"move",	one(0042374),	one(0177777), "#wCd", mcf5200 },
+{"move",	one(0042300),	one(0177700), "DsCd", mcf },
+{"move",	one(0042374),	one(0177777), "#wCd", mcf },
 {"move",	one(0043300),	one(0177700), ";wSd", m68000up },
-{"move",	one(0043300),	one(0177700), "DsSd", mcf5200 },
-{"move",	one(0043374),	one(0177777), "#wSd", mcf5200 },
+{"move",	one(0043300),	one(0177700), "DsSd", mcf },
+{"move",	one(0043374),	one(0177777), "#wSd", mcf },
 
 {"move",	one(0047140),	one(0177770), "AsUd", m68000up },
 {"move",	one(0047150),	one(0177770), "UdAs", m68000up },
@@ -1350,14 +1403,53 @@ const struct m68k_opcode m68k_opcodes[] =
 {"move16",	one(0xf610),		one(0xfff8), "as_L", m68040up },
 {"move16",	one(0xf618),		one(0xfff8), "_Las", m68040up },
 
-{"mulsw",	one(0140700),		one(0170700), ";wDd", m68000up|mcf5200 },
+  /* FIXME: add MAM mode (`&' after <ea> operand) / remove MSACM */
+{"msacw",  two(0120000, 0000400), two(0170660, 0005400), "uMum", mcf5307 | mcf5206e },
+{"msacw",  two(0120000, 0001400), two(0170660, 0005400), "uMumMh", mcf5307 | mcf5206e },
+{"msacw",  two(0120220, 0000400), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120230, 0000400), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120240, 0000400), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120250, 0000400), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120220, 0001400), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120230, 0001400), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120240, 0001400), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e },
+{"msacw",  two(0120250, 0001400), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120220, 0000440), two(0170670, 0005460), "uNuoasRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120230, 0000440), two(0170670, 0005460), "uNuo+sRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120240, 0000440), two(0170670, 0005460), "uNuo-sRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120250, 0000440), two(0170670, 0005460), "uNuodsRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120220, 0001440), two(0170670, 0005460), "uNuoMhasRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120230, 0001440), two(0170670, 0005460), "uNuoMh+sRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120240, 0001440), two(0170670, 0005460), "uNuoMh-sRn", mcf5307 | mcf5206e },
+{"msacmw", two(0120250, 0001440), two(0170670, 0005460), "uNuoMhdsRn", mcf5307 | mcf5206e },
+
+{"msacl",  two(0120000, 0004400), two(0170660, 0005400), "RsRm", mcf5307 | mcf5206e },
+{"msacl",  two(0120000, 0005400), two(0170660, 0005400), "RsRmMh", mcf5307 | mcf5206e },
+{"msacl",  two(0120220, 0004400), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120230, 0004400), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120240, 0004400), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120250, 0004400), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120220, 0005400), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120230, 0005400), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120240, 0005400), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e },
+{"msacl",  two(0120250, 0005400), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e },
+{"msacml", two(0120220, 0004440), two(0170670, 0005460), "R3R1asRn", mcf5307 | mcf5206e },
+{"msacml", two(0120230, 0004440), two(0170670, 0005460), "R3R1+sRn", mcf5307 | mcf5206e },
+{"msacml", two(0120240, 0004440), two(0170670, 0005460), "R3R1-sRn", mcf5307 | mcf5206e },
+{"msacml", two(0120250, 0004440), two(0170670, 0005460), "R3R1dsRn", mcf5307 | mcf5206e },
+{"msacml", two(0120220, 0005440), two(0170670, 0005460), "R3R1MhasRn", mcf5307 | mcf5206e },
+{"msacml", two(0120230, 0005440), two(0170670, 0005460), "R3R1Mh+sRn", mcf5307 | mcf5206e },
+{"msacml", two(0120240, 0005440), two(0170670, 0005460), "R3R1Mh-sRn", mcf5307 | mcf5206e },
+{"msacml", two(0120250, 0005440), two(0170670, 0005460), "R3R1MhdsRn", mcf5307 | mcf5206e },
+
+{"mulsw",	one(0140700),		one(0170700), ";wDd", m68000up|mcf },
 {"mulsl",	two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
-{"mulsl",	two(0046000,004000), two(0177700,0107770), "qsD1", mcf5200 },
+{"mulsl",	two(0046000,004000), two(0177700,0107770), "qsD1", mcf },
 {"mulsl",	two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
 
-{"muluw",	one(0140300),		one(0170700), ";wDd", m68000up|mcf5200 },
+{"muluw",	one(0140300),		one(0170700), ";wDd", m68000up|mcf },
 {"mulul",	two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
-{"mulul",	two(0046000,000000), two(0177700,0107770), "qsD1", mcf5200 },
+{"mulul",	two(0046000,000000), two(0177700,0107770), "qsD1", mcf },
 {"mulul",	two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
 
 {"nbcd",	one(0044000),	one(0177700), "$s", m68000up },
@@ -1365,26 +1457,26 @@ const struct m68k_opcode m68k_opcodes[] =
 {"negb",	one(0042000),	one(0177700), "$s", m68000up },
 {"negw",	one(0042100),	one(0177700), "$s", m68000up },
 {"negl",	one(0042200),	one(0177700), "$s", m68000up },
-{"negl",	one(0042200),	one(0177700), "Ds", mcf5200},
+{"negl",	one(0042200),	one(0177700), "Ds", mcf},
 
 {"negxb",	one(0040000),	one(0177700), "$s", m68000up },
 {"negxw",	one(0040100),	one(0177700), "$s", m68000up },
 {"negxl",	one(0040200),	one(0177700), "$s", m68000up },
-{"negxl",	one(0040200),	one(0177700), "Ds", mcf5200},
+{"negxl",	one(0040200),	one(0177700), "Ds", mcf},
 
-{"nop",		one(0047161),	one(0177777), "", m68000up | mcf5200},
+{"nop",		one(0047161),	one(0177777), "", m68000up | mcf},
 
 {"notb",	one(0043000),	one(0177700), "$s", m68000up },
 {"notw",	one(0043100),	one(0177700), "$s", m68000up },
 {"notl",	one(0043200),	one(0177700), "$s", m68000up },
-{"notl",	one(0043200),	one(0177700), "Ds", mcf5200},
+{"notl",	one(0043200),	one(0177700), "Ds", mcf},
 
 {"orib",	one(0000000),	one(0177700), "#b$s", m68000up },
 {"orib",	one(0000074),	one(0177777), "#bCs", m68000up },
 {"oriw",	one(0000100),	one(0177700), "#w$s", m68000up },
 {"oriw",	one(0000174),	one(0177777), "#wSs", m68000up },
 {"oril",	one(0000200),	one(0177700), "#l$s", m68000up },
-{"oril",	one(0000200),	one(0177700), "#lDs", mcf5200 },
+{"oril",	one(0000200),	one(0177700), "#lDs", mcf },
 {"ori",		one(0000074),	one(0177777), "#bCs", m68000up },
 {"ori",		one(0000100),	one(0177700), "#w$s", m68000up },
 {"ori",		one(0000174),	one(0177777), "#wSs", m68000up },
@@ -1399,9 +1491,9 @@ const struct m68k_opcode m68k_opcodes[] =
 {"orw",		one(0100100),	one(0170700), ";wDd", m68000up },
 {"orw",		one(0100500),	one(0170700), "Dd~s", m68000up },
 {"orl",		one(0000200),	one(0177700), "#l$s", m68000up },
-{"orl",		one(0000200),	one(0177700), "#lDs", mcf5200 },
-{"orl",		one(0100200),	one(0170700), ";lDd", m68000up | mcf5200 },
-{"orl",		one(0100600),	one(0170700), "Dd~s", m68000up | mcf5200 },
+{"orl",		one(0000200),	one(0177700), "#lDs", mcf },
+{"orl",		one(0100200),	one(0170700), ";lDd", m68000up | mcf },
+{"orl",		one(0100600),	one(0170700), "Dd~s", m68000up | mcf },
 {"or",		one(0000074),	one(0177777), "#bCs", m68000up },
 {"or",		one(0000100),	one(0177700), "#w$s", m68000up },
 {"or",		one(0000174),	one(0177777), "#wSs", m68000up },
@@ -1461,7 +1553,7 @@ const struct m68k_opcode m68k_opcodes[] =
 {"pdbwc",	two(0xf048, 0x0009),	two(0xfff8, 0xffff), "DsBw", m68851 },
 {"pdbws",	two(0xf048, 0x0008),	two(0xfff8, 0xffff), "DsBw", m68851 },
 
-{"pea",		one(0044100),		one(0177700), "!s", m68000up|mcf5200 },
+{"pea",		one(0044100),		one(0177700), "!s", m68000up|mcf },
 
 {"pflusha",	one(0xf518),		one(0xfff8), "", m68040up },
 {"pflusha",	two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 },
@@ -1619,11 +1711,14 @@ const struct m68k_opcode m68k_opcodes[] =
 {"ptrapwsl",	two(0xf07b, 0x0008),	two(0xffff, 0xffff), "#l", m68851 },
 {"ptrapws",	two(0xf07c, 0x0008),	two(0xffff, 0xffff), "",   m68851 },
 
-{"pulse",	one(0045314),		one(0177777), "", m68060 | mcf5200 },
+{"pulse",	one(0045314),		one(0177777), "", m68060 | mcf },
 
 {"pvalid",	two(0xf000, 0x2800),	two(0xffc0, 0xffff), "Vs&s", m68851 },
 {"pvalid",	two(0xf000, 0x2c00),	two(0xffc0, 0xfff8), "A3&s", m68851 },
 
+  /* FIXME: don't allow Dw==Dx. */
+{"remsl",       two(0x4c40, 0x0800),    two(0xffc0, 0x8ff8), "vsD3D1", mcf5307 | mcf5206e },
+{"remul",       two(0x4c40, 0x0000),    two(0xffc0, 0x8ff8), "vsD3D1", mcf5307 | mcf5206e },
 
 {"reset",	one(0047160),		one(0177777), "", m68000up },
 
@@ -1661,64 +1756,64 @@ const struct m68k_opcode m68k_opcodes[] =
 
 {"rtd",		one(0047164),		one(0177777), "#w", m68010up },
 
-{"rte",		one(0047163),		one(0177777), "",   m68000up|mcf5200 },
+{"rte",		one(0047163),		one(0177777), "",   m68000up|mcf },
 
 {"rtm",		one(0003300),		one(0177760), "Rs", m68020 },
 
 {"rtr",		one(0047167),		one(0177777), "",   m68000up },
 
-{"rts",		one(0047165),		one(0177777), "",   m68000up|mcf5200 },
+{"rts",		one(0047165),		one(0177777), "",   m68000up|mcf },
 
 {"sbcd",	one(0100400),		one(0170770), "DsDd", m68000up },
 {"sbcd",	one(0100410),		one(0170770), "-s-d", m68000up },
 
 
 {"scc",		one(0052300),	one(0177700), "$s", m68000up },
-{"scc",		one(0052300),	one(0177700), "Ds", mcf5200 },
+{"scc",		one(0052300),	one(0177700), "Ds", mcf },
 {"scs",		one(0052700),	one(0177700), "$s", m68000up },
-{"scs",		one(0052700),	one(0177700), "Ds", mcf5200 },
+{"scs",		one(0052700),	one(0177700), "Ds", mcf },
 {"seq",		one(0053700),	one(0177700), "$s", m68000up },
-{"seq",		one(0053700),	one(0177700), "Ds", mcf5200 },
+{"seq",		one(0053700),	one(0177700), "Ds", mcf },
 {"sf",		one(0050700),	one(0177700), "$s", m68000up },
-{"sf",		one(0050700),	one(0177700), "Ds", mcf5200 },
+{"sf",		one(0050700),	one(0177700), "Ds", mcf },
 {"sge",		one(0056300),	one(0177700), "$s", m68000up },
-{"sge",		one(0056300),	one(0177700), "Ds", mcf5200 },
+{"sge",		one(0056300),	one(0177700), "Ds", mcf },
 {"sgt",		one(0057300),	one(0177700), "$s", m68000up },
-{"sgt",		one(0057300),	one(0177700), "Ds", mcf5200 },
+{"sgt",		one(0057300),	one(0177700), "Ds", mcf },
 {"shi",		one(0051300),	one(0177700), "$s", m68000up },
-{"shi",		one(0051300),	one(0177700), "Ds", mcf5200 },
+{"shi",		one(0051300),	one(0177700), "Ds", mcf },
 {"sle",		one(0057700),	one(0177700), "$s", m68000up },
-{"sle",		one(0057700),	one(0177700), "Ds", mcf5200 },
+{"sle",		one(0057700),	one(0177700), "Ds", mcf },
 {"sls",		one(0051700),	one(0177700), "$s", m68000up },
-{"sls",		one(0051700),	one(0177700), "Ds", mcf5200 },
+{"sls",		one(0051700),	one(0177700), "Ds", mcf },
 {"slt",		one(0056700),	one(0177700), "$s", m68000up },
-{"slt",		one(0056700),	one(0177700), "Ds", mcf5200 },
+{"slt",		one(0056700),	one(0177700), "Ds", mcf },
 {"smi",		one(0055700),	one(0177700), "$s", m68000up },
-{"smi",		one(0055700),	one(0177700), "Ds", mcf5200 },
+{"smi",		one(0055700),	one(0177700), "Ds", mcf },
 {"sne",		one(0053300),	one(0177700), "$s", m68000up },
-{"sne",		one(0053300),	one(0177700), "Ds", mcf5200 },
+{"sne",		one(0053300),	one(0177700), "Ds", mcf },
 {"spl",		one(0055300),	one(0177700), "$s", m68000up },
-{"spl",		one(0055300),	one(0177700), "Ds", mcf5200 },
+{"spl",		one(0055300),	one(0177700), "Ds", mcf },
 {"st",		one(0050300),	one(0177700), "$s", m68000up },
-{"st",		one(0050300),	one(0177700), "Ds", mcf5200 },
+{"st",		one(0050300),	one(0177700), "Ds", mcf },
 {"svc",		one(0054300),	one(0177700), "$s", m68000up },
-{"svc",		one(0054300),	one(0177700), "Ds", mcf5200 },
+{"svc",		one(0054300),	one(0177700), "Ds", mcf },
 {"svs",		one(0054700),	one(0177700), "$s", m68000up },
-{"svs",		one(0054700),	one(0177700), "Ds", mcf5200 },
+{"svs",		one(0054700),	one(0177700), "Ds", mcf },
 
-{"stop",	one(0047162),	one(0177777), "#w", m68000up | mcf5200 },
+{"stop",	one(0047162),	one(0177777), "#w", m68000up | mcf },
 
-{"subal",	one(0110700),	one(0170700), "*lAd", m68000up | mcf5200 },
+{"subal",	one(0110700),	one(0170700), "*lAd", m68000up | mcf },
 {"subaw",	one(0110300),	one(0170700), "*wAd", m68000up },
 
 {"subib",	one(0002000),	one(0177700), "#b$s", m68000up },
 {"subiw",	one(0002100),	one(0177700), "#w$s", m68000up },
 {"subil",	one(0002200),	one(0177700), "#l$s", m68000up },
-{"subil",	one(0002200),	one(0177700), "#lDs", mcf5200 },
+{"subil",	one(0002200),	one(0177700), "#lDs", mcf },
 
 {"subqb",	one(0050400),	one(0170700), "Qd%s", m68000up },
 {"subqw",	one(0050500),	one(0170700), "Qd%s", m68000up },
-{"subql",	one(0050600),	one(0170700), "Qd%s", m68000up | mcf5200 },
+{"subql",	one(0050600),	one(0170700), "Qd%s", m68000up | mcf },
 
 /* The sub opcode can generate the suba, subi, and subq instructions.  */
 {"subb",	one(0050400),	one(0170700), "Qd%s", m68000up },
@@ -1730,21 +1825,21 @@ const struct m68k_opcode m68k_opcodes[] =
 {"subw",	one(0110300),	one(0170700), "*wAd", m68000up },
 {"subw",	one(0110100),	one(0170700), "*wDd", m68000up },
 {"subw",	one(0110500),	one(0170700), "Dd~s", m68000up },
-{"subl",	one(0050600),	one(0170700), "Qd%s", m68000up | mcf5200 },
+{"subl",	one(0050600),	one(0170700), "Qd%s", m68000up | mcf },
 {"subl",	one(0002200),	one(0177700), "#l$s", m68000up },
-{"subl",	one(0002200),	one(0177700), "#lDs", mcf5200 },
-{"subl",	one(0110700),	one(0170700), "*lAd", m68000up | mcf5200 },
-{"subl",	one(0110200),	one(0170700), "*lDd", m68000up | mcf5200 },
-{"subl",	one(0110600),	one(0170700), "Dd~s", m68000up | mcf5200 },
+{"subl",	one(0002200),	one(0177700), "#lDs", mcf },
+{"subl",	one(0110700),	one(0170700), "*lAd", m68000up | mcf },
+{"subl",	one(0110200),	one(0170700), "*lDd", m68000up | mcf },
+{"subl",	one(0110600),	one(0170700), "Dd~s", m68000up | mcf },
 
 {"subxb",	one(0110400),	one(0170770), "DsDd", m68000up },
 {"subxb",	one(0110410),	one(0170770), "-s-d", m68000up },
 {"subxw",	one(0110500),	one(0170770), "DsDd", m68000up },
 {"subxw",	one(0110510),	one(0170770), "-s-d", m68000up },
-{"subxl",	one(0110600),	one(0170770), "DsDd", m68000up | mcf5200 },
+{"subxl",	one(0110600),	one(0170770), "DsDd", m68000up | mcf },
 {"subxl",	one(0110610),	one(0170770), "-s-d", m68000up },
 
-{"swap",	one(0044100),	one(0177770), "Ds", m68000up | mcf5200 },
+{"swap",	one(0044100),	one(0177770), "Ds", m68000up | mcf },
 
 /* swbeg and swbegl are magic constants used on sysV68.  The compiler
    generates them before a switch table.  They tell the debugger and
@@ -1752,8 +1847,8 @@ const struct m68k_opcode m68k_opcodes[] =
    number of elements in the table.  swbeg means that the entries in
    the table are word (2 byte) sized, and swbegl means that the
    entries in the table are longword (4 byte) sized.  */
-{"swbeg",	one(0045374),	one(0177777), "#w",   m68000up | mcf5200 },
-{"swbegl",	one(0045375),	one(0177777), "#l",   m68000up | mcf5200 },
+{"swbeg",	one(0045374),	one(0177777), "#w",   m68000up | mcf },
+{"swbegl",	one(0045375),	one(0177777), "#l",   m68000up | mcf },
 
 {"tas",		one(0045300),		one(0177700), "$s", m68000up },
 
@@ -1769,12 +1864,12 @@ TBL("tblsnb", "tblsnw", "tblsnl", 1, 0),
 TBL("tblub", "tbluw", "tblul", 0, 1),
 TBL("tblunb", "tblunw", "tblunl", 0, 0),
 
-{"trap",	one(0047100),	one(0177760), "Ts", m68000up | mcf5200 },
+{"trap",	one(0047100),	one(0177760), "Ts", m68000up | mcf },
 
 {"trapcc",	one(0052374),	one(0177777), "", m68020up | cpu32 },
 {"trapcs",	one(0052774),	one(0177777), "", m68020up | cpu32 },
 {"trapeq",	one(0053774),	one(0177777), "", m68020up | cpu32 },
-{"trapf",	one(0050774),	one(0177777), "", m68020up | cpu32 | mcf5200 },
+{"trapf",	one(0050774),	one(0177777), "", m68020up | cpu32 | mcf },
 {"trapge",	one(0056374),	one(0177777), "", m68020up | cpu32 },
 {"trapgt",	one(0057374),	one(0177777), "", m68020up | cpu32 },
 {"traphi",	one(0051374),	one(0177777), "", m68020up | cpu32 },
@@ -1791,7 +1886,7 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
 {"trapccw",	one(0052372),	one(0177777), "#w", m68020up|cpu32 },
 {"trapcsw",	one(0052772),	one(0177777), "#w", m68020up|cpu32 },
 {"trapeqw",	one(0053772),	one(0177777), "#w", m68020up|cpu32 },
-{"trapfw",	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcf5200},
+{"trapfw",	one(0050772),	one(0177777), "#w", m68020up|cpu32|mcf},
 {"trapgew",	one(0056372),	one(0177777), "#w", m68020up|cpu32 },
 {"trapgtw",	one(0057372),	one(0177777), "#w", m68020up|cpu32 },
 {"traphiw",	one(0051372),	one(0177777), "#w", m68020up|cpu32 },
@@ -1808,7 +1903,7 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
 {"trapccl",	one(0052373),	one(0177777), "#l", m68020up|cpu32 },
 {"trapcsl",	one(0052773),	one(0177777), "#l", m68020up|cpu32 },
 {"trapeql",	one(0053773),	one(0177777), "#l", m68020up|cpu32 },
-{"trapfl",	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcf5200},
+{"trapfl",	one(0050773),	one(0177777), "#l", m68020up|cpu32|mcf},
 {"trapgel",	one(0056373),	one(0177777), "#l", m68020up|cpu32 },
 {"trapgtl",	one(0057373),	one(0177777), "#l", m68020up|cpu32 },
 {"traphil",	one(0051373),	one(0177777), "#l", m68020up|cpu32 },
@@ -1824,21 +1919,21 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
 
 {"trapv",	one(0047166),	one(0177777), "", m68000up },
 
-{"tstb",	one(0045000),	one(0177700), ";b", m68020up|cpu32|mcf5200 },
+{"tstb",	one(0045000),	one(0177700), ";b", m68020up|cpu32|mcf },
 {"tstb",	one(0045000),	one(0177700), "$b", m68000up },
-{"tstw",	one(0045100),	one(0177700), "*w", m68020up|cpu32|mcf5200 },
+{"tstw",	one(0045100),	one(0177700), "*w", m68020up|cpu32|mcf },
 {"tstw",	one(0045100),	one(0177700), "$w", m68000up },
-{"tstl",	one(0045200),	one(0177700), "*l", m68020up|cpu32|mcf5200 },
+{"tstl",	one(0045200),	one(0177700), "*l", m68020up|cpu32|mcf },
 {"tstl",	one(0045200),	one(0177700), "$l", m68000up },
 
-{"unlk",	one(0047130),	one(0177770), "As", m68000up | mcf5200 },
+{"unlk",	one(0047130),	one(0177770), "As", m68000up | mcf },
 
 {"unpk",	one(0100600),	one(0170770), "DsDd#w", m68020up },
 {"unpk",	one(0100610),	one(0170770), "-s-d#w", m68020up },
 
-{"wddatab",	one(0172000),   one(0177700), "~s", mcf5200 },
-{"wddataw",	one(0172100),   one(0177700), "~s", mcf5200 },
-{"wddatal",	one(0172200),   one(0177700), "~s", mcf5200 },
+{"wddatab",	one(0172000),   one(0177700), "~s", mcf },
+{"wddataw",	one(0172100),   one(0177700), "~s", mcf },
+{"wddatal",	one(0172200),   one(0177700), "~s", mcf },
 
 };
 
@@ -1973,6 +2068,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] =
   { "leal",	"lea", },
   { "lsl",	"lslw", },
   { "lsr",	"lsrw", },
+  { "mac",	"macw" },
   { "movea",	"moveaw", },
   { "movem",	"movemw", },
   { "movml",	"moveml", },
@@ -1983,6 +2079,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] =
   { "moves",	"movesw" },
   { "muls",	"mulsw", },
   { "mulu",	"muluw", },
+  { "msac",	"msacw" },
   { "nbcdb",	"nbcd" },
   { "neg",	"negw", },
   { "negx",	"negxw", },