diff options
| author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 11:32:32 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 11:32:32 +0000 |
| commit | f2ae14a1cc3f5349d6c99417c1cbe2ca3b0fabe5 (patch) | |
| tree | c59b2486103f55a7f04726252e2ac9f11aab53c5 | |
| parent | d070d2a2539dd2bca2710172969e73ae2c5f43af (diff) | |
| download | gdb-f2ae14a1cc3f5349d6c99417c1cbe2ca3b0fabe5.zip gdb-f2ae14a1cc3f5349d6c99417c1cbe2ca3b0fabe5.tar.gz gdb-f2ae14a1cc3f5349d6c99417c1cbe2ca3b0fabe5.tar.bz2 | |
include/opcode/
* mips.h (M_ACLR_OB, M_ASET_OB, M_CACHE_OB, M_CACHEE_OB, M_L_DOB)
(M_LB_A, M_LBE_OB, M_LBU_A, M_LBUE_OB, M_LD_A, M_LD_OB, M_LDC2_OB)
(M_LDL_OB, M_LDM_OB, M_LDP_OB, M_LDR_OB, M_LH_A, M_LHE_OB, M_LHU_A)
(M_LHUE_OB, M_LL_OB, M_LLD_OB, M_LLE_OB, M_LS_A, M_LW_A, M_LWE_OB)
(M_LWC0_A, M_LWC1_A, M_LWC2_A, M_LWC2_OB, M_LWC3_A, M_LWL_A, M_LWL_OB)
(M_LWLE_OB, M_LWM_OB, M_LWP_OB, M_LWR_A, M_LWR_OB, M_LWRE_OB, M_LWU_OB)
(M_PREF_OB, M_PREFE_OB, M_S_DOB, M_SAA_OB, M_SAAD_OB, M_SC_OB)
(M_SCD_OB, M_SCE_OB, M_SD_A, M_SD_OB, M_SDC2_OB, M_SDL_OB, M_SDM_OB)
(M_SDP_OB, M_SDR_OB, M_SB_A, M_SBE_OB, M_SH_A, M_SHE_OB, M_SW_A)
(M_SWE_OB, M_SWC0_A, M_SWC1_A, M_SWC2_A, M_SWC2_OB, M_SWC3_A, M_SWL_A)
(M_SWL_OB, M_SWLE_OB, M_SWM_OB, M_SWP_OB, M_SWR_A, M_SWR_OB, M_SWRE_OB)
(M_ULD, M_ULH, M_ULHU, M_ULW, M_USH, M_USW, M_USD): Delete.
(M_ULD_A, M_ULH_A, M_ULHU_A, M_ULW_A, M_USH_A, M_USW_A, M_USD_A):
Rename to...
(M_ULD_AB, M_ULH_AB, M_ULHU_AB, M_ULW_AB, M_USH_AB, M_USW_AB)
(M_USD_AB): ...these.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Remove o(b) macros. Move LD
and SD A(B) macros up.
* micromips-opc.c (micromips_opcodes): Likewise.
gas/
* config/tc-mips.c (gprel16_reloc_p): New function.
(macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
BFD_RELOC_UNUSED.
(offset_high_part, small_offset_p): New functions.
(nacro): Use them. Remove *_OB and *_DOB cases. For single-
register load and store macros, handle the 16-bit offset case first.
If a 16-bit offset is not suitable for the instruction we're
generating, load it into the temporary register using
ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
M_L_DAB code once the address has been constructed. For double load
and store macros, again handle the 16-bit offset case first.
If the second register cannot be accessed from the same high
part as the first, load it into AT using ADDRESS_ADDI_INSN.
Fix the handling of LD in cases where the first register is the
same as the base. Also handle the case where the offset is
not 16 bits and the second register cannot be accessed from the
same high part as the first. For unaligned loads and stores,
fuse the offbits == 12 and old "ab" handling. Apply this handling
whenever the second offset needs a different high part from the first.
Construct the offset using ADDRESS_ADDI_INSN where possible,
for offbits == 16 as well as offbits == 12. Use offset_reloc
when constructing the individual loads and stores.
(mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
and offset_reloc before matching against a particular opcode.
Handle elided 'A' constants. Allow 'A' constants to use
relocation operators.
gas/testsuite/
* gas/mips/ldstla-32.d: Avoid "lui at,0x0" sequences for
truncated constants.
* gas/mips/ldstla-32-shared.d: Likewise.
* gas/mips/mcu.d: Use ADDIU in preference to LI+ADDU when adding
16-bit constants to the base.
* gas/mips/micromips@mcu.d: Likewise.
* gas/mips/micromips@cache.d: Likewise.
* gas/mips/micromips@pref.d: Likewise.
* gas/mips/micromips.d, gas/mips/micromips-insn32.d,
gas/mips/micromips-noinsn32.d, gas/mips/micromips-trap.d: Likewise.
Allow the full 16-bit offset range to be used for SB, LB and LBU in
USH and ULH sequences. Fix the expected output for LD and SD when
the two LW and SW offsets need different high parts.
* gas/mips/eva.s: Test PREFE with relocation operators.
* gas/mips/eva.d: Use ADDIU in preference to LI+ADDU for 16-bit
constants. Update after eva.s change.
* gas/mips/micromips@eva.d: Likewise.
* gas/mips/ld-reloc.s, gas/mips/ld-reloc.d, gas/mips/l_d-reloc.s,
gas/mips/l_d-reloc.d, gas/mips/ulw-reloc.s, gas/mips/ulw-reloc.d,
gas/mips/micromips@ulw-reloc.d, gas/mips/ulh-reloc.s,
gas/mips/ulh-reloc.d: New tests.
* gas/mips/mips.exp: Run them.
31 files changed, 3520 insertions, 3920 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 7e100eb..48b382e 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,34 @@ 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * config/tc-mips.c (gprel16_reloc_p): New function. + (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are + BFD_RELOC_UNUSED. + (offset_high_part, small_offset_p): New functions. + (nacro): Use them. Remove *_OB and *_DOB cases. For single- + register load and store macros, handle the 16-bit offset case first. + If a 16-bit offset is not suitable for the instruction we're + generating, load it into the temporary register using + ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the + M_L_DAB code once the address has been constructed. For double load + and store macros, again handle the 16-bit offset case first. + If the second register cannot be accessed from the same high + part as the first, load it into AT using ADDRESS_ADDI_INSN. + Fix the handling of LD in cases where the first register is the + same as the base. Also handle the case where the offset is + not 16 bits and the second register cannot be accessed from the + same high part as the first. For unaligned loads and stores, + fuse the offbits == 12 and old "ab" handling. Apply this handling + whenever the second offset needs a different high part from the first. + Construct the offset using ADDRESS_ADDI_INSN where possible, + for offbits == 16 as well as offbits == 12. Use offset_reloc + when constructing the individual loads and stores. + (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc + and offset_reloc before matching against a particular opcode. + Handle elided 'A' constants. Allow 'A' constants to use + relocation operators. + +2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling. (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions. Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 8fdb124..5c6424e 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -3096,6 +3096,13 @@ jalr_reloc_p (bfd_reloc_code_real_type reloc) return reloc == BFD_RELOC_MIPS_JALR || reloc == BFD_RELOC_MICROMIPS_JALR; } +static inline bfd_boolean +gprel16_reloc_p (bfd_reloc_code_real_type reloc) +{ + return (reloc == BFD_RELOC_GPREL16 || reloc == BFD_RELOC_MIPS16_GPREL + || reloc == BFD_RELOC_MICROMIPS_GPREL16); +} + /* Return true if RELOC is a PC-relative relocation that does not have full address range. */ @@ -5265,8 +5272,15 @@ macro_read_relocs (va_list *args, bfd_reloc_code_real_type *r) if (next >= 0) r[0] = (bfd_reloc_code_real_type) next; else - for (i = 0; i < 3; i++) - r[i] = (bfd_reloc_code_real_type) va_arg (*args, int); + { + for (i = 0; i < 3; i++) + r[i] = (bfd_reloc_code_real_type) va_arg (*args, int); + /* This function is only used for 16-bit relocation fields. + To make the macro code simpler, treat an unrelocated value + in the same way as BFD_RELOC_LO16. */ + if (r[0] == BFD_RELOC_UNUSED) + r[0] = BFD_RELOC_LO16; + } } /* Build an instruction created by a macro expansion. This is passed @@ -6734,6 +6748,48 @@ macro_build_branch_rsrt (int type, expressionS *ep, macro_build (ep, br, "s,t,p", sreg, treg); } +/* Return the high part that should be loaded in order to make the low + part of VALUE accessible using an offset of OFFBITS bits. */ + +static offsetT +offset_high_part (offsetT value, unsigned int offbits) +{ + offsetT bias; + addressT low_mask; + + if (offbits == 0) + return value; + bias = 1 << (offbits - 1); + low_mask = bias * 2 - 1; + return (value + bias) & ~low_mask; +} + +/* Return true if the value stored in offset_expr and offset_reloc + fits into a signed offset of OFFBITS bits. RANGE is the maximum + amount that the caller wants to add without inducing overflow + and ALIGN is the known alignment of the value in bytes. */ + +static bfd_boolean +small_offset_p (unsigned int range, unsigned int align, unsigned int offbits) +{ + if (offbits == 16) + { + /* Accept any relocation operator if overflow isn't a concern. */ + if (range < align && *offset_reloc != BFD_RELOC_UNUSED) + return TRUE; + + /* These relocations are guaranteed not to overflow in correct links. */ + if (*offset_reloc == BFD_RELOC_MIPS_LITERAL + || gprel16_reloc_p (*offset_reloc)) + return TRUE; + } + if (offset_expr.X_op == O_constant + && offset_high_part (offset_expr.X_add_number, offbits) == 0 + && offset_high_part (offset_expr.X_add_number + range, offbits) == 0) + return TRUE; + return FALSE; +} + /* * Build macros * This routine implements the seemingly endless macro or synthesized @@ -6774,10 +6830,10 @@ macro (struct mips_cl_insn *ip, char *str) int imm = 0; int ust = 0; int lp = 0; - int ab = 0; + bfd_boolean large_offset; int off; - bfd_reloc_code_real_type r; int hold_mips_optimize; + unsigned int align; gas_assert (! mips_opts.mips16); @@ -6795,6 +6851,7 @@ macro (struct mips_cl_insn *ip, char *str) expr1.X_op_symbol = NULL; expr1.X_add_symbol = NULL; expr1.X_add_number = 1; + align = 1; switch (mask) { @@ -7540,12 +7597,10 @@ macro (struct mips_cl_insn *ip, char *str) if (!dbl && HAVE_64BIT_OBJECTS) as_warn (_("la used to load 64-bit address")); - if (offset_expr.X_op == O_constant - && offset_expr.X_add_number >= -0x8000 - && offset_expr.X_add_number < 0x8000) + if (small_offset_p (0, align, 16)) { - macro_build (&offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", treg, sreg, BFD_RELOC_LO16); + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", treg, breg, + -1, offset_reloc[0], offset_reloc[1], offset_reloc[2]); break; } @@ -8397,146 +8452,108 @@ macro (struct mips_cl_insn *ip, char *str) break; case M_LBUE_AB: - ab = 1; - case M_LBUE_OB: s = "lbue"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LHUE_AB: - ab = 1; - case M_LHUE_OB: s = "lhue"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LBE_AB: - ab = 1; - case M_LBE_OB: s = "lbe"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LHE_AB: - ab = 1; - case M_LHE_OB: s = "lhe"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LLE_AB: - ab = 1; - case M_LLE_OB: s = "lle"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LWE_AB: - ab = 1; - case M_LWE_OB: s = "lwe"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LWLE_AB: - ab = 1; - case M_LWLE_OB: s = "lwle"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_LWRE_AB: - ab = 1; - case M_LWRE_OB: s = "lwre"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_SBE_AB: - ab = 1; - case M_SBE_OB: s = "sbe"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_SCE_AB: - ab = 1; - case M_SCE_OB: s = "sce"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_SHE_AB: - ab = 1; - case M_SHE_OB: s = "she"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_SWE_AB: - ab = 1; - case M_SWE_OB: s = "swe"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_SWLE_AB: - ab = 1; - case M_SWLE_OB: s = "swle"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_SWRE_AB: - ab = 1; - case M_SWRE_OB: s = "swre"; fmt = "t,+j(b)"; offbits = 9; goto ld_st; case M_ACLR_AB: - ab = 1; - case M_ACLR_OB: s = "aclr"; treg = EXTRACT_OPERAND (mips_opts.micromips, 3BITPOS, *ip); fmt = "\\,~(b)"; offbits = 12; goto ld_st; case M_ASET_AB: - ab = 1; - case M_ASET_OB: s = "aset"; treg = EXTRACT_OPERAND (mips_opts.micromips, 3BITPOS, *ip); fmt = "\\,~(b)"; offbits = 12; goto ld_st; case M_LB_AB: - ab = 1; s = "lb"; fmt = "t,o(b)"; goto ld; case M_LBU_AB: - ab = 1; s = "lbu"; fmt = "t,o(b)"; goto ld; case M_LH_AB: - ab = 1; s = "lh"; fmt = "t,o(b)"; goto ld; case M_LHU_AB: - ab = 1; s = "lhu"; fmt = "t,o(b)"; goto ld; case M_LW_AB: - ab = 1; s = "lw"; fmt = "t,o(b)"; goto ld; case M_LWC0_AB: - ab = 1; gas_assert (!mips_opts.micromips); s = "lwc0"; fmt = "E,o(b)"; @@ -8544,15 +8561,12 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_LWC1_AB: - ab = 1; s = "lwc1"; fmt = "T,o(b)"; /* Itbl support may require additional care here. */ coproc = 1; goto ld_st; case M_LWC2_AB: - ab = 1; - case M_LWC2_OB: s = "lwc2"; fmt = COP12_FMT; offbits = (mips_opts.micromips ? 12 : 16); @@ -8560,7 +8574,6 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_LWC3_AB: - ab = 1; gas_assert (!mips_opts.micromips); s = "lwc3"; fmt = "E,o(b)"; @@ -8568,29 +8581,22 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_LWL_AB: - ab = 1; - case M_LWL_OB: s = "lwl"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_LWR_AB: - ab = 1; - case M_LWR_OB: s = "lwr"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_LDC1_AB: - ab = 1; s = "ldc1"; fmt = "T,o(b)"; /* Itbl support may require additional care here. */ coproc = 1; goto ld_st; case M_LDC2_AB: - ab = 1; - case M_LDC2_OB: s = "ldc2"; fmt = COP12_FMT; offbits = (mips_opts.micromips ? 12 : 16); @@ -8598,57 +8604,43 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_LQC2_AB: - ab = 1; s = "lqc2"; fmt = "E,o(b)"; /* Itbl support may require additional care here. */ coproc = 1; goto ld_st; case M_LDC3_AB: - ab = 1; s = "ldc3"; fmt = "E,o(b)"; /* Itbl support may require additional care here. */ coproc = 1; goto ld_st; case M_LDL_AB: - ab = 1; - case M_LDL_OB: s = "ldl"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_LDR_AB: - ab = 1; - case M_LDR_OB: s = "ldr"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_LL_AB: - ab = 1; - case M_LL_OB: s = "ll"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld; case M_LLD_AB: - ab = 1; - case M_LLD_OB: s = "lld"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld; case M_LWU_AB: - ab = 1; - case M_LWU_OB: s = "lwu"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld; case M_LWP_AB: - ab = 1; - case M_LWP_OB: gas_assert (mips_opts.micromips); s = "lwp"; fmt = "t,~(b)"; @@ -8656,8 +8648,6 @@ macro (struct mips_cl_insn *ip, char *str) lp = 1; goto ld; case M_LDP_AB: - ab = 1; - case M_LDP_OB: gas_assert (mips_opts.micromips); s = "ldp"; fmt = "t,~(b)"; @@ -8665,16 +8655,12 @@ macro (struct mips_cl_insn *ip, char *str) lp = 1; goto ld; case M_LWM_AB: - ab = 1; - case M_LWM_OB: gas_assert (mips_opts.micromips); s = "lwm"; fmt = "n,~(b)"; offbits = 12; goto ld_st; case M_LDM_AB: - ab = 1; - case M_LDM_OB: gas_assert (mips_opts.micromips); s = "ldm"; fmt = "n,~(b)"; @@ -8690,22 +8676,18 @@ macro (struct mips_cl_insn *ip, char *str) goto ld_noat; case M_SB_AB: - ab = 1; s = "sb"; fmt = "t,o(b)"; goto ld_st; case M_SH_AB: - ab = 1; s = "sh"; fmt = "t,o(b)"; goto ld_st; case M_SW_AB: - ab = 1; s = "sw"; fmt = "t,o(b)"; goto ld_st; case M_SWC0_AB: - ab = 1; gas_assert (!mips_opts.micromips); s = "swc0"; fmt = "E,o(b)"; @@ -8713,15 +8695,12 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_SWC1_AB: - ab = 1; s = "swc1"; fmt = "T,o(b)"; /* Itbl support may require additional care here. */ coproc = 1; goto ld_st; case M_SWC2_AB: - ab = 1; - case M_SWC2_OB: s = "swc2"; fmt = COP12_FMT; offbits = (mips_opts.micromips ? 12 : 16); @@ -8729,7 +8708,6 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_SWC3_AB: - ab = 1; gas_assert (!mips_opts.micromips); s = "swc3"; fmt = "E,o(b)"; @@ -8737,71 +8715,52 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_SWL_AB: - ab = 1; - case M_SWL_OB: s = "swl"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_SWR_AB: - ab = 1; - case M_SWR_OB: s = "swr"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_SC_AB: - ab = 1; - case M_SC_OB: s = "sc"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_SCD_AB: - ab = 1; - case M_SCD_OB: s = "scd"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_CACHE_AB: - ab = 1; - case M_CACHE_OB: s = "cache"; fmt = mips_opts.micromips ? "k,~(b)" : "k,o(b)"; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_CACHEE_AB: - ab = 1; - case M_CACHEE_OB: s = "cachee"; fmt = "k,+j(b)"; offbits = 9; goto ld_st; case M_PREF_AB: - ab = 1; - case M_PREF_OB: s = "pref"; fmt = !mips_opts.micromips ? "k,o(b)" : "k,~(b)"; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_PREFE_AB: - ab = 1; - case M_PREFE_OB: s = "prefe"; fmt = "k,+j(b)"; offbits = 9; goto ld_st; case M_SDC1_AB: - ab = 1; s = "sdc1"; fmt = "T,o(b)"; coproc = 1; /* Itbl support may require additional care here. */ goto ld_st; case M_SDC2_AB: - ab = 1; - case M_SDC2_OB: s = "sdc2"; fmt = COP12_FMT; offbits = (mips_opts.micromips ? 12 : 16); @@ -8809,14 +8768,12 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_SQC2_AB: - ab = 1; s = "sqc2"; fmt = "E,o(b)"; /* Itbl support may require additional care here. */ coproc = 1; goto ld_st; case M_SDC3_AB: - ab = 1; gas_assert (!mips_opts.micromips); s = "sdc3"; fmt = "E,o(b)"; @@ -8824,46 +8781,34 @@ macro (struct mips_cl_insn *ip, char *str) coproc = 1; goto ld_st; case M_SDL_AB: - ab = 1; - case M_SDL_OB: s = "sdl"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_SDR_AB: - ab = 1; - case M_SDR_OB: s = "sdr"; fmt = MEM12_FMT; offbits = (mips_opts.micromips ? 12 : 16); goto ld_st; case M_SWP_AB: - ab = 1; - case M_SWP_OB: gas_assert (mips_opts.micromips); s = "swp"; fmt = "t,~(b)"; offbits = 12; goto ld_st; case M_SDP_AB: - ab = 1; - case M_SDP_OB: gas_assert (mips_opts.micromips); s = "sdp"; fmt = "t,~(b)"; offbits = 12; goto ld_st; case M_SWM_AB: - ab = 1; - case M_SWM_OB: gas_assert (mips_opts.micromips); s = "swm"; fmt = "n,~(b)"; offbits = 12; goto ld_st; case M_SDM_AB: - ab = 1; - case M_SDM_OB: gas_assert (mips_opts.micromips); s = "sdm"; fmt = "n,~(b)"; @@ -8871,8 +8816,41 @@ macro (struct mips_cl_insn *ip, char *str) ld_st: tempreg = AT; - used_at = 1; ld_noat: + if (small_offset_p (0, align, 16)) + { + /* The first case exists for M_LD_AB and M_SD_AB, which are + macros for o32 but which should act like normal instructions + otherwise. */ + if (offbits == 16) + macro_build (&offset_expr, s, fmt, treg, -1, offset_reloc[0], + offset_reloc[1], offset_reloc[2], breg); + else if (small_offset_p (0, align, offbits)) + { + if (offbits == 0) + macro_build (NULL, s, fmt, treg, breg); + else + macro_build (NULL, s, fmt, treg, + (unsigned long) offset_expr.X_add_number, breg); + } + else + { + if (tempreg == AT) + used_at = 1; + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", + tempreg, breg, -1, offset_reloc[0], + offset_reloc[1], offset_reloc[2]); + if (offbits == 0) + macro_build (NULL, s, fmt, treg, tempreg); + else + macro_build (NULL, s, fmt, treg, 0L, tempreg); + } + break; + } + + if (tempreg == AT) + used_at = 1; + if (offset_expr.X_op != O_constant && offset_expr.X_op != O_symbol) { @@ -8893,79 +8871,40 @@ macro (struct mips_cl_insn *ip, char *str) is in non PIC code. */ if (offset_expr.X_op == O_constant) { - int hipart = 0; + expr1.X_add_number = offset_high_part (offset_expr.X_add_number, + offbits == 0 ? 16 : offbits); + offset_expr.X_add_number -= expr1.X_add_number; - expr1.X_add_number = offset_expr.X_add_number; - normalize_address_expr (&expr1); - if ((offbits == 0 || offbits == 16) - && !IS_SEXT_16BIT_NUM (expr1.X_add_number)) - { - expr1.X_add_number = ((expr1.X_add_number + 0x8000) - & ~(bfd_vma) 0xffff); - hipart = 1; - } - else if (offbits == 12 && !IS_SEXT_12BIT_NUM (expr1.X_add_number)) - { - expr1.X_add_number = ((expr1.X_add_number + 0x800) - & ~(bfd_vma) 0xfff); - hipart = 1; - } - else if (offbits == 9 && !IS_SEXT_9BIT_NUM (expr1.X_add_number)) - { - expr1.X_add_number = ((expr1.X_add_number + 0x100) - & ~(bfd_vma) 0x1ff); - hipart = 1; - } - if (hipart) - { - load_register (tempreg, &expr1, HAVE_64BIT_ADDRESSES); - if (breg != 0) - macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, tempreg, breg); - breg = tempreg; - } + load_register (tempreg, &expr1, HAVE_64BIT_ADDRESSES); + if (breg != 0) + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", + tempreg, tempreg, breg); if (offbits == 0) { - if (offset_expr.X_add_number == 0) - tempreg = breg; - else + if (offset_expr.X_add_number != 0) macro_build (&offset_expr, ADDRESS_ADDI_INSN, - "t,r,j", tempreg, breg, BFD_RELOC_LO16); + "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); macro_build (NULL, s, fmt, treg, tempreg); } else if (offbits == 16) - macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, breg); + macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_LO16, tempreg); else - macro_build (NULL, s, fmt, - treg, (unsigned long) offset_expr.X_add_number, breg); + macro_build (NULL, s, fmt, treg, + (unsigned long) offset_expr.X_add_number, tempreg); } else if (offbits != 16) { /* The offset field is too narrow to be used for a low-part relocation, so load the whole address into the auxillary - register. In the case of "A(b)" addresses, we first load - absolute address "A" into the register and then add base - register "b". In the case of "o(b)" addresses, we simply - need to add 16-bit offset "o" to base register "b", and - offset_reloc already contains the relocations associated - with "o". */ - if (ab) - { - load_address (tempreg, &offset_expr, &used_at); - if (breg != 0) - macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, tempreg, breg); - } - else - macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", - tempreg, breg, -1, - offset_reloc[0], offset_reloc[1], offset_reloc[2]); - expr1.X_add_number = 0; + register. */ + load_address (tempreg, &offset_expr, &used_at); + if (breg != 0) + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", + tempreg, tempreg, breg); if (offbits == 0) macro_build (NULL, s, fmt, treg, tempreg); else - macro_build (NULL, s, fmt, - treg, (unsigned long) expr1.X_add_number, tempreg); + macro_build (NULL, s, fmt, treg, 0L, tempreg); } else if (mips_pic == NO_PIC) { @@ -9423,16 +9362,11 @@ macro (struct mips_cl_insn *ip, char *str) && offset_expr.X_add_number == 0); s = segment_name (S_GET_SEGMENT (offset_expr.X_add_symbol)); if (strcmp (s, ".lit8") == 0) - { - if (CPU_HAS_LDC1_SDC1 (mips_opts.arch) || mips_opts.micromips) - { - macro_build (&offset_expr, "ldc1", "T,o(b)", treg, - BFD_RELOC_MIPS_LITERAL, mips_gp_register); - break; - } - breg = mips_gp_register; - r = BFD_RELOC_MIPS_LITERAL; - goto dob; + { + breg = mips_gp_register; + offset_reloc[0] = BFD_RELOC_MIPS_LITERAL; + offset_reloc[1] = BFD_RELOC_UNUSED; + offset_reloc[2] = BFD_RELOC_UNUSED; } else { @@ -9447,47 +9381,15 @@ macro (struct mips_cl_insn *ip, char *str) macro_build_lui (&offset_expr, AT); } - if (CPU_HAS_LDC1_SDC1 (mips_opts.arch) || mips_opts.micromips) - { - macro_build (&offset_expr, "ldc1", "T,o(b)", - treg, BFD_RELOC_LO16, AT); - break; - } breg = AT; - r = BFD_RELOC_LO16; - goto dob; - } - - case M_L_DOB: - /* Even on a big endian machine $fn comes before $fn+1. We have - to adjust when loading from memory. */ - r = BFD_RELOC_LO16; - dob: - gas_assert (!mips_opts.micromips); - gas_assert (!CPU_HAS_LDC1_SDC1 (mips_opts.arch)); - macro_build (&offset_expr, "lwc1", "T,o(b)", - target_big_endian ? treg + 1 : treg, r, breg); - /* FIXME: A possible overflow which I don't know how to deal - with. */ - offset_expr.X_add_number += 4; - macro_build (&offset_expr, "lwc1", "T,o(b)", - target_big_endian ? treg : treg + 1, r, breg); - break; - - case M_S_DOB: - gas_assert (!mips_opts.micromips); - gas_assert (!CPU_HAS_LDC1_SDC1 (mips_opts.arch)); - /* Even on a big endian machine $fn comes before $fn+1. We have - to adjust when storing to memory. */ - macro_build (&offset_expr, "swc1", "T,o(b)", - target_big_endian ? treg + 1 : treg, BFD_RELOC_LO16, breg); - offset_expr.X_add_number += 4; - macro_build (&offset_expr, "swc1", "T,o(b)", - target_big_endian ? treg : treg + 1, BFD_RELOC_LO16, breg); - break; + offset_reloc[0] = BFD_RELOC_LO16; + offset_reloc[1] = BFD_RELOC_UNUSED; + offset_reloc[2] = BFD_RELOC_UNUSED; + } + align = 8; + /* Fall through */ case M_L_DAB: - gas_assert (!mips_opts.micromips); /* * The MIPS assembler seems to check for X_add_number not * being double aligned and generating: @@ -9553,6 +9455,51 @@ macro (struct mips_cl_insn *ip, char *str) s = "sw"; ldd_std: + /* Even on a big endian machine $fn comes before $fn+1. We have + to adjust when loading from memory. We set coproc if we must + load $fn+1 first. */ + /* Itbl support may require additional care here. */ + if (!target_big_endian) + coproc = 0; + + if (small_offset_p (0, align, 16)) + { + ep = &offset_expr; + if (!small_offset_p (4, align, 16)) + { + macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", AT, breg, + -1, offset_reloc[0], offset_reloc[1], + offset_reloc[2]); + expr1.X_add_number = 0; + ep = &expr1; + breg = AT; + used_at = 1; + offset_reloc[0] = BFD_RELOC_LO16; + offset_reloc[1] = BFD_RELOC_UNUSED; + offset_reloc[2] = BFD_RELOC_UNUSED; + } + if (strcmp (s, "lw") == 0 && treg == breg) + { + ep->X_add_number += 4; + macro_build (ep, s, fmt, treg + 1, -1, offset_reloc[0], + offset_reloc[1], offset_reloc[2], breg); + ep->X_add_number -= 4; + macro_build (ep, s, fmt, treg, -1, offset_reloc[0], + offset_reloc[1], offset_reloc[2], breg); + } + else + { + macro_build (ep, s, fmt, coproc ? treg + 1 : treg, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], + breg); + ep->X_add_number += 4; + macro_build (ep, s, fmt, coproc ? treg : treg + 1, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], + breg); + } + break; + } + if (offset_expr.X_op != O_symbol && offset_expr.X_op != O_constant) { @@ -9569,13 +9516,6 @@ macro (struct mips_cl_insn *ip, char *str) as_bad (_("Number (0x%s) larger than 32 bits"), value); } - /* Even on a big endian machine $fn comes before $fn+1. We have - to adjust when loading from memory. We set coproc if we must - load $fn+1 first. */ - /* Itbl support may require additional care here. */ - if (!target_big_endian) - coproc = 0; - if (mips_pic == NO_PIC || offset_expr.X_op == O_constant) { /* If this is a reference to a GP relative symbol, we want @@ -9628,7 +9568,15 @@ macro (struct mips_cl_insn *ip, char *str) offset_expr.X_add_number -= 4; } used_at = 1; - macro_build_lui (&offset_expr, AT); + if (offset_high_part (offset_expr.X_add_number, 16) + != offset_high_part (offset_expr.X_add_number + 4, 16)) + { + load_address (AT, &offset_expr, &used_at); + offset_expr.X_op = O_constant; + offset_expr.X_add_number = 0; + } + else + macro_build_lui (&offset_expr, AT); if (breg != 0) macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ @@ -9768,36 +9716,13 @@ macro (struct mips_cl_insn *ip, char *str) abort (); break; - - case M_LD_OB: - s = HAVE_64BIT_GPRS ? "ld" : "lw"; - goto sd_ob; - case M_SD_OB: - s = HAVE_64BIT_GPRS ? "sd" : "sw"; - sd_ob: - macro_build (&offset_expr, s, "t,o(b)", treg, - -1, offset_reloc[0], offset_reloc[1], offset_reloc[2], - breg); - if (!HAVE_64BIT_GPRS) - { - offset_expr.X_add_number += 4; - macro_build (&offset_expr, s, "t,o(b)", treg + 1, - -1, offset_reloc[0], offset_reloc[1], offset_reloc[2], - breg); - } - break; - case M_SAA_AB: - ab = 1; - case M_SAA_OB: s = "saa"; offbits = 0; fmt = "t,(b)"; goto ld_st; case M_SAAD_AB: - ab = 1; - case M_SAAD_OB: s = "saad"; offbits = 0; fmt = "t,(b)"; @@ -10453,56 +10378,42 @@ macro (struct mips_cl_insn *ip, char *str) end_noreorder (); break; - case M_ULH_A: - ab = 1; - case M_ULH: + case M_ULH_AB: s = "lb"; s2 = "lbu"; off = 1; goto uld_st; - case M_ULHU_A: - ab = 1; - case M_ULHU: + case M_ULHU_AB: s = "lbu"; s2 = "lbu"; off = 1; goto uld_st; - case M_ULW_A: - ab = 1; - case M_ULW: + case M_ULW_AB: s = "lwl"; s2 = "lwr"; offbits = (mips_opts.micromips ? 12 : 16); off = 3; goto uld_st; - case M_ULD_A: - ab = 1; - case M_ULD: + case M_ULD_AB: s = "ldl"; s2 = "ldr"; offbits = (mips_opts.micromips ? 12 : 16); off = 7; goto uld_st; - case M_USH_A: - ab = 1; - case M_USH: + case M_USH_AB: s = "sb"; s2 = "sb"; off = 1; ust = 1; goto uld_st; - case M_USW_A: - ab = 1; - case M_USW: + case M_USW_AB: s = "swl"; s2 = "swr"; offbits = (mips_opts.micromips ? 12 : 16); off = 3; ust = 1; goto uld_st; - case M_USD_A: - ab = 1; - case M_USD: + case M_USD_AB: s = "sdl"; s2 = "sdr"; offbits = (mips_opts.micromips ? 12 : 16); @@ -10510,32 +10421,26 @@ macro (struct mips_cl_insn *ip, char *str) ust = 1; uld_st: - if (!ab && offset_expr.X_add_number >= 0x8000 - off) - as_bad (_("Operand overflow")); - + large_offset = !small_offset_p (off, align, offbits); ep = &offset_expr; expr1.X_add_number = 0; - if (ab) + if (large_offset) { used_at = 1; tempreg = AT; - load_address (tempreg, ep, &used_at); - if (breg != 0) - macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, tempreg, breg); - breg = tempreg; - tempreg = treg; - ep = &expr1; - } - else if (offbits == 12 - && (offset_expr.X_op != O_constant - || !IS_SEXT_12BIT_NUM (offset_expr.X_add_number) - || !IS_SEXT_12BIT_NUM (offset_expr.X_add_number + off))) - { - used_at = 1; - tempreg = AT; - macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", tempreg, breg, - -1, offset_reloc[0], offset_reloc[1], offset_reloc[2]); + if (small_offset_p (0, align, 16)) + macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", tempreg, breg, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2]); + else + { + load_address (tempreg, ep, &used_at); + if (breg != 0) + macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", + tempreg, tempreg, breg); + } + offset_reloc[0] = BFD_RELOC_LO16; + offset_reloc[1] = BFD_RELOC_UNUSED; + offset_reloc[2] = BFD_RELOC_UNUSED; breg = tempreg; tempreg = treg; ep = &expr1; @@ -10553,21 +10458,23 @@ macro (struct mips_cl_insn *ip, char *str) if (!target_big_endian) ep->X_add_number += off; - if (offbits != 12) - macro_build (ep, s, "t,o(b)", tempreg, BFD_RELOC_LO16, breg); - else + if (offbits == 12) macro_build (NULL, s, "t,~(b)", tempreg, (unsigned long) ep->X_add_number, breg); + else + macro_build (ep, s, "t,o(b)", tempreg, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], breg); if (!target_big_endian) ep->X_add_number -= off; else ep->X_add_number += off; - if (offbits != 12) - macro_build (ep, s2, "t,o(b)", tempreg, BFD_RELOC_LO16, breg); - else + if (offbits == 12) macro_build (NULL, s2, "t,~(b)", tempreg, (unsigned long) ep->X_add_number, breg); + else + macro_build (ep, s2, "t,o(b)", tempreg, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], breg); /* If necessary, move the result in tempreg to the final destination. */ if (!ust && treg != tempreg) @@ -10582,14 +10489,15 @@ macro (struct mips_cl_insn *ip, char *str) used_at = 1; if (target_big_endian == ust) ep->X_add_number += off; - tempreg = ust || ab ? treg : AT; - macro_build (ep, s, "t,o(b)", tempreg, BFD_RELOC_LO16, breg); + tempreg = ust || large_offset ? treg : AT; + macro_build (ep, s, "t,o(b)", tempreg, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], breg); /* For halfword transfers we need a temporary register to shuffle bytes. Unfortunately for M_USH_A we have none available before the next store as AT holds the base address. We deal with this case by clobbering TREG and then restoring it as with ULH. */ - tempreg = ust == ab ? treg : AT; + tempreg = ust == large_offset ? treg : AT; if (ust) macro_build (NULL, "srl", SHFT_FMT, tempreg, treg, 8); @@ -10597,21 +10505,23 @@ macro (struct mips_cl_insn *ip, char *str) ep->X_add_number -= off; else ep->X_add_number += off; - macro_build (ep, s2, "t,o(b)", tempreg, BFD_RELOC_LO16, breg); + macro_build (ep, s2, "t,o(b)", tempreg, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], breg); /* For M_USH_A re-retrieve the LSB. */ - if (ust && ab) + if (ust && large_offset) { if (target_big_endian) ep->X_add_number += off; else ep->X_add_number -= off; - macro_build (&expr1, "lbu", "t,o(b)", AT, BFD_RELOC_LO16, AT); + macro_build (&expr1, "lbu", "t,o(b)", AT, -1, + offset_reloc[0], offset_reloc[1], offset_reloc[2], AT); } /* For ULH and M_USH_A OR the LSB in. */ - if (!ust || ab) + if (!ust || large_offset) { - tempreg = !ab ? AT : treg; + tempreg = !large_offset ? AT : treg; macro_build (NULL, "sll", SHFT_FMT, tempreg, tempreg, 8); macro_build (NULL, "or", "d,v,t", treg, treg, AT); } @@ -11416,6 +11326,16 @@ mips_ip (char *str, struct mips_cl_insn *ip) return; } + imm_expr.X_op = O_absent; + imm2_expr.X_op = O_absent; + offset_expr.X_op = O_absent; + imm_reloc[0] = BFD_RELOC_UNUSED; + imm_reloc[1] = BFD_RELOC_UNUSED; + imm_reloc[2] = BFD_RELOC_UNUSED; + offset_reloc[0] = BFD_RELOC_UNUSED; + offset_reloc[1] = BFD_RELOC_UNUSED; + offset_reloc[2] = BFD_RELOC_UNUSED; + create_insn (ip, insn); insn_error = NULL; argnum = 1; @@ -12782,10 +12702,20 @@ mips_ip (char *str, struct mips_cl_insn *ip) continue; case 'A': - my_getExpression (&offset_expr, s); - normalize_address_expr (&offset_expr); - *imm_reloc = BFD_RELOC_32; - s = expr_end; + /* If we expect a base register, check whether there is only + a single bracketed expression left. If so, it must be the + base register and the constant must be zero. */ + if (args[1] == '(' && *s == '(' && strchr (s + 1, '(') == 0) + { + offset_expr.X_op = O_constant; + offset_expr.X_add_number = 0; + } + else + { + my_getSmallExpression (&offset_expr, offset_reloc, s); + normalize_address_expr (&offset_expr); + s = expr_end; + } continue; case 'F': diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 7f5c434..196e238 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,30 @@ 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * gas/mips/ldstla-32.d: Avoid "lui at,0x0" sequences for + truncated constants. + * gas/mips/ldstla-32-shared.d: Likewise. + * gas/mips/mcu.d: Use ADDIU in preference to LI+ADDU when adding + 16-bit constants to the base. + * gas/mips/micromips@mcu.d: Likewise. + * gas/mips/micromips@cache.d: Likewise. + * gas/mips/micromips@pref.d: Likewise. + * gas/mips/micromips.d, gas/mips/micromips-insn32.d, + gas/mips/micromips-noinsn32.d, gas/mips/micromips-trap.d: Likewise. + Allow the full 16-bit offset range to be used for SB, LB and LBU in + USH and ULH sequences. Fix the expected output for LD and SD when + the two LW and SW offsets need different high parts. + * gas/mips/eva.s: Test PREFE with relocation operators. + * gas/mips/eva.d: Use ADDIU in preference to LI+ADDU for 16-bit + constants. Update after eva.s change. + * gas/mips/micromips@eva.d: Likewise. + * gas/mips/ld-reloc.s, gas/mips/ld-reloc.d, gas/mips/l_d-reloc.s, + gas/mips/l_d-reloc.d, gas/mips/ulw-reloc.s, gas/mips/ulw-reloc.d, + gas/mips/micromips@ulw-reloc.d, gas/mips/ulh-reloc.s, + gas/mips/ulh-reloc.d: New tests. + * gas/mips/mips.exp: Run them. + +2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * gas/mips/eva.d, gas/mips/micromips@eva.d: Remove hard-coded addresses. Use gpr-names=numeric. diff --git a/gas/testsuite/gas/mips/eva.d b/gas/testsuite/gas/mips/eva.d index 70e73fc..bd3a716 100644 --- a/gas/testsuite/gas/mips/eva.d +++ b/gas/testsuite/gas/mips/eva.d @@ -14,65 +14,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c038028 lbue \$3,-256\(\$0\) [ 0-9a-f]+: 7ca47fa8 lbue \$4,255\(\$5\) [ 0-9a-f]+: 7c067fa8 lbue \$6,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 -[ 0-9a-f]+: 7c277fa8 lbue \$7,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c297fa8 lbue \$9,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 002b0821 addu \$1,\$1,\$11 -[ 0-9a-f]+: 7c2a8028 lbue \$10,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2c8028 lbue \$12,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 +[ 0-9a-f]+: 2501feff addiu \$1,\$8,-257 +[ 0-9a-f]+: 7c270028 lbue \$7,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c290028 lbue \$9,0\(\$1\) +[ 0-9a-f]+: 25610100 addiu \$1,\$11,256 +[ 0-9a-f]+: 7c2a0028 lbue \$10,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c2c0028 lbue \$12,0\(\$1\) +[ 0-9a-f]+: 25c1fe00 addiu \$1,\$14,-512 [ 0-9a-f]+: 7c2d0028 lbue \$13,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c2f0028 lbue \$15,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00310821 addu \$1,\$1,\$17 -[ 0-9a-f]+: 7c30ffa8 lbue \$16,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c32ffa8 lbue \$18,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 +[ 0-9a-f]+: 262101ff addiu \$1,\$17,511 +[ 0-9a-f]+: 7c300028 lbue \$16,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c320028 lbue \$18,0\(\$1\) +[ 0-9a-f]+: 2681fc00 addiu \$1,\$20,-1024 [ 0-9a-f]+: 7c330028 lbue \$19,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c350028 lbue \$21,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00370821 addu \$1,\$1,\$23 -[ 0-9a-f]+: 7c36ffa8 lbue \$22,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c38ffa8 lbue \$24,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 +[ 0-9a-f]+: 26e103ff addiu \$1,\$23,1023 +[ 0-9a-f]+: 7c360028 lbue \$22,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c380028 lbue \$24,0\(\$1\) +[ 0-9a-f]+: 2741f800 addiu \$1,\$26,-2048 [ 0-9a-f]+: 7c390028 lbue \$25,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c3b0028 lbue \$27,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 -[ 0-9a-f]+: 7c3cffa8 lbue \$28,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c3effa8 lbue \$30,-1\(\$1\) +[ 0-9a-f]+: 27a107ff addiu \$1,\$29,2047 +[ 0-9a-f]+: 7c3c0028 lbue \$28,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c3e0028 lbue \$30,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c3f0028 lbue \$31,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c220028 lbue \$2,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 -[ 0-9a-f]+: 7c23ffa8 lbue \$3,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c25ffa8 lbue \$5,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 +[ 0-9a-f]+: 24810fff addiu \$1,\$4,4095 +[ 0-9a-f]+: 7c230028 lbue \$3,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c250028 lbue \$5,0\(\$1\) +[ 0-9a-f]+: 24e18000 addiu \$1,\$7,-32768 [ 0-9a-f]+: 7c260028 lbue \$6,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c280028 lbue \$8,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 -[ 0-9a-f]+: 7c29ffa8 lbue \$9,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c2bffa8 lbue \$11,-1\(\$1\) +[ 0-9a-f]+: 25417fff addiu \$1,\$10,32767 +[ 0-9a-f]+: 7c290028 lbue \$9,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c2b0028 lbue \$11,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 [ 0-9a-f]+: 7c2cffa8 lbue \$12,-1\(\$1\) @@ -103,66 +92,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c1d8029 lhue \$29,-256\(\$0\) [ 0-9a-f]+: 7ffe7fa9 lhue \$30,255\(\$31\) [ 0-9a-f]+: 7c007fa9 lhue \$0,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 -[ 0-9a-f]+: 7c227fa9 lhue \$2,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c247fa9 lhue \$4,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00260821 addu \$1,\$1,\$6 -[ 0-9a-f]+: 7c258029 lhue \$5,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c278029 lhue \$7,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 +[ 0-9a-f]+: 2461feff addiu \$1,\$3,-257 +[ 0-9a-f]+: 7c220029 lhue \$2,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c240029 lhue \$4,0\(\$1\) +[ 0-9a-f]+: 24c10100 addiu \$1,\$6,256 +[ 0-9a-f]+: 7c250029 lhue \$5,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c270029 lhue \$7,0\(\$1\) +[ 0-9a-f]+: 2521fe00 addiu \$1,\$9,-512 [ 0-9a-f]+: 7c280029 lhue \$8,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c2a0029 lhue \$10,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 002c0821 addu \$1,\$1,\$12 -[ 0-9a-f]+: 7c2bffa9 lhue \$11,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2dffa9 lhue \$13,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 +[ 0-9a-f]+: 258101ff addiu \$1,\$12,511 +[ 0-9a-f]+: 7c2b0029 lhue \$11,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c2d0029 lhue \$13,0\(\$1\) +[ 0-9a-f]+: 25e1fc00 addiu \$1,\$15,-1024 [ 0-9a-f]+: 7c2e0029 lhue \$14,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c300029 lhue \$16,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00320821 addu \$1,\$1,\$18 -[ 0-9a-f]+: 7c31ffa9 lhue \$17,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c33ffa9 lhue \$19,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00350821 addu \$1,\$1,\$21 +[ 0-9a-f]+: 264103ff addiu \$1,\$18,1023 +[ 0-9a-f]+: 7c310029 lhue \$17,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c330029 lhue \$19,0\(\$1\) +[ 0-9a-f]+: 26a1f800 addiu \$1,\$21,-2048 [ 0-9a-f]+: 7c340029 lhue \$20,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c360029 lhue \$22,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 -[ 0-9a-f]+: 7c37ffa9 lhue \$23,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c39ffa9 lhue \$25,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 003b0821 addu \$1,\$1,\$27 +[ 0-9a-f]+: 270107ff addiu \$1,\$24,2047 +[ 0-9a-f]+: 7c370029 lhue \$23,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c390029 lhue \$25,0\(\$1\) +[ 0-9a-f]+: 2761f000 addiu \$1,\$27,-4096 [ 0-9a-f]+: 7c3a0029 lhue \$26,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c3c0029 lhue \$28,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 -[ 0-9a-f]+: 7c3dffa9 lhue \$29,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c3fffa9 lhue \$31,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00220821 addu \$1,\$1,\$2 +[ 0-9a-f]+: 27c10fff addiu \$1,\$30,4095 +[ 0-9a-f]+: 7c3d0029 lhue \$29,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c3f0029 lhue \$31,0\(\$1\) +[ 0-9a-f]+: 24418000 addiu \$1,\$2,-32768 [ 0-9a-f]+: 7c200029 lhue \$0,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c230029 lhue \$3,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 -[ 0-9a-f]+: 7c24ffa9 lhue \$4,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c26ffa9 lhue \$6,-1\(\$1\) +[ 0-9a-f]+: 24a17fff addiu \$1,\$5,32767 +[ 0-9a-f]+: 7c240029 lhue \$4,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c260029 lhue \$6,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 [ 0-9a-f]+: 7c27ffa9 lhue \$7,-1\(\$1\) @@ -193,65 +170,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c18802c lbe \$24,-256\(\$0\) [ 0-9a-f]+: 7f597fac lbe \$25,255\(\$26\) [ 0-9a-f]+: 7c1b7fac lbe \$27,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 -[ 0-9a-f]+: 7c3c7fac lbe \$28,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c3e7fac lbe \$30,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c3f802c lbe \$31,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c22802c lbe \$2,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 +[ 0-9a-f]+: 27a1feff addiu \$1,\$29,-257 +[ 0-9a-f]+: 7c3c002c lbe \$28,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c3e002c lbe \$30,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c3f002c lbe \$31,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c22002c lbe \$2,0\(\$1\) +[ 0-9a-f]+: 2481fe00 addiu \$1,\$4,-512 [ 0-9a-f]+: 7c23002c lbe \$3,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c25002c lbe \$5,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 -[ 0-9a-f]+: 7c26ffac lbe \$6,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c28ffac lbe \$8,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 +[ 0-9a-f]+: 24e101ff addiu \$1,\$7,511 +[ 0-9a-f]+: 7c26002c lbe \$6,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c28002c lbe \$8,0\(\$1\) +[ 0-9a-f]+: 2541fc00 addiu \$1,\$10,-1024 [ 0-9a-f]+: 7c29002c lbe \$9,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c2b002c lbe \$11,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 -[ 0-9a-f]+: 7c2cffac lbe \$12,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c2effac lbe \$14,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00300821 addu \$1,\$1,\$16 +[ 0-9a-f]+: 25a103ff addiu \$1,\$13,1023 +[ 0-9a-f]+: 7c2c002c lbe \$12,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c2e002c lbe \$14,0\(\$1\) +[ 0-9a-f]+: 2601f800 addiu \$1,\$16,-2048 [ 0-9a-f]+: 7c2f002c lbe \$15,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c31002c lbe \$17,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 -[ 0-9a-f]+: 7c32ffac lbe \$18,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c34ffac lbe \$20,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00360821 addu \$1,\$1,\$22 +[ 0-9a-f]+: 266107ff addiu \$1,\$19,2047 +[ 0-9a-f]+: 7c32002c lbe \$18,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c34002c lbe \$20,0\(\$1\) +[ 0-9a-f]+: 26c1f000 addiu \$1,\$22,-4096 [ 0-9a-f]+: 7c35002c lbe \$21,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c37002c lbe \$23,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 -[ 0-9a-f]+: 7c38ffac lbe \$24,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c3affac lbe \$26,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 003c0821 addu \$1,\$1,\$28 +[ 0-9a-f]+: 27210fff addiu \$1,\$25,4095 +[ 0-9a-f]+: 7c38002c lbe \$24,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c3a002c lbe \$26,0\(\$1\) +[ 0-9a-f]+: 27818000 addiu \$1,\$28,-32768 [ 0-9a-f]+: 7c3b002c lbe \$27,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c3d002c lbe \$29,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 -[ 0-9a-f]+: 7c3effac lbe \$30,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c20ffac lbe \$0,-1\(\$1\) +[ 0-9a-f]+: 27e17fff addiu \$1,\$31,32767 +[ 0-9a-f]+: 7c3e002c lbe \$30,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c20002c lbe \$0,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 [ 0-9a-f]+: 7c22ffac lbe \$2,-1\(\$1\) @@ -282,66 +248,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c13802d lhe \$19,-256\(\$0\) [ 0-9a-f]+: 7eb47fad lhe \$20,255\(\$21\) [ 0-9a-f]+: 7c167fad lhe \$22,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 -[ 0-9a-f]+: 7c377fad lhe \$23,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c397fad lhe \$25,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 003b0821 addu \$1,\$1,\$27 -[ 0-9a-f]+: 7c3a802d lhe \$26,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c3c802d lhe \$28,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 +[ 0-9a-f]+: 2701feff addiu \$1,\$24,-257 +[ 0-9a-f]+: 7c37002d lhe \$23,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c39002d lhe \$25,0\(\$1\) +[ 0-9a-f]+: 27610100 addiu \$1,\$27,256 +[ 0-9a-f]+: 7c3a002d lhe \$26,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c3c002d lhe \$28,0\(\$1\) +[ 0-9a-f]+: 27c1fe00 addiu \$1,\$30,-512 [ 0-9a-f]+: 7c3d002d lhe \$29,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c3f002d lhe \$31,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00220821 addu \$1,\$1,\$2 -[ 0-9a-f]+: 7c20ffad lhe \$0,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c23ffad lhe \$3,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 +[ 0-9a-f]+: 244101ff addiu \$1,\$2,511 +[ 0-9a-f]+: 7c20002d lhe \$0,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c23002d lhe \$3,0\(\$1\) +[ 0-9a-f]+: 24a1fc00 addiu \$1,\$5,-1024 [ 0-9a-f]+: 7c24002d lhe \$4,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c26002d lhe \$6,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 -[ 0-9a-f]+: 7c27ffad lhe \$7,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c29ffad lhe \$9,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 002b0821 addu \$1,\$1,\$11 +[ 0-9a-f]+: 250103ff addiu \$1,\$8,1023 +[ 0-9a-f]+: 7c27002d lhe \$7,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c29002d lhe \$9,0\(\$1\) +[ 0-9a-f]+: 2561f800 addiu \$1,\$11,-2048 [ 0-9a-f]+: 7c2a002d lhe \$10,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c2c002d lhe \$12,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 -[ 0-9a-f]+: 7c2dffad lhe \$13,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c2fffad lhe \$15,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00310821 addu \$1,\$1,\$17 +[ 0-9a-f]+: 25c107ff addiu \$1,\$14,2047 +[ 0-9a-f]+: 7c2d002d lhe \$13,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c2f002d lhe \$15,0\(\$1\) +[ 0-9a-f]+: 2621f000 addiu \$1,\$17,-4096 [ 0-9a-f]+: 7c30002d lhe \$16,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c32002d lhe \$18,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 -[ 0-9a-f]+: 7c33ffad lhe \$19,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c35ffad lhe \$21,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00370821 addu \$1,\$1,\$23 +[ 0-9a-f]+: 26810fff addiu \$1,\$20,4095 +[ 0-9a-f]+: 7c33002d lhe \$19,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c35002d lhe \$21,0\(\$1\) +[ 0-9a-f]+: 26e18000 addiu \$1,\$23,-32768 [ 0-9a-f]+: 7c36002d lhe \$22,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c38002d lhe \$24,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 -[ 0-9a-f]+: 7c39ffad lhe \$25,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c3bffad lhe \$27,-1\(\$1\) +[ 0-9a-f]+: 27417fff addiu \$1,\$26,32767 +[ 0-9a-f]+: 7c39002d lhe \$25,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c3b002d lhe \$27,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 [ 0-9a-f]+: 7c3cffad lhe \$28,-1\(\$1\) @@ -371,66 +325,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c0e802e lle \$14,-256\(\$0\) [ 0-9a-f]+: 7e0f7fae lle \$15,255\(\$16\) [ 0-9a-f]+: 7c117fae lle \$17,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 -[ 0-9a-f]+: 7c327fae lle \$18,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c347fae lle \$20,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00360821 addu \$1,\$1,\$22 -[ 0-9a-f]+: 7c35802e lle \$21,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c37802e lle \$23,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 +[ 0-9a-f]+: 2661feff addiu \$1,\$19,-257 +[ 0-9a-f]+: 7c32002e lle \$18,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c34002e lle \$20,0\(\$1\) +[ 0-9a-f]+: 26c10100 addiu \$1,\$22,256 +[ 0-9a-f]+: 7c35002e lle \$21,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c37002e lle \$23,0\(\$1\) +[ 0-9a-f]+: 2721fe00 addiu \$1,\$25,-512 [ 0-9a-f]+: 7c38002e lle \$24,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c3a002e lle \$26,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 003c0821 addu \$1,\$1,\$28 -[ 0-9a-f]+: 7c3bffae lle \$27,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c3dffae lle \$29,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 +[ 0-9a-f]+: 278101ff addiu \$1,\$28,511 +[ 0-9a-f]+: 7c3b002e lle \$27,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c3d002e lle \$29,0\(\$1\) +[ 0-9a-f]+: 27e1fc00 addiu \$1,\$31,-1024 [ 0-9a-f]+: 7c3e002e lle \$30,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c20002e lle \$0,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 -[ 0-9a-f]+: 7c22ffae lle \$2,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c24ffae lle \$4,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00260821 addu \$1,\$1,\$6 +[ 0-9a-f]+: 246103ff addiu \$1,\$3,1023 +[ 0-9a-f]+: 7c22002e lle \$2,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c24002e lle \$4,0\(\$1\) +[ 0-9a-f]+: 24c1f800 addiu \$1,\$6,-2048 [ 0-9a-f]+: 7c25002e lle \$5,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c27002e lle \$7,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 -[ 0-9a-f]+: 7c28ffae lle \$8,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c2affae lle \$10,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 002c0821 addu \$1,\$1,\$12 +[ 0-9a-f]+: 252107ff addiu \$1,\$9,2047 +[ 0-9a-f]+: 7c28002e lle \$8,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c2a002e lle \$10,0\(\$1\) +[ 0-9a-f]+: 2581f000 addiu \$1,\$12,-4096 [ 0-9a-f]+: 7c2b002e lle \$11,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c2d002e lle \$13,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 -[ 0-9a-f]+: 7c2effae lle \$14,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c30ffae lle \$16,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00320821 addu \$1,\$1,\$18 +[ 0-9a-f]+: 25e10fff addiu \$1,\$15,4095 +[ 0-9a-f]+: 7c2e002e lle \$14,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c30002e lle \$16,0\(\$1\) +[ 0-9a-f]+: 26418000 addiu \$1,\$18,-32768 [ 0-9a-f]+: 7c31002e lle \$17,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c33002e lle \$19,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00350821 addu \$1,\$1,\$21 -[ 0-9a-f]+: 7c34ffae lle \$20,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c36ffae lle \$22,-1\(\$1\) +[ 0-9a-f]+: 26a17fff addiu \$1,\$21,32767 +[ 0-9a-f]+: 7c34002e lle \$20,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c36002e lle \$22,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 [ 0-9a-f]+: 7c37ffae lle \$23,-1\(\$1\) @@ -461,65 +403,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c09802f lwe \$9,-256\(\$0\) [ 0-9a-f]+: 7d6a7faf lwe \$10,255\(\$11\) [ 0-9a-f]+: 7c0c7faf lwe \$12,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 -[ 0-9a-f]+: 7c2d7faf lwe \$13,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c2f7faf lwe \$15,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00310821 addu \$1,\$1,\$17 -[ 0-9a-f]+: 7c30802f lwe \$16,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c32802f lwe \$18,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 +[ 0-9a-f]+: 25c1feff addiu \$1,\$14,-257 +[ 0-9a-f]+: 7c2d002f lwe \$13,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c2f002f lwe \$15,0\(\$1\) +[ 0-9a-f]+: 26210100 addiu \$1,\$17,256 +[ 0-9a-f]+: 7c30002f lwe \$16,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c32002f lwe \$18,0\(\$1\) +[ 0-9a-f]+: 2681fe00 addiu \$1,\$20,-512 [ 0-9a-f]+: 7c33002f lwe \$19,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c35002f lwe \$21,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00370821 addu \$1,\$1,\$23 -[ 0-9a-f]+: 7c36ffaf lwe \$22,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c38ffaf lwe \$24,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 +[ 0-9a-f]+: 26e101ff addiu \$1,\$23,511 +[ 0-9a-f]+: 7c36002f lwe \$22,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c38002f lwe \$24,0\(\$1\) +[ 0-9a-f]+: 2741fc00 addiu \$1,\$26,-1024 [ 0-9a-f]+: 7c39002f lwe \$25,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c3b002f lwe \$27,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 -[ 0-9a-f]+: 7c3cffaf lwe \$28,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c3effaf lwe \$30,-1\(\$1\) +[ 0-9a-f]+: 27a103ff addiu \$1,\$29,1023 +[ 0-9a-f]+: 7c3c002f lwe \$28,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c3e002f lwe \$30,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c3f002f lwe \$31,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c22002f lwe \$2,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 -[ 0-9a-f]+: 7c23ffaf lwe \$3,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c25ffaf lwe \$5,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 +[ 0-9a-f]+: 248107ff addiu \$1,\$4,2047 +[ 0-9a-f]+: 7c23002f lwe \$3,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c25002f lwe \$5,0\(\$1\) +[ 0-9a-f]+: 24e1f000 addiu \$1,\$7,-4096 [ 0-9a-f]+: 7c26002f lwe \$6,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c28002f lwe \$8,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 -[ 0-9a-f]+: 7c29ffaf lwe \$9,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c2bffaf lwe \$11,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 +[ 0-9a-f]+: 25410fff addiu \$1,\$10,4095 +[ 0-9a-f]+: 7c29002f lwe \$9,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c2b002f lwe \$11,0\(\$1\) +[ 0-9a-f]+: 25a18000 addiu \$1,\$13,-32768 [ 0-9a-f]+: 7c2c002f lwe \$12,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c2e002f lwe \$14,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00300821 addu \$1,\$1,\$16 -[ 0-9a-f]+: 7c2fffaf lwe \$15,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c31ffaf lwe \$17,-1\(\$1\) +[ 0-9a-f]+: 26017fff addiu \$1,\$16,32767 +[ 0-9a-f]+: 7c2f002f lwe \$15,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c31002f lwe \$17,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 [ 0-9a-f]+: 7c32ffaf lwe \$18,-1\(\$1\) @@ -550,66 +481,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c048019 lwle \$4,-256\(\$0\) [ 0-9a-f]+: 7cc57f99 lwle \$5,255\(\$6\) [ 0-9a-f]+: 7c077f99 lwle \$7,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 -[ 0-9a-f]+: 7c287f99 lwle \$8,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c2a7f99 lwle \$10,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 002c0821 addu \$1,\$1,\$12 -[ 0-9a-f]+: 7c2b8019 lwle \$11,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2d8019 lwle \$13,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 +[ 0-9a-f]+: 2521feff addiu \$1,\$9,-257 +[ 0-9a-f]+: 7c280019 lwle \$8,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c2a0019 lwle \$10,0\(\$1\) +[ 0-9a-f]+: 25810100 addiu \$1,\$12,256 +[ 0-9a-f]+: 7c2b0019 lwle \$11,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c2d0019 lwle \$13,0\(\$1\) +[ 0-9a-f]+: 25e1fe00 addiu \$1,\$15,-512 [ 0-9a-f]+: 7c2e0019 lwle \$14,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c300019 lwle \$16,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00320821 addu \$1,\$1,\$18 -[ 0-9a-f]+: 7c31ff99 lwle \$17,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c33ff99 lwle \$19,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00350821 addu \$1,\$1,\$21 +[ 0-9a-f]+: 264101ff addiu \$1,\$18,511 +[ 0-9a-f]+: 7c310019 lwle \$17,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c330019 lwle \$19,0\(\$1\) +[ 0-9a-f]+: 26a1fc00 addiu \$1,\$21,-1024 [ 0-9a-f]+: 7c340019 lwle \$20,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c360019 lwle \$22,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 -[ 0-9a-f]+: 7c37ff99 lwle \$23,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c39ff99 lwle \$25,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 003b0821 addu \$1,\$1,\$27 +[ 0-9a-f]+: 270103ff addiu \$1,\$24,1023 +[ 0-9a-f]+: 7c370019 lwle \$23,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c390019 lwle \$25,0\(\$1\) +[ 0-9a-f]+: 2761f800 addiu \$1,\$27,-2048 [ 0-9a-f]+: 7c3a0019 lwle \$26,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c3c0019 lwle \$28,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 -[ 0-9a-f]+: 7c3dff99 lwle \$29,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c3fff99 lwle \$31,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00220821 addu \$1,\$1,\$2 +[ 0-9a-f]+: 27c107ff addiu \$1,\$30,2047 +[ 0-9a-f]+: 7c3d0019 lwle \$29,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c3f0019 lwle \$31,0\(\$1\) +[ 0-9a-f]+: 2441f000 addiu \$1,\$2,-4096 [ 0-9a-f]+: 7c200019 lwle \$0,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c230019 lwle \$3,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 -[ 0-9a-f]+: 7c24ff99 lwle \$4,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c26ff99 lwle \$6,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 +[ 0-9a-f]+: 24a10fff addiu \$1,\$5,4095 +[ 0-9a-f]+: 7c240019 lwle \$4,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c260019 lwle \$6,0\(\$1\) +[ 0-9a-f]+: 25018000 addiu \$1,\$8,-32768 [ 0-9a-f]+: 7c270019 lwle \$7,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c290019 lwle \$9,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 002b0821 addu \$1,\$1,\$11 -[ 0-9a-f]+: 7c2aff99 lwle \$10,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c2cff99 lwle \$12,-1\(\$1\) +[ 0-9a-f]+: 25617fff addiu \$1,\$11,32767 +[ 0-9a-f]+: 7c2a0019 lwle \$10,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c2c0019 lwle \$12,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 [ 0-9a-f]+: 7c2dff99 lwle \$13,-1\(\$1\) @@ -640,66 +559,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c1e801a lwre \$30,-256\(\$0\) [ 0-9a-f]+: 7c1f7f9a lwre \$31,255\(\$0\) [ 0-9a-f]+: 7c027f9a lwre \$2,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 -[ 0-9a-f]+: 7c237f9a lwre \$3,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c257f9a lwre \$5,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 -[ 0-9a-f]+: 7c26801a lwre \$6,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c28801a lwre \$8,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 +[ 0-9a-f]+: 2481feff addiu \$1,\$4,-257 +[ 0-9a-f]+: 7c23001a lwre \$3,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c25001a lwre \$5,0\(\$1\) +[ 0-9a-f]+: 24e10100 addiu \$1,\$7,256 +[ 0-9a-f]+: 7c26001a lwre \$6,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c28001a lwre \$8,0\(\$1\) +[ 0-9a-f]+: 2541fe00 addiu \$1,\$10,-512 [ 0-9a-f]+: 7c29001a lwre \$9,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c2b001a lwre \$11,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 -[ 0-9a-f]+: 7c2cff9a lwre \$12,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2eff9a lwre \$14,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00300821 addu \$1,\$1,\$16 +[ 0-9a-f]+: 25a101ff addiu \$1,\$13,511 +[ 0-9a-f]+: 7c2c001a lwre \$12,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c2e001a lwre \$14,0\(\$1\) +[ 0-9a-f]+: 2601fc00 addiu \$1,\$16,-1024 [ 0-9a-f]+: 7c2f001a lwre \$15,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c31001a lwre \$17,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 -[ 0-9a-f]+: 7c32ff9a lwre \$18,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c34ff9a lwre \$20,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00360821 addu \$1,\$1,\$22 +[ 0-9a-f]+: 266103ff addiu \$1,\$19,1023 +[ 0-9a-f]+: 7c32001a lwre \$18,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c34001a lwre \$20,0\(\$1\) +[ 0-9a-f]+: 26c1f800 addiu \$1,\$22,-2048 [ 0-9a-f]+: 7c35001a lwre \$21,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c37001a lwre \$23,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 -[ 0-9a-f]+: 7c38ff9a lwre \$24,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c3aff9a lwre \$26,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 003c0821 addu \$1,\$1,\$28 +[ 0-9a-f]+: 272107ff addiu \$1,\$25,2047 +[ 0-9a-f]+: 7c38001a lwre \$24,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c3a001a lwre \$26,0\(\$1\) +[ 0-9a-f]+: 2781f000 addiu \$1,\$28,-4096 [ 0-9a-f]+: 7c3b001a lwre \$27,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c3d001a lwre \$29,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 -[ 0-9a-f]+: 7c3eff9a lwre \$30,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c20ff9a lwre \$0,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 +[ 0-9a-f]+: 27e10fff addiu \$1,\$31,4095 +[ 0-9a-f]+: 7c3e001a lwre \$30,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c20001a lwre \$0,0\(\$1\) +[ 0-9a-f]+: 24618000 addiu \$1,\$3,-32768 [ 0-9a-f]+: 7c22001a lwre \$2,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c24001a lwre \$4,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00260821 addu \$1,\$1,\$6 -[ 0-9a-f]+: 7c25ff9a lwre \$5,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c27ff9a lwre \$7,-1\(\$1\) +[ 0-9a-f]+: 24c17fff addiu \$1,\$6,32767 +[ 0-9a-f]+: 7c25001a lwre \$5,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c27001a lwre \$7,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 [ 0-9a-f]+: 7c28ff9a lwre \$8,-1\(\$1\) @@ -730,65 +637,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c19801c sbe \$25,-256\(\$0\) [ 0-9a-f]+: 7f7a7f9c sbe \$26,255\(\$27\) [ 0-9a-f]+: 7c1c7f9c sbe \$28,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 -[ 0-9a-f]+: 7c3d7f9c sbe \$29,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c3f7f9c sbe \$31,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00220821 addu \$1,\$1,\$2 -[ 0-9a-f]+: 7c20801c sbe \$0,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c23801c sbe \$3,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 +[ 0-9a-f]+: 27c1feff addiu \$1,\$30,-257 +[ 0-9a-f]+: 7c3d001c sbe \$29,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c3f001c sbe \$31,0\(\$1\) +[ 0-9a-f]+: 24410100 addiu \$1,\$2,256 +[ 0-9a-f]+: 7c20001c sbe \$0,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c23001c sbe \$3,0\(\$1\) +[ 0-9a-f]+: 24a1fe00 addiu \$1,\$5,-512 [ 0-9a-f]+: 7c24001c sbe \$4,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c26001c sbe \$6,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 -[ 0-9a-f]+: 7c27ff9c sbe \$7,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c29ff9c sbe \$9,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 002b0821 addu \$1,\$1,\$11 +[ 0-9a-f]+: 250101ff addiu \$1,\$8,511 +[ 0-9a-f]+: 7c27001c sbe \$7,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c29001c sbe \$9,0\(\$1\) +[ 0-9a-f]+: 2561fc00 addiu \$1,\$11,-1024 [ 0-9a-f]+: 7c2a001c sbe \$10,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c2c001c sbe \$12,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 -[ 0-9a-f]+: 7c2dff9c sbe \$13,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c2fff9c sbe \$15,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00310821 addu \$1,\$1,\$17 +[ 0-9a-f]+: 25c103ff addiu \$1,\$14,1023 +[ 0-9a-f]+: 7c2d001c sbe \$13,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c2f001c sbe \$15,0\(\$1\) +[ 0-9a-f]+: 2621f800 addiu \$1,\$17,-2048 [ 0-9a-f]+: 7c30001c sbe \$16,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c32001c sbe \$18,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 -[ 0-9a-f]+: 7c33ff9c sbe \$19,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c35ff9c sbe \$21,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00370821 addu \$1,\$1,\$23 +[ 0-9a-f]+: 268107ff addiu \$1,\$20,2047 +[ 0-9a-f]+: 7c33001c sbe \$19,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c35001c sbe \$21,0\(\$1\) +[ 0-9a-f]+: 26e1f000 addiu \$1,\$23,-4096 [ 0-9a-f]+: 7c36001c sbe \$22,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c38001c sbe \$24,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 -[ 0-9a-f]+: 7c39ff9c sbe \$25,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c3bff9c sbe \$27,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 +[ 0-9a-f]+: 27410fff addiu \$1,\$26,4095 +[ 0-9a-f]+: 7c39001c sbe \$25,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c3b001c sbe \$27,0\(\$1\) +[ 0-9a-f]+: 27a18000 addiu \$1,\$29,-32768 [ 0-9a-f]+: 7c3c001c sbe \$28,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c3e001c sbe \$30,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c3fff9c sbe \$31,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c22ff9c sbe \$2,-1\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c3f001c sbe \$31,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c22001c sbe \$2,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 [ 0-9a-f]+: 7c23ff9c sbe \$3,-1\(\$1\) @@ -819,66 +715,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c14801e sce \$20,-256\(\$0\) [ 0-9a-f]+: 7ed57f9e sce \$21,255\(\$22\) [ 0-9a-f]+: 7c177f9e sce \$23,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 -[ 0-9a-f]+: 7c387f9e sce \$24,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c3a7f9e sce \$26,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 003c0821 addu \$1,\$1,\$28 -[ 0-9a-f]+: 7c3b801e sce \$27,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c3d801e sce \$29,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 +[ 0-9a-f]+: 2721feff addiu \$1,\$25,-257 +[ 0-9a-f]+: 7c38001e sce \$24,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c3a001e sce \$26,0\(\$1\) +[ 0-9a-f]+: 27810100 addiu \$1,\$28,256 +[ 0-9a-f]+: 7c3b001e sce \$27,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c3d001e sce \$29,0\(\$1\) +[ 0-9a-f]+: 27e1fe00 addiu \$1,\$31,-512 [ 0-9a-f]+: 7c3e001e sce \$30,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c20001e sce \$0,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 -[ 0-9a-f]+: 7c22ff9e sce \$2,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c24ff9e sce \$4,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00260821 addu \$1,\$1,\$6 +[ 0-9a-f]+: 246101ff addiu \$1,\$3,511 +[ 0-9a-f]+: 7c22001e sce \$2,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c24001e sce \$4,0\(\$1\) +[ 0-9a-f]+: 24c1fc00 addiu \$1,\$6,-1024 [ 0-9a-f]+: 7c25001e sce \$5,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c27001e sce \$7,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 -[ 0-9a-f]+: 7c28ff9e sce \$8,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c2aff9e sce \$10,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 002c0821 addu \$1,\$1,\$12 +[ 0-9a-f]+: 252103ff addiu \$1,\$9,1023 +[ 0-9a-f]+: 7c28001e sce \$8,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c2a001e sce \$10,0\(\$1\) +[ 0-9a-f]+: 2581f800 addiu \$1,\$12,-2048 [ 0-9a-f]+: 7c2b001e sce \$11,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c2d001e sce \$13,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 -[ 0-9a-f]+: 7c2eff9e sce \$14,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c30ff9e sce \$16,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00320821 addu \$1,\$1,\$18 +[ 0-9a-f]+: 25e107ff addiu \$1,\$15,2047 +[ 0-9a-f]+: 7c2e001e sce \$14,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c30001e sce \$16,0\(\$1\) +[ 0-9a-f]+: 2641f000 addiu \$1,\$18,-4096 [ 0-9a-f]+: 7c31001e sce \$17,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c33001e sce \$19,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00350821 addu \$1,\$1,\$21 -[ 0-9a-f]+: 7c34ff9e sce \$20,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c36ff9e sce \$22,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 +[ 0-9a-f]+: 26a10fff addiu \$1,\$21,4095 +[ 0-9a-f]+: 7c34001e sce \$20,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c36001e sce \$22,0\(\$1\) +[ 0-9a-f]+: 27018000 addiu \$1,\$24,-32768 [ 0-9a-f]+: 7c37001e sce \$23,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c39001e sce \$25,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 003b0821 addu \$1,\$1,\$27 -[ 0-9a-f]+: 7c3aff9e sce \$26,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c3cff9e sce \$28,-1\(\$1\) +[ 0-9a-f]+: 27617fff addiu \$1,\$27,32767 +[ 0-9a-f]+: 7c3a001e sce \$26,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c3c001e sce \$28,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 [ 0-9a-f]+: 7c3dff9e sce \$29,-1\(\$1\) @@ -909,65 +793,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c0f801d she \$15,-256\(\$0\) [ 0-9a-f]+: 7e307f9d she \$16,255\(\$17\) [ 0-9a-f]+: 7c127f9d she \$18,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 -[ 0-9a-f]+: 7c337f9d she \$19,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c357f9d she \$21,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00370821 addu \$1,\$1,\$23 -[ 0-9a-f]+: 7c36801d she \$22,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c38801d she \$24,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 +[ 0-9a-f]+: 2681feff addiu \$1,\$20,-257 +[ 0-9a-f]+: 7c33001d she \$19,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c35001d she \$21,0\(\$1\) +[ 0-9a-f]+: 26e10100 addiu \$1,\$23,256 +[ 0-9a-f]+: 7c36001d she \$22,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c38001d she \$24,0\(\$1\) +[ 0-9a-f]+: 2741fe00 addiu \$1,\$26,-512 [ 0-9a-f]+: 7c39001d she \$25,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c3b001d she \$27,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 -[ 0-9a-f]+: 7c3cff9d she \$28,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c3eff9d she \$30,-1\(\$1\) +[ 0-9a-f]+: 27a101ff addiu \$1,\$29,511 +[ 0-9a-f]+: 7c3c001d she \$28,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c3e001d she \$30,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c3f001d she \$31,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c22001d she \$2,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 -[ 0-9a-f]+: 7c23ff9d she \$3,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c25ff9d she \$5,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 +[ 0-9a-f]+: 248103ff addiu \$1,\$4,1023 +[ 0-9a-f]+: 7c23001d she \$3,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c25001d she \$5,0\(\$1\) +[ 0-9a-f]+: 24e1f800 addiu \$1,\$7,-2048 [ 0-9a-f]+: 7c26001d she \$6,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c28001d she \$8,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 -[ 0-9a-f]+: 7c29ff9d she \$9,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c2bff9d she \$11,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 +[ 0-9a-f]+: 254107ff addiu \$1,\$10,2047 +[ 0-9a-f]+: 7c29001d she \$9,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c2b001d she \$11,0\(\$1\) +[ 0-9a-f]+: 25a1f000 addiu \$1,\$13,-4096 [ 0-9a-f]+: 7c2c001d she \$12,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c2e001d she \$14,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00300821 addu \$1,\$1,\$16 -[ 0-9a-f]+: 7c2fff9d she \$15,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c31ff9d she \$17,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 +[ 0-9a-f]+: 26010fff addiu \$1,\$16,4095 +[ 0-9a-f]+: 7c2f001d she \$15,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c31001d she \$17,0\(\$1\) +[ 0-9a-f]+: 26618000 addiu \$1,\$19,-32768 [ 0-9a-f]+: 7c32001d she \$18,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c34001d she \$20,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00360821 addu \$1,\$1,\$22 -[ 0-9a-f]+: 7c35ff9d she \$21,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c37ff9d she \$23,-1\(\$1\) +[ 0-9a-f]+: 26c17fff addiu \$1,\$22,32767 +[ 0-9a-f]+: 7c35001d she \$21,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c37001d she \$23,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 [ 0-9a-f]+: 7c38ff9d she \$24,-1\(\$1\) @@ -998,66 +871,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c0a801f swe \$10,-256\(\$0\) [ 0-9a-f]+: 7d8b7f9f swe \$11,255\(\$12\) [ 0-9a-f]+: 7c0d7f9f swe \$13,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 -[ 0-9a-f]+: 7c2e7f9f swe \$14,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c307f9f swe \$16,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00320821 addu \$1,\$1,\$18 -[ 0-9a-f]+: 7c31801f swe \$17,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c33801f swe \$19,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00350821 addu \$1,\$1,\$21 +[ 0-9a-f]+: 25e1feff addiu \$1,\$15,-257 +[ 0-9a-f]+: 7c2e001f swe \$14,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c30001f swe \$16,0\(\$1\) +[ 0-9a-f]+: 26410100 addiu \$1,\$18,256 +[ 0-9a-f]+: 7c31001f swe \$17,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c33001f swe \$19,0\(\$1\) +[ 0-9a-f]+: 26a1fe00 addiu \$1,\$21,-512 [ 0-9a-f]+: 7c34001f swe \$20,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c36001f swe \$22,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 -[ 0-9a-f]+: 7c37ff9f swe \$23,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c39ff9f swe \$25,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 003b0821 addu \$1,\$1,\$27 +[ 0-9a-f]+: 270101ff addiu \$1,\$24,511 +[ 0-9a-f]+: 7c37001f swe \$23,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c39001f swe \$25,0\(\$1\) +[ 0-9a-f]+: 2761fc00 addiu \$1,\$27,-1024 [ 0-9a-f]+: 7c3a001f swe \$26,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c3c001f swe \$28,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 -[ 0-9a-f]+: 7c3dff9f swe \$29,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c3fff9f swe \$31,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00220821 addu \$1,\$1,\$2 +[ 0-9a-f]+: 27c103ff addiu \$1,\$30,1023 +[ 0-9a-f]+: 7c3d001f swe \$29,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c3f001f swe \$31,0\(\$1\) +[ 0-9a-f]+: 2441f800 addiu \$1,\$2,-2048 [ 0-9a-f]+: 7c20001f swe \$0,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c23001f swe \$3,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 -[ 0-9a-f]+: 7c24ff9f swe \$4,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c26ff9f swe \$6,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 +[ 0-9a-f]+: 24a107ff addiu \$1,\$5,2047 +[ 0-9a-f]+: 7c24001f swe \$4,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c26001f swe \$6,0\(\$1\) +[ 0-9a-f]+: 2501f000 addiu \$1,\$8,-4096 [ 0-9a-f]+: 7c27001f swe \$7,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c29001f swe \$9,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 002b0821 addu \$1,\$1,\$11 -[ 0-9a-f]+: 7c2aff9f swe \$10,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c2cff9f swe \$12,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 +[ 0-9a-f]+: 25610fff addiu \$1,\$11,4095 +[ 0-9a-f]+: 7c2a001f swe \$10,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c2c001f swe \$12,0\(\$1\) +[ 0-9a-f]+: 25c18000 addiu \$1,\$14,-32768 [ 0-9a-f]+: 7c2d001f swe \$13,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c2f001f swe \$15,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00310821 addu \$1,\$1,\$17 -[ 0-9a-f]+: 7c30ff9f swe \$16,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c32ff9f swe \$18,-1\(\$1\) +[ 0-9a-f]+: 26217fff addiu \$1,\$17,32767 +[ 0-9a-f]+: 7c30001f swe \$16,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c32001f swe \$18,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 [ 0-9a-f]+: 7c33ff9f swe \$19,-1\(\$1\) @@ -1088,66 +949,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c058021 swle \$5,-256\(\$0\) [ 0-9a-f]+: 7ce67fa1 swle \$6,255\(\$7\) [ 0-9a-f]+: 7c087fa1 swle \$8,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 -[ 0-9a-f]+: 7c297fa1 swle \$9,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c2b7fa1 swle \$11,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 -[ 0-9a-f]+: 7c2c8021 swle \$12,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2e8021 swle \$14,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00300821 addu \$1,\$1,\$16 +[ 0-9a-f]+: 2541feff addiu \$1,\$10,-257 +[ 0-9a-f]+: 7c290021 swle \$9,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c2b0021 swle \$11,0\(\$1\) +[ 0-9a-f]+: 25a10100 addiu \$1,\$13,256 +[ 0-9a-f]+: 7c2c0021 swle \$12,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c2e0021 swle \$14,0\(\$1\) +[ 0-9a-f]+: 2601fe00 addiu \$1,\$16,-512 [ 0-9a-f]+: 7c2f0021 swle \$15,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c310021 swle \$17,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 -[ 0-9a-f]+: 7c32ffa1 swle \$18,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c34ffa1 swle \$20,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00360821 addu \$1,\$1,\$22 +[ 0-9a-f]+: 266101ff addiu \$1,\$19,511 +[ 0-9a-f]+: 7c320021 swle \$18,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c340021 swle \$20,0\(\$1\) +[ 0-9a-f]+: 26c1fc00 addiu \$1,\$22,-1024 [ 0-9a-f]+: 7c350021 swle \$21,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c370021 swle \$23,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 -[ 0-9a-f]+: 7c38ffa1 swle \$24,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c3affa1 swle \$26,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 003c0821 addu \$1,\$1,\$28 +[ 0-9a-f]+: 272103ff addiu \$1,\$25,1023 +[ 0-9a-f]+: 7c380021 swle \$24,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c3a0021 swle \$26,0\(\$1\) +[ 0-9a-f]+: 2781f800 addiu \$1,\$28,-2048 [ 0-9a-f]+: 7c3b0021 swle \$27,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c3d0021 swle \$29,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 -[ 0-9a-f]+: 7c3effa1 swle \$30,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c20ffa1 swle \$0,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 +[ 0-9a-f]+: 27e107ff addiu \$1,\$31,2047 +[ 0-9a-f]+: 7c3e0021 swle \$30,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c200021 swle \$0,0\(\$1\) +[ 0-9a-f]+: 2461f000 addiu \$1,\$3,-4096 [ 0-9a-f]+: 7c220021 swle \$2,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c240021 swle \$4,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00260821 addu \$1,\$1,\$6 -[ 0-9a-f]+: 7c25ffa1 swle \$5,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c27ffa1 swle \$7,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 +[ 0-9a-f]+: 24c10fff addiu \$1,\$6,4095 +[ 0-9a-f]+: 7c250021 swle \$5,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c270021 swle \$7,0\(\$1\) +[ 0-9a-f]+: 25218000 addiu \$1,\$9,-32768 [ 0-9a-f]+: 7c280021 swle \$8,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c2a0021 swle \$10,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 002c0821 addu \$1,\$1,\$12 -[ 0-9a-f]+: 7c2bffa1 swle \$11,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c2dffa1 swle \$13,-1\(\$1\) +[ 0-9a-f]+: 25817fff addiu \$1,\$12,32767 +[ 0-9a-f]+: 7c2b0021 swle \$11,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c2d0021 swle \$13,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 [ 0-9a-f]+: 7c2effa1 swle \$14,-1\(\$1\) @@ -1178,65 +1027,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c1f8022 swre \$31,-256\(\$0\) [ 0-9a-f]+: 7c407fa2 swre \$0,255\(\$2\) [ 0-9a-f]+: 7c037fa2 swre \$3,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 -[ 0-9a-f]+: 7c247fa2 swre \$4,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c267fa2 swre \$6,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00280821 addu \$1,\$1,\$8 -[ 0-9a-f]+: 7c278022 swre \$7,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c298022 swre \$9,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 002b0821 addu \$1,\$1,\$11 +[ 0-9a-f]+: 24a1feff addiu \$1,\$5,-257 +[ 0-9a-f]+: 7c240022 swre \$4,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c260022 swre \$6,0\(\$1\) +[ 0-9a-f]+: 25010100 addiu \$1,\$8,256 +[ 0-9a-f]+: 7c270022 swre \$7,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c290022 swre \$9,0\(\$1\) +[ 0-9a-f]+: 2561fe00 addiu \$1,\$11,-512 [ 0-9a-f]+: 7c2a0022 swre \$10,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c2c0022 swre \$12,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 002e0821 addu \$1,\$1,\$14 -[ 0-9a-f]+: 7c2dffa2 swre \$13,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2fffa2 swre \$15,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00310821 addu \$1,\$1,\$17 +[ 0-9a-f]+: 25c101ff addiu \$1,\$14,511 +[ 0-9a-f]+: 7c2d0022 swre \$13,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c2f0022 swre \$15,0\(\$1\) +[ 0-9a-f]+: 2621fc00 addiu \$1,\$17,-1024 [ 0-9a-f]+: 7c300022 swre \$16,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c320022 swre \$18,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 00340821 addu \$1,\$1,\$20 -[ 0-9a-f]+: 7c33ffa2 swre \$19,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c35ffa2 swre \$21,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00370821 addu \$1,\$1,\$23 +[ 0-9a-f]+: 268103ff addiu \$1,\$20,1023 +[ 0-9a-f]+: 7c330022 swre \$19,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c350022 swre \$21,0\(\$1\) +[ 0-9a-f]+: 26e1f800 addiu \$1,\$23,-2048 [ 0-9a-f]+: 7c360022 swre \$22,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c380022 swre \$24,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 -[ 0-9a-f]+: 7c39ffa2 swre \$25,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c3bffa2 swre \$27,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 +[ 0-9a-f]+: 274107ff addiu \$1,\$26,2047 +[ 0-9a-f]+: 7c390022 swre \$25,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c3b0022 swre \$27,0\(\$1\) +[ 0-9a-f]+: 27a1f000 addiu \$1,\$29,-4096 [ 0-9a-f]+: 7c3c0022 swre \$28,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c3e0022 swre \$30,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c3fffa2 swre \$31,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c22ffa2 swre \$2,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c3f0022 swre \$31,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c220022 swre \$2,0\(\$1\) +[ 0-9a-f]+: 24818000 addiu \$1,\$4,-32768 [ 0-9a-f]+: 7c230022 swre \$3,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c250022 swre \$5,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 -[ 0-9a-f]+: 7c26ffa2 swre \$6,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c28ffa2 swre \$8,-1\(\$1\) +[ 0-9a-f]+: 24e17fff addiu \$1,\$7,32767 +[ 0-9a-f]+: 7c260022 swre \$6,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c280022 swre \$8,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 [ 0-9a-f]+: 7c29ffa2 swre \$9,-1\(\$1\) @@ -1267,66 +1105,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c1a801b cachee 0x1a,-256\(\$0\) [ 0-9a-f]+: 7f9b7f9b cachee 0x1b,255\(\$28\) [ 0-9a-f]+: 7c1d7f9b cachee 0x1d,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 -[ 0-9a-f]+: 7c3e7f9b cachee 0x1e,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c207f9b cachee 0x0,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00230821 addu \$1,\$1,\$3 -[ 0-9a-f]+: 7c22801b cachee 0x2,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c24801b cachee 0x4,-256\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 00260821 addu \$1,\$1,\$6 +[ 0-9a-f]+: 27e1feff addiu \$1,\$31,-257 +[ 0-9a-f]+: 7c3e001b cachee 0x1e,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c20001b cachee 0x0,0\(\$1\) +[ 0-9a-f]+: 24610100 addiu \$1,\$3,256 +[ 0-9a-f]+: 7c22001b cachee 0x2,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c24001b cachee 0x4,0\(\$1\) +[ 0-9a-f]+: 24c1fe00 addiu \$1,\$6,-512 [ 0-9a-f]+: 7c25001b cachee 0x5,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c27001b cachee 0x7,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00290821 addu \$1,\$1,\$9 -[ 0-9a-f]+: 7c28ff9b cachee 0x8,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c2aff9b cachee 0xa,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 002c0821 addu \$1,\$1,\$12 +[ 0-9a-f]+: 252101ff addiu \$1,\$9,511 +[ 0-9a-f]+: 7c28001b cachee 0x8,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c2a001b cachee 0xa,0\(\$1\) +[ 0-9a-f]+: 2581fc00 addiu \$1,\$12,-1024 [ 0-9a-f]+: 7c2b001b cachee 0xb,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c2d001b cachee 0xd,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 002f0821 addu \$1,\$1,\$15 -[ 0-9a-f]+: 7c2eff9b cachee 0xe,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c30ff9b cachee 0x10,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 00320821 addu \$1,\$1,\$18 +[ 0-9a-f]+: 25e103ff addiu \$1,\$15,1023 +[ 0-9a-f]+: 7c2e001b cachee 0xe,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c30001b cachee 0x10,0\(\$1\) +[ 0-9a-f]+: 2641f800 addiu \$1,\$18,-2048 [ 0-9a-f]+: 7c31001b cachee 0x11,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c33001b cachee 0x13,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00350821 addu \$1,\$1,\$21 -[ 0-9a-f]+: 7c34ff9b cachee 0x14,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c36ff9b cachee 0x16,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00380821 addu \$1,\$1,\$24 +[ 0-9a-f]+: 26a107ff addiu \$1,\$21,2047 +[ 0-9a-f]+: 7c34001b cachee 0x14,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c36001b cachee 0x16,0\(\$1\) +[ 0-9a-f]+: 2701f000 addiu \$1,\$24,-4096 [ 0-9a-f]+: 7c37001b cachee 0x17,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c39001b cachee 0x19,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 003b0821 addu \$1,\$1,\$27 -[ 0-9a-f]+: 7c3aff9b cachee 0x1a,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c3cff9b cachee 0x1c,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 003e0821 addu \$1,\$1,\$30 +[ 0-9a-f]+: 27610fff addiu \$1,\$27,4095 +[ 0-9a-f]+: 7c3a001b cachee 0x1a,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c3c001b cachee 0x1c,0\(\$1\) +[ 0-9a-f]+: 27c18000 addiu \$1,\$30,-32768 [ 0-9a-f]+: 7c3d001b cachee 0x1d,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c3f001b cachee 0x1f,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 00220821 addu \$1,\$1,\$2 -[ 0-9a-f]+: 7c20ff9b cachee 0x0,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c23ff9b cachee 0x3,-1\(\$1\) +[ 0-9a-f]+: 24417fff addiu \$1,\$2,32767 +[ 0-9a-f]+: 7c20001b cachee 0x0,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c23001b cachee 0x3,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 00250821 addu \$1,\$1,\$5 [ 0-9a-f]+: 7c24ff9b cachee 0x4,-1\(\$1\) @@ -1357,65 +1183,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 7c158023 prefe 0x15,-256\(\$0\) [ 0-9a-f]+: 7ef67fa3 prefe 0x16,255\(\$23\) [ 0-9a-f]+: 7c187fa3 prefe 0x18,255\(\$0\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 003a0821 addu \$1,\$1,\$26 -[ 0-9a-f]+: 7c397fa3 prefe 0x19,255\(\$1\) -[ 0-9a-f]+: 2401fe00 li \$1,-512 -[ 0-9a-f]+: 7c3b7fa3 prefe 0x1b,255\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 003d0821 addu \$1,\$1,\$29 -[ 0-9a-f]+: 7c3c8023 prefe 0x1c,-256\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c3e8023 prefe 0x1e,-256\(\$1\) +[ 0-9a-f]+: 2741feff addiu \$1,\$26,-257 +[ 0-9a-f]+: 7c390023 prefe 0x19,0\(\$1\) +[ 0-9a-f]+: 2401feff li \$1,-257 +[ 0-9a-f]+: 7c3b0023 prefe 0x1b,0\(\$1\) +[ 0-9a-f]+: 27a10100 addiu \$1,\$29,256 +[ 0-9a-f]+: 7c3c0023 prefe 0x1c,0\(\$1\) +[ 0-9a-f]+: 24010100 li \$1,256 +[ 0-9a-f]+: 7c3e0023 prefe 0x1e,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c3f0023 prefe 0x1f,0\(\$1\) [ 0-9a-f]+: 2401fe00 li \$1,-512 [ 0-9a-f]+: 7c220023 prefe 0x2,0\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 00240821 addu \$1,\$1,\$4 -[ 0-9a-f]+: 7c23ffa3 prefe 0x3,-1\(\$1\) -[ 0-9a-f]+: 24010200 li \$1,512 -[ 0-9a-f]+: 7c25ffa3 prefe 0x5,-1\(\$1\) -[ 0-9a-f]+: 2401fc00 li \$1,-1024 -[ 0-9a-f]+: 00270821 addu \$1,\$1,\$7 +[ 0-9a-f]+: 248101ff addiu \$1,\$4,511 +[ 0-9a-f]+: 7c230023 prefe 0x3,0\(\$1\) +[ 0-9a-f]+: 240101ff li \$1,511 +[ 0-9a-f]+: 7c250023 prefe 0x5,0\(\$1\) +[ 0-9a-f]+: 24e1fc00 addiu \$1,\$7,-1024 [ 0-9a-f]+: 7c260023 prefe 0x6,0\(\$1\) [ 0-9a-f]+: 2401fc00 li \$1,-1024 [ 0-9a-f]+: 7c280023 prefe 0x8,0\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 002a0821 addu \$1,\$1,\$10 -[ 0-9a-f]+: 7c29ffa3 prefe 0x9,-1\(\$1\) -[ 0-9a-f]+: 24010400 li \$1,1024 -[ 0-9a-f]+: 7c2bffa3 prefe 0xb,-1\(\$1\) -[ 0-9a-f]+: 2401f800 li \$1,-2048 -[ 0-9a-f]+: 002d0821 addu \$1,\$1,\$13 +[ 0-9a-f]+: 254103ff addiu \$1,\$10,1023 +[ 0-9a-f]+: 7c290023 prefe 0x9,0\(\$1\) +[ 0-9a-f]+: 240103ff li \$1,1023 +[ 0-9a-f]+: 7c2b0023 prefe 0xb,0\(\$1\) +[ 0-9a-f]+: 25a1f800 addiu \$1,\$13,-2048 [ 0-9a-f]+: 7c2c0023 prefe 0xc,0\(\$1\) [ 0-9a-f]+: 2401f800 li \$1,-2048 [ 0-9a-f]+: 7c2e0023 prefe 0xe,0\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 00300821 addu \$1,\$1,\$16 -[ 0-9a-f]+: 7c2fffa3 prefe 0xf,-1\(\$1\) -[ 0-9a-f]+: 24010800 li \$1,2048 -[ 0-9a-f]+: 7c31ffa3 prefe 0x11,-1\(\$1\) -[ 0-9a-f]+: 2401f000 li \$1,-4096 -[ 0-9a-f]+: 00330821 addu \$1,\$1,\$19 +[ 0-9a-f]+: 260107ff addiu \$1,\$16,2047 +[ 0-9a-f]+: 7c2f0023 prefe 0xf,0\(\$1\) +[ 0-9a-f]+: 240107ff li \$1,2047 +[ 0-9a-f]+: 7c310023 prefe 0x11,0\(\$1\) +[ 0-9a-f]+: 2661f000 addiu \$1,\$19,-4096 [ 0-9a-f]+: 7c320023 prefe 0x12,0\(\$1\) [ 0-9a-f]+: 2401f000 li \$1,-4096 [ 0-9a-f]+: 7c340023 prefe 0x14,0\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 00360821 addu \$1,\$1,\$22 -[ 0-9a-f]+: 7c35ffa3 prefe 0x15,-1\(\$1\) -[ 0-9a-f]+: 24011000 li \$1,4096 -[ 0-9a-f]+: 7c37ffa3 prefe 0x17,-1\(\$1\) -[ 0-9a-f]+: 24018000 li \$1,-32768 -[ 0-9a-f]+: 00390821 addu \$1,\$1,\$25 +[ 0-9a-f]+: 26c10fff addiu \$1,\$22,4095 +[ 0-9a-f]+: 7c350023 prefe 0x15,0\(\$1\) +[ 0-9a-f]+: 24010fff li \$1,4095 +[ 0-9a-f]+: 7c370023 prefe 0x17,0\(\$1\) +[ 0-9a-f]+: 27218000 addiu \$1,\$25,-32768 [ 0-9a-f]+: 7c380023 prefe 0x18,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 7c3a0023 prefe 0x1a,0\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 003c0821 addu \$1,\$1,\$28 -[ 0-9a-f]+: 7c3bffa3 prefe 0x1b,-1\(\$1\) -[ 0-9a-f]+: 34018000 li \$1,0x8000 -[ 0-9a-f]+: 7c3dffa3 prefe 0x1d,-1\(\$1\) +[ 0-9a-f]+: 27817fff addiu \$1,\$28,32767 +[ 0-9a-f]+: 7c3b0023 prefe 0x1b,0\(\$1\) +[ 0-9a-f]+: 24017fff li \$1,32767 +[ 0-9a-f]+: 7c3d0023 prefe 0x1d,0\(\$1\) [ 0-9a-f]+: 24018000 li \$1,-32768 [ 0-9a-f]+: 003f0821 addu \$1,\$1,\$31 [ 0-9a-f]+: 7c3effa3 prefe 0x1e,-1\(\$1\) @@ -1442,4 +1257,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 24210000 addiu \$1,\$1,0 [ 0-9a-f]+: R_MIPS_LO16 MYDATA [ 0-9a-f]+: 7c2d0023 prefe 0xd,0\(\$1\) +[ 0-9a-f]+: 24c10000 addiu \$1,\$6,0 + [ 0-9a-f]+: R_MIPS_LO16 foo +[ 0-9a-f]+: 7c250023 prefe 0x5,0\(\$1\) #pass diff --git a/gas/testsuite/gas/mips/eva.s b/gas/testsuite/gas/mips/eva.s index f002e35..f7bea00 100644 --- a/gas/testsuite/gas/mips/eva.s +++ b/gas/testsuite/gas/mips/eva.s @@ -610,3 +610,4 @@ test_eva: prefe 10,2147483647 prefe 11,($12) prefe 13,MYDATA + prefe 5,%lo(foo)($6) diff --git a/gas/testsuite/gas/mips/l_d-reloc.d b/gas/testsuite/gas/mips/l_d-reloc.d new file mode 100644 index 0000000..59c327b --- /dev/null +++ b/gas/testsuite/gas/mips/l_d-reloc.d @@ -0,0 +1,86 @@ +#as: -32 -EB -mips1 +#objdump: -dr --prefix-addresses -Mgpr-names=numeric +#name: LDC1 with relocation operators + +.*file format.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$5\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$5\) +[0-9a-f]+ <[^>]*> lwc1 \$f5,32763\(\$5\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,32767\(\$5\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32764 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32767 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x1 +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lwc1 \$f5,-32768\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,-32764\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lwc1 \$f5,32763\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,32767\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffc +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x4 +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lwc1 \$f5,-32768\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,-32764\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$0\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$0\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> li \$1,-30875 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,4661 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$5\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$5\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwc1 \$f5,0\(\$1\) +[0-9a-f]+ <[^>]*> lwc1 \$f4,4\(\$1\) +#pass diff --git a/gas/testsuite/gas/mips/l_d-reloc.s b/gas/testsuite/gas/mips/l_d-reloc.s new file mode 100644 index 0000000..8608f13 --- /dev/null +++ b/gas/testsuite/gas/mips/l_d-reloc.s @@ -0,0 +1,26 @@ + .ent func +func: + l.d $f4,($5) + l.d $f4,0x7ffb($5) + l.d $f4,0x7ffc($5) + l.d $f4,0x7fff($5) + l.d $f4,0x8000($5) + l.d $f4,0x37ffb($5) + l.d $f4,0x37ffc($5) + l.d $f4,0x37fff($5) + l.d $f4,0x38000($5) + + l.d $f4,%lo(foo) + l.d $f4,%hi(foo) + l.d $f4,%gp_rel(foo) + l.d $f4,%lo(0x12348765) + l.d $f4,%hi(0x12348765) + + l.d $f4,%lo(foo)($5) + l.d $f4,%hi(foo)($5) + l.d $f4,%gp_rel(foo)($5) + l.d $f4,%lo(0x12348765)($5) + l.d $f4,%hi(0x12348765)($5) + l.d $f4,%lo(foo+0x12348765)($5) + l.d $f4,%hi(foo+0x12348765)($5) + .end func diff --git a/gas/testsuite/gas/mips/ld-reloc.d b/gas/testsuite/gas/mips/ld-reloc.d new file mode 100644 index 0000000..cd8804f --- /dev/null +++ b/gas/testsuite/gas/mips/ld-reloc.d @@ -0,0 +1,114 @@ +#as: -32 +#objdump: -dr --prefix-addresses -Mgpr-names=numeric +#name: LD with relocation operators + +.*file format.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> lw \$5,4\(\$4\) +[0-9a-f]+ <[^>]*> lw \$4,0\(\$4\) +[0-9a-f]+ <[^>]*> lw \$5,32767\(\$4\) +[0-9a-f]+ <[^>]*> lw \$4,32763\(\$4\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32764 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32767 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x1 +[0-9a-f]+ <[^>]*> addu \$1,\$4,\$1 +[0-9a-f]+ <[^>]*> lw \$4,-32768\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,-32764\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> lw \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$5\) +[0-9a-f]+ <[^>]*> lw \$4,32763\(\$5\) +[0-9a-f]+ <[^>]*> lw \$5,32767\(\$5\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32764 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32767 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x1 +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lw \$4,-32768\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,-32764\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lw \$4,32763\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,32767\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffc +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x4 +[0-9a-f]+ <[^>]*> addu \$1,\$5,\$1 +[0-9a-f]+ <[^>]*> lw \$4,-32768\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,-32764\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lw \$4,0\(\$0\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lw \$5,4\(\$0\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> li \$1,-30875 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,4661 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$4\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$4\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> lw \$4,0\(\$5\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lw \$5,4\(\$5\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lw \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lw \$5,4\(\$1\) +#pass diff --git a/gas/testsuite/gas/mips/ld-reloc.s b/gas/testsuite/gas/mips/ld-reloc.s new file mode 100644 index 0000000..00bc7d9 --- /dev/null +++ b/gas/testsuite/gas/mips/ld-reloc.s @@ -0,0 +1,36 @@ + .ent func +func: + ld $4,($4) + ld $4,0x7ffb($4) + ld $4,0x7ffc($4) + ld $4,0x7fff($4) + ld $4,0x8000($4) + + ld $4,($5) + ld $4,0x7ffb($5) + ld $4,0x7ffc($5) + ld $4,0x7fff($5) + ld $4,0x8000($5) + ld $4,0x37ffb($5) + ld $4,0x37ffc($5) + ld $4,0x37fff($5) + ld $4,0x38000($5) + + ld $4,%lo(foo) + ld $4,%hi(foo) + ld $4,%gp_rel(foo) + ld $4,%lo(0x12348765) + ld $4,%hi(0x12348765) + + ld $4,%lo(foo)($4) + ld $4,%hi(foo)($4) + ld $4,%gp_rel(foo)($4) + + ld $4,%lo(foo)($5) + ld $4,%hi(foo)($5) + ld $4,%gp_rel(foo)($5) + ld $4,%lo(0x12348765)($5) + ld $4,%hi(0x12348765)($5) + ld $4,%lo(foo+0x12348765)($5) + ld $4,%hi(foo+0x12348765)($5) + .end func diff --git a/gas/testsuite/gas/mips/ldstla-32-shared.d b/gas/testsuite/gas/mips/ldstla-32-shared.d index 45f4772..3b2ff30 100644 --- a/gas/testsuite/gas/mips/ldstla-32-shared.d +++ b/gas/testsuite/gas/mips/ldstla-32-shared.d @@ -26,14 +26,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: 8c224567 lw v0,17767\(at\) [ 0-9a-f]+: 8c23456b lw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: 8c220000 lw v0,0\(at\) -[ 0-9a-f]+: 8c230004 lw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: 8c22ffff lw v0,-1\(at\) -[ 0-9a-f]+: 8c230003 lw v1,3\(at\) +[ 0-9a-f]+: 8c820000 lw v0,0\(a0\) +[ 0-9a-f]+: 8c830004 lw v1,4\(a0\) +[ 0-9a-f]+: 8c82ffff lw v0,-1\(a0\) +[ 0-9a-f]+: 8c830003 lw v1,3\(a0\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: 8c22ef01 lw v0,-4351\(at\) @@ -66,12 +62,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 3c010123 lui at,0x123 [ 0-9a-f]+: 8c224567 lw v0,17767\(at\) [ 0-9a-f]+: 8c23456b lw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 8c220000 lw v0,0\(at\) -[ 0-9a-f]+: 8c230004 lw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 8c22ffff lw v0,-1\(at\) -[ 0-9a-f]+: 8c230003 lw v1,3\(at\) +[ 0-9a-f]+: 8c020000 lw v0,0\(zero\) +[ 0-9a-f]+: 8c030004 lw v1,4\(zero\) +[ 0-9a-f]+: 8c02ffff lw v0,-1\(zero\) +[ 0-9a-f]+: 8c030003 lw v1,3\(zero\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: 8c22ef01 lw v0,-4351\(at\) [ 0-9a-f]+: 8c23ef05 lw v1,-4347\(at\) @@ -104,14 +98,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: ac224567 sw v0,17767\(at\) [ 0-9a-f]+: ac23456b sw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: ac220000 sw v0,0\(at\) -[ 0-9a-f]+: ac230004 sw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: ac22ffff sw v0,-1\(at\) -[ 0-9a-f]+: ac230003 sw v1,3\(at\) +[ 0-9a-f]+: ac820000 sw v0,0\(a0\) +[ 0-9a-f]+: ac830004 sw v1,4\(a0\) +[ 0-9a-f]+: ac82ffff sw v0,-1\(a0\) +[ 0-9a-f]+: ac830003 sw v1,3\(a0\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: ac22ef01 sw v0,-4351\(at\) @@ -144,12 +134,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 3c010123 lui at,0x123 [ 0-9a-f]+: ac224567 sw v0,17767\(at\) [ 0-9a-f]+: ac23456b sw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: ac220000 sw v0,0\(at\) -[ 0-9a-f]+: ac230004 sw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: ac22ffff sw v0,-1\(at\) -[ 0-9a-f]+: ac230003 sw v1,3\(at\) +[ 0-9a-f]+: ac020000 sw v0,0\(zero\) +[ 0-9a-f]+: ac030004 sw v1,4\(zero\) +[ 0-9a-f]+: ac02ffff sw v0,-1\(zero\) +[ 0-9a-f]+: ac030003 sw v1,3\(zero\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: ac22ef01 sw v0,-4351\(at\) [ 0-9a-f]+: ac23ef05 sw v1,-4347\(at\) diff --git a/gas/testsuite/gas/mips/ldstla-32.d b/gas/testsuite/gas/mips/ldstla-32.d index 42ed481..b9a1f4b 100644 --- a/gas/testsuite/gas/mips/ldstla-32.d +++ b/gas/testsuite/gas/mips/ldstla-32.d @@ -26,14 +26,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: 8c224567 lw v0,17767\(at\) [ 0-9a-f]+: 8c23456b lw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: 8c220000 lw v0,0\(at\) -[ 0-9a-f]+: 8c230004 lw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: 8c22ffff lw v0,-1\(at\) -[ 0-9a-f]+: 8c230003 lw v1,3\(at\) +[ 0-9a-f]+: 8c820000 lw v0,0\(a0\) +[ 0-9a-f]+: 8c830004 lw v1,4\(a0\) +[ 0-9a-f]+: 8c82ffff lw v0,-1\(a0\) +[ 0-9a-f]+: 8c830003 lw v1,3\(a0\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: 8c22ef01 lw v0,-4351\(at\) @@ -66,12 +62,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 3c010123 lui at,0x123 [ 0-9a-f]+: 8c224567 lw v0,17767\(at\) [ 0-9a-f]+: 8c23456b lw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 8c220000 lw v0,0\(at\) -[ 0-9a-f]+: 8c230004 lw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 8c22ffff lw v0,-1\(at\) -[ 0-9a-f]+: 8c230003 lw v1,3\(at\) +[ 0-9a-f]+: 8c020000 lw v0,0\(zero\) +[ 0-9a-f]+: 8c030004 lw v1,4\(zero\) +[ 0-9a-f]+: 8c02ffff lw v0,-1\(zero\) +[ 0-9a-f]+: 8c030003 lw v1,3\(zero\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: 8c22ef01 lw v0,-4351\(at\) [ 0-9a-f]+: 8c23ef05 lw v1,-4347\(at\) @@ -104,14 +98,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: ac224567 sw v0,17767\(at\) [ 0-9a-f]+: ac23456b sw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: ac220000 sw v0,0\(at\) -[ 0-9a-f]+: ac230004 sw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: 00810821 addu at,a0,at -[ 0-9a-f]+: ac22ffff sw v0,-1\(at\) -[ 0-9a-f]+: ac230003 sw v1,3\(at\) +[ 0-9a-f]+: ac820000 sw v0,0\(a0\) +[ 0-9a-f]+: ac830004 sw v1,4\(a0\) +[ 0-9a-f]+: ac82ffff sw v0,-1\(a0\) +[ 0-9a-f]+: ac830003 sw v1,3\(a0\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: 00810821 addu at,a0,at [ 0-9a-f]+: ac22ef01 sw v0,-4351\(at\) @@ -144,12 +134,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 3c010123 lui at,0x123 [ 0-9a-f]+: ac224567 sw v0,17767\(at\) [ 0-9a-f]+: ac23456b sw v1,17771\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: ac220000 sw v0,0\(at\) -[ 0-9a-f]+: ac230004 sw v1,4\(at\) -[ 0-9a-f]+: 3c010000 lui at,0x0 -[ 0-9a-f]+: ac22ffff sw v0,-1\(at\) -[ 0-9a-f]+: ac230003 sw v1,3\(at\) +[ 0-9a-f]+: ac020000 sw v0,0\(zero\) +[ 0-9a-f]+: ac030004 sw v1,4\(zero\) +[ 0-9a-f]+: ac02ffff sw v0,-1\(zero\) +[ 0-9a-f]+: ac030003 sw v1,3\(zero\) [ 0-9a-f]+: 3c01abce lui at,0xabce [ 0-9a-f]+: ac22ef01 sw v0,-4351\(at\) [ 0-9a-f]+: ac23ef05 sw v1,-4347\(at\) diff --git a/gas/testsuite/gas/mips/mcu.d b/gas/testsuite/gas/mips/mcu.d index 06e5bae..91410ed 100644 --- a/gas/testsuite/gas/mips/mcu.d +++ b/gas/testsuite/gas/mips/mcu.d @@ -23,17 +23,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 07e77000 aclr 0x7,0\(ra\) [ 0-9a-f]+: 07e777ff aclr 0x7,2047\(ra\) [ 0-9a-f]+: 07e77800 aclr 0x7,-2048\(ra\) -[ 0-9a-f]+: 24011000 li at,4096 -[ 0-9a-f]+: 003f0821 addu at,at,ra -[ 0-9a-f]+: 04277800 aclr 0x7,-2048\(at\) -[ 0-9a-f]+: 2401f000 li at,-4096 -[ 0-9a-f]+: 003f0821 addu at,at,ra -[ 0-9a-f]+: 042777ff aclr 0x7,2047\(at\) -[ 0-9a-f]+: 34018000 li at,0x8000 -[ 0-9a-f]+: 003f0821 addu at,at,ra -[ 0-9a-f]+: 04277fff aclr 0x7,-1\(at\) -[ 0-9a-f]+: 24018000 li at,-32768 -[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 27e10800 addiu at,ra,2048 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 27e1f7ff addiu at,ra,-2049 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 27e17fff addiu at,ra,32767 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 27e18000 addiu at,ra,-32768 [ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) [ 0-9a-f]+: 3c010001 lui at,0x1 [ 0-9a-f]+: 00240821 addu at,at,a0 @@ -44,15 +40,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 3c01ffff lui at,0xffff [ 0-9a-f]+: 00240821 addu at,at,a0 [ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) -[ 0-9a-f]+: 24018000 li at,-32768 -[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 24818000 addiu at,a0,-32768 [ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) [ 0-9a-f]+: 3c01ffff lui at,0xffff [ 0-9a-f]+: 00240821 addu at,at,a0 [ 0-9a-f]+: 04277001 aclr 0x7,1\(at\) -[ 0-9a-f]+: 24018000 li at,-32768 -[ 0-9a-f]+: 00240821 addu at,at,a0 -[ 0-9a-f]+: 04277001 aclr 0x7,1\(at\) +[ 0-9a-f]+: 24818001 addiu at,a0,-32767 +[ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) [ 0-9a-f]+: 3c01f000 lui at,0xf000 [ 0-9a-f]+: 00240821 addu at,at,a0 [ 0-9a-f]+: 04277000 aclr 0x7,0\(at\) @@ -81,17 +75,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 07e7f000 aset 0x7,0\(ra\) [ 0-9a-f]+: 07e7f7ff aset 0x7,2047\(ra\) [ 0-9a-f]+: 07e7f800 aset 0x7,-2048\(ra\) -[ 0-9a-f]+: 24011000 li at,4096 -[ 0-9a-f]+: 003f0821 addu at,at,ra -[ 0-9a-f]+: 0427f800 aset 0x7,-2048\(at\) -[ 0-9a-f]+: 2401f000 li at,-4096 -[ 0-9a-f]+: 003f0821 addu at,at,ra -[ 0-9a-f]+: 0427f7ff aset 0x7,2047\(at\) -[ 0-9a-f]+: 34018000 li at,0x8000 -[ 0-9a-f]+: 003f0821 addu at,at,ra -[ 0-9a-f]+: 0427ffff aset 0x7,-1\(at\) -[ 0-9a-f]+: 24018000 li at,-32768 -[ 0-9a-f]+: 003f0821 addu at,at,ra +[ 0-9a-f]+: 27e10800 addiu at,ra,2048 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 27e1f7ff addiu at,ra,-2049 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 27e17fff addiu at,ra,32767 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) +[ 0-9a-f]+: 27e18000 addiu at,ra,-32768 [ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) [ 0-9a-f]+: 3c010001 lui at,0x1 [ 0-9a-f]+: 00240821 addu at,at,a0 @@ -102,15 +92,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 3c01ffff lui at,0xffff [ 0-9a-f]+: 00240821 addu at,at,a0 [ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) -[ 0-9a-f]+: 24018000 li at,-32768 -[ 0-9a-f]+: 00240821 addu at,at,a0 +[ 0-9a-f]+: 24818000 addiu at,a0,-32768 [ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) [ 0-9a-f]+: 3c01ffff lui at,0xffff [ 0-9a-f]+: 00240821 addu at,at,a0 [ 0-9a-f]+: 0427f001 aset 0x7,1\(at\) -[ 0-9a-f]+: 24018000 li at,-32768 -[ 0-9a-f]+: 00240821 addu at,at,a0 -[ 0-9a-f]+: 0427f001 aset 0x7,1\(at\) +[ 0-9a-f]+: 24818001 addiu at,a0,-32767 +[ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) [ 0-9a-f]+: 3c01f000 lui at,0xf000 [ 0-9a-f]+: 00240821 addu at,at,a0 [ 0-9a-f]+: 0427f000 aset 0x7,0\(at\) diff --git a/gas/testsuite/gas/mips/micromips-insn32.d b/gas/testsuite/gas/mips/micromips-insn32.d index 94d0f89..5725043 100644 --- a/gas/testsuite/gas/mips/micromips-insn32.d +++ b/gas/testsuite/gas/mips/micromips-insn32.d @@ -12,10 +12,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\) [ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 6001 2800 pref 0x0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 6001 27ff pref 0x0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\) @@ -29,27 +29,23 @@ Disassembly of section \.text: [ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\) [ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\) [ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\) [ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 7fff addiu at,v0,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 3022 8000 addiu at,v0,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 0000 0000 nop [ 0-9a-f]+: 0000 0000 nop @@ -805,19 +801,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) [ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\) [ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\) [ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\) @@ -834,12 +828,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) @@ -855,10 +847,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) [ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\) @@ -1443,8 +1435,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 @@ -1455,8 +1447,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8001 li v1,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\) @@ -1466,11 +1458,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3004 ll v1,4\(a0\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 @@ -1478,15 +1468,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3064 8001 addiu v1,a0,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) @@ -1650,17 +1638,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) [ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) [ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -1671,20 +1657,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) [ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\) [ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) [ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) @@ -1693,8 +1677,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1705,8 +1689,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1717,11 +1701,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1729,15 +1711,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1752,8 +1732,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1764,8 +1744,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1776,11 +1756,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1788,15 +1766,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1811,8 +1787,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1823,8 +1799,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1835,11 +1811,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1847,15 +1821,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -1870,8 +1842,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1882,8 +1854,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1894,11 +1866,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1906,15 +1876,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -2445,8 +2413,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) [ 0-9a-f]+: 6060 b7ff sc v1,2047\(zero\) [ 0-9a-f]+: 6060 b800 sc v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -2457,8 +2425,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 6060 bfff sc v1,-1\(zero\) @@ -2469,11 +2437,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) [ 0-9a-f]+: 6064 b7ff sc v1,2047\(a0\) [ 0-9a-f]+: 6064 b800 sc v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -2481,15 +2447,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) @@ -3016,8 +2980,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3028,8 +2992,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3040,11 +3004,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3052,15 +3014,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3073,8 +3033,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3085,8 +3045,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3097,11 +3057,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3109,15 +3067,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3130,8 +3086,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3142,8 +3098,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3154,11 +3110,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3166,15 +3120,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3187,8 +3139,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3199,8 +3151,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3211,11 +3163,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3223,15 +3173,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3268,19 +3216,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2020 d004 swm s0,4\(zero\) [ 0-9a-f]+: 2020 d7ff swm s0,2047\(zero\) [ 0-9a-f]+: 2020 d800 swm s0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2025 d000 swm s0,0\(a1\) [ 0-9a-f]+: 2025 d7ff swm s0,2047\(a1\) [ 0-9a-f]+: 2025 d800 swm s0,-2048\(a1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3025 0800 addiu at,a1,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3025 f7ff addiu at,a1,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2045 d7ff swm s0-s1,2047\(a1\) [ 0-9a-f]+: 2065 d7ff swm s0-s2,2047\(a1\) [ 0-9a-f]+: 2085 d7ff swm s0-s3,2047\(a1\) @@ -3299,12 +3245,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 22e5 d000 swm s0-s6,ra,0\(a1\) [ 0-9a-f]+: 2305 d000 swm s0-s7,ra,0\(a1\) [ 0-9a-f]+: 2325 d000 swm s0-s7,s8,ra,0\(a1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 d000 swm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) [ 0-9a-f]+: 203d d000 swm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -3313,25 +3257,21 @@ Disassembly of section \.text: [ 0-9a-f]+: 2040 9004 swp v0,4\(zero\) [ 0-9a-f]+: 2040 97ff swp v0,2047\(zero\) [ 0-9a-f]+: 2040 9800 swp v0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 2043 97ff swp v0,2047\(v1\) [ 0-9a-f]+: 2043 9800 swp v0,-2048\(v1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 2043 9000 swp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3499,11 +3439,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8000 lb at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3512,11 +3450,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8001 lb at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3524,11 +3460,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 ffff lb at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) [ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) @@ -3566,11 +3500,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8000 lbu at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3579,11 +3511,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8001 lbu at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3591,11 +3521,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 ffff lbu at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) @@ -3641,9 +3569,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 6060 1002 lwr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -3677,8 +3604,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3686,18 +3612,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 6064 1002 lwr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3737,14 +3660,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8000 sb at,-32768\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3754,14 +3672,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8002 sb v1,-32766\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8001 sb at,-32767\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 1861 0001 sb v1,1\(at\) @@ -3770,14 +3683,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 ffff sb at,-1\(a0\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) [ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) @@ -3822,9 +3730,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 6060 9002 swr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3858,8 +3765,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3867,18 +3773,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 6064 9002 swr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4706,8 +4609,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) [ 0-9a-f]+: f860 0004 sw v1,4\(zero\) [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) -[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) -[ 0-9a-f]+: f880 8003 sw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) [ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4716,21 +4620,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f860 8001 sw v1,-32767\(zero\) +[ 0-9a-f]+: f880 8005 sw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f860 ffff sw v1,-1\(zero\) +[ 0-9a-f]+: f880 0003 sw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) [ 0-9a-f]+: f881 567c sw a0,22140\(at\) @@ -4738,8 +4639,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) [ 0-9a-f]+: f864 0000 sw v1,0\(a0\) [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) -[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) -[ 0-9a-f]+: f884 8003 sw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) [ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4750,26 +4652,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f864 8001 sw v1,-32767\(a0\) +[ 0-9a-f]+: f884 8005 sw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f864 ffff sw v1,-1\(a0\) +[ 0-9a-f]+: f884 0003 sw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) @@ -4778,8 +4674,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) [ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) -[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) -[ 0-9a-f]+: fc80 8003 lw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) [ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4788,21 +4685,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\) +[ 0-9a-f]+: fc80 8005 lw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\) +[ 0-9a-f]+: fc80 0003 lw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) [ 0-9a-f]+: fc81 567c lw a0,22140\(at\) @@ -4810,8 +4704,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) [ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) -[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) -[ 0-9a-f]+: fc84 8003 lw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) [ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4822,26 +4717,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\) +[ 0-9a-f]+: fc84 8005 lw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\) +[ 0-9a-f]+: fc84 0003 lw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) @@ -4878,11 +4767,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4890,15 +4777,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) @@ -4913,11 +4798,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4925,15 +4808,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) @@ -5076,11 +4957,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5088,15 +4967,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) @@ -5111,11 +4988,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5123,15 +4998,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) @@ -5195,7 +5068,6 @@ Disassembly of section \.text: [ 0-9a-f]+: 03ff 937c wait 0x3ff [ 0-9a-f]+: 03ff 8b7c syscall 0x3ff [ 0-9a-f]+: 03ff fffa cop2 0x7fffff -[ 0-9a-f]+: 0000 0000 nop [0-9a-f]+ <fp_test>: [ 0-9a-f]+: 5400 01a0 prefx 0x0,zero\(zero\) @@ -7257,8 +7129,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 4004 ldl v0,4\(v1\) [ 0-9a-f]+: 6043 4e00 ldl v0,-512\(v1\) [ 0-9a-f]+: 6043 41ff ldl v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 4000 ldl v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7272,8 +7143,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 5004 ldr v0,4\(v1\) [ 0-9a-f]+: 6043 5e00 ldr v0,-512\(v1\) [ 0-9a-f]+: 6043 51ff ldr v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 5000 ldr v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7287,8 +7157,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 7004 lld v0,4\(v1\) [ 0-9a-f]+: 6043 7e00 lld v0,-512\(v1\) [ 0-9a-f]+: 6043 71ff lld v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 7000 lld v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7302,8 +7171,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 e004 lwu v0,4\(v1\) [ 0-9a-f]+: 6043 ee00 lwu v0,-512\(v1\) [ 0-9a-f]+: 6043 e1ff lwu v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 e000 lwu v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7317,8 +7185,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 f004 scd v0,4\(v1\) [ 0-9a-f]+: 6043 fe00 scd v0,-512\(v1\) [ 0-9a-f]+: 6043 f1ff scd v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 f000 scd v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7338,12 +7205,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) [ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) [ 0-9a-f]+: 6043 c004 sdl v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 cfff sdl v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7354,12 +7219,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) [ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) [ 0-9a-f]+: 6043 d004 sdr v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 dfff sdr v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7388,17 +7251,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 7000 ldm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) [ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) [ 0-9a-f]+: 203d 7000 ldm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7413,20 +7274,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) [ 0-9a-f]+: 2043 4800 ldp v0,-2048\(v1\) [ 0-9a-f]+: 2043 47ff ldp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) [ 0-9a-f]+: 41a3 1234 lui v1,0x1234 @@ -7456,17 +7315,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 f000 sdm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) [ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) [ 0-9a-f]+: 203d f000 sdm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7481,20 +7338,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) [ 0-9a-f]+: 2043 c800 sdp v0,-2048\(v1\) [ 0-9a-f]+: 2043 c7ff sdp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 2043 c000 sdp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 @@ -7544,9 +7399,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 4fff ldl v1,-1\(zero\) +[ 0-9a-f]+: 6060 5006 ldr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) @@ -7580,8 +7434,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7589,18 +7442,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4fff ldl v1,-1\(a0\) +[ 0-9a-f]+: 6064 5006 ldr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -7650,9 +7500,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6060 cfff sdl v1,-1\(zero\) +[ 0-9a-f]+: 6060 d006 sdr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) @@ -7686,8 +7535,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7695,18 +7543,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 cfff sdl v1,-1\(a0\) +[ 0-9a-f]+: 6064 d006 sdr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 diff --git a/gas/testsuite/gas/mips/micromips-noinsn32.d b/gas/testsuite/gas/mips/micromips-noinsn32.d index 34f281d..22bb62a 100644 --- a/gas/testsuite/gas/mips/micromips-noinsn32.d +++ b/gas/testsuite/gas/mips/micromips-noinsn32.d @@ -12,10 +12,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\) [ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 6001 2800 pref 0x0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 6001 27ff pref 0x0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\) @@ -29,27 +29,23 @@ Disassembly of section \.text: [ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\) [ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\) [ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\) [ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 7fff addiu at,v0,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 3022 8000 addiu at,v0,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 0c00 nop [ 0-9a-f]+: 0000 0000 nop @@ -805,19 +801,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) [ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\) [ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\) [ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\) @@ -834,12 +828,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) @@ -855,10 +847,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) [ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\) @@ -1433,8 +1425,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 @@ -1445,8 +1437,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8001 li v1,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\) @@ -1456,11 +1448,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3004 ll v1,4\(a0\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 @@ -1468,15 +1458,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3064 8001 addiu v1,a0,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) @@ -1640,17 +1628,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) [ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) [ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -1661,20 +1647,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) [ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\) [ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) [ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) @@ -1683,8 +1667,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1695,8 +1679,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1707,11 +1691,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1719,15 +1701,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1742,8 +1722,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1754,8 +1734,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1766,11 +1746,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1778,15 +1756,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1801,8 +1777,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1813,8 +1789,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1825,11 +1801,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1837,15 +1811,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -1860,8 +1832,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1872,8 +1844,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1884,11 +1856,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1896,15 +1866,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -2435,8 +2403,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) [ 0-9a-f]+: 6060 b7ff sc v1,2047\(zero\) [ 0-9a-f]+: 6060 b800 sc v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -2447,8 +2415,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 6060 bfff sc v1,-1\(zero\) @@ -2459,11 +2427,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) [ 0-9a-f]+: 6064 b7ff sc v1,2047\(a0\) [ 0-9a-f]+: 6064 b800 sc v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -2471,15 +2437,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) @@ -3006,8 +2970,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3018,8 +2982,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3030,11 +2994,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3042,15 +3004,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3063,8 +3023,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3075,8 +3035,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3087,11 +3047,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3099,15 +3057,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3120,8 +3076,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3132,8 +3088,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3144,11 +3100,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3156,15 +3110,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3177,8 +3129,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3189,8 +3141,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3201,11 +3153,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3213,15 +3163,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3258,19 +3206,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2020 d004 swm s0,4\(zero\) [ 0-9a-f]+: 2020 d7ff swm s0,2047\(zero\) [ 0-9a-f]+: 2020 d800 swm s0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2025 d000 swm s0,0\(a1\) [ 0-9a-f]+: 2025 d7ff swm s0,2047\(a1\) [ 0-9a-f]+: 2025 d800 swm s0,-2048\(a1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3025 0800 addiu at,a1,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3025 f7ff addiu at,a1,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2045 d7ff swm s0-s1,2047\(a1\) [ 0-9a-f]+: 2065 d7ff swm s0-s2,2047\(a1\) [ 0-9a-f]+: 2085 d7ff swm s0-s3,2047\(a1\) @@ -3289,12 +3235,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 22e5 d000 swm s0-s6,ra,0\(a1\) [ 0-9a-f]+: 2305 d000 swm s0-s7,ra,0\(a1\) [ 0-9a-f]+: 2325 d000 swm s0-s7,s8,ra,0\(a1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 d000 swm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) [ 0-9a-f]+: 203d d000 swm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -3303,25 +3247,21 @@ Disassembly of section \.text: [ 0-9a-f]+: 2040 9004 swp v0,4\(zero\) [ 0-9a-f]+: 2040 97ff swp v0,2047\(zero\) [ 0-9a-f]+: 2040 9800 swp v0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 2043 97ff swp v0,2047\(v1\) [ 0-9a-f]+: 2043 9800 swp v0,-2048\(v1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 2043 9000 swp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3489,11 +3429,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8000 lb at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3502,11 +3440,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8001 lb at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3514,11 +3450,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 ffff lb at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) [ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) @@ -3556,11 +3490,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8000 lbu at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3569,11 +3501,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8001 lbu at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3581,11 +3511,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 ffff lbu at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) @@ -3631,9 +3559,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 6060 1002 lwr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -3667,8 +3594,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3676,18 +3602,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 6064 1002 lwr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3727,14 +3650,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8000 sb at,-32768\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3744,14 +3662,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8002 sb v1,-32766\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8001 sb at,-32767\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 1861 0001 sb v1,1\(at\) @@ -3760,14 +3673,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 ffff sb at,-1\(a0\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) [ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) @@ -3812,9 +3720,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 6060 9002 swr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3848,8 +3755,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3857,18 +3763,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 6064 9002 swr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4696,8 +4599,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) [ 0-9a-f]+: f860 0004 sw v1,4\(zero\) [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) -[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) -[ 0-9a-f]+: f880 8003 sw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) [ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4706,21 +4610,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f860 8001 sw v1,-32767\(zero\) +[ 0-9a-f]+: f880 8005 sw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f860 ffff sw v1,-1\(zero\) +[ 0-9a-f]+: f880 0003 sw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) [ 0-9a-f]+: f881 567c sw a0,22140\(at\) @@ -4728,8 +4629,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) [ 0-9a-f]+: f864 0000 sw v1,0\(a0\) [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) -[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) -[ 0-9a-f]+: f884 8003 sw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) [ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4740,26 +4642,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f864 8001 sw v1,-32767\(a0\) +[ 0-9a-f]+: f884 8005 sw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f864 ffff sw v1,-1\(a0\) +[ 0-9a-f]+: f884 0003 sw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) @@ -4768,8 +4664,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) [ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) -[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) -[ 0-9a-f]+: fc80 8003 lw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) [ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4778,21 +4675,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\) +[ 0-9a-f]+: fc80 8005 lw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\) +[ 0-9a-f]+: fc80 0003 lw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) [ 0-9a-f]+: fc81 567c lw a0,22140\(at\) @@ -4800,8 +4694,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) [ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) -[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) -[ 0-9a-f]+: fc84 8003 lw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) [ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4812,26 +4707,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\) +[ 0-9a-f]+: fc84 8005 lw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\) +[ 0-9a-f]+: fc84 0003 lw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) @@ -4855,11 +4744,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4867,15 +4754,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) @@ -4890,11 +4775,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4902,15 +4785,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) @@ -5053,11 +4934,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5065,15 +4944,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) @@ -5088,11 +4965,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5100,15 +4975,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) @@ -5173,6 +5046,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 03ff 8b7c syscall 0x3ff [ 0-9a-f]+: 03ff fffa cop2 0x7fffff [ 0-9a-f]+: 0c00 nop +[ 0-9a-f]+: 0000 0000 nop [0-9a-f]+ <fp_test>: [ 0-9a-f]+: 5400 01a0 prefx 0x0,zero\(zero\) @@ -7234,8 +7108,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 4004 ldl v0,4\(v1\) [ 0-9a-f]+: 6043 4e00 ldl v0,-512\(v1\) [ 0-9a-f]+: 6043 41ff ldl v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 4000 ldl v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7249,8 +7122,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 5004 ldr v0,4\(v1\) [ 0-9a-f]+: 6043 5e00 ldr v0,-512\(v1\) [ 0-9a-f]+: 6043 51ff ldr v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 5000 ldr v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7264,8 +7136,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 7004 lld v0,4\(v1\) [ 0-9a-f]+: 6043 7e00 lld v0,-512\(v1\) [ 0-9a-f]+: 6043 71ff lld v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 7000 lld v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7279,8 +7150,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 e004 lwu v0,4\(v1\) [ 0-9a-f]+: 6043 ee00 lwu v0,-512\(v1\) [ 0-9a-f]+: 6043 e1ff lwu v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 e000 lwu v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7294,8 +7164,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 f004 scd v0,4\(v1\) [ 0-9a-f]+: 6043 fe00 scd v0,-512\(v1\) [ 0-9a-f]+: 6043 f1ff scd v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 f000 scd v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7315,12 +7184,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) [ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) [ 0-9a-f]+: 6043 c004 sdl v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 cfff sdl v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7331,12 +7198,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) [ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) [ 0-9a-f]+: 6043 d004 sdr v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 dfff sdr v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7365,17 +7230,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 7000 ldm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) [ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) [ 0-9a-f]+: 203d 7000 ldm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7390,20 +7253,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) [ 0-9a-f]+: 2043 4800 ldp v0,-2048\(v1\) [ 0-9a-f]+: 2043 47ff ldp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) [ 0-9a-f]+: 41a3 1234 lui v1,0x1234 @@ -7433,17 +7294,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 f000 sdm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) [ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) [ 0-9a-f]+: 203d f000 sdm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7458,20 +7317,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) [ 0-9a-f]+: 2043 c800 sdp v0,-2048\(v1\) [ 0-9a-f]+: 2043 c7ff sdp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 2043 c000 sdp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 @@ -7521,9 +7378,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 4fff ldl v1,-1\(zero\) +[ 0-9a-f]+: 6060 5006 ldr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) @@ -7557,8 +7413,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7566,18 +7421,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4fff ldl v1,-1\(a0\) +[ 0-9a-f]+: 6064 5006 ldr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -7627,9 +7479,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6060 cfff sdl v1,-1\(zero\) +[ 0-9a-f]+: 6060 d006 sdr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) @@ -7663,8 +7514,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7672,18 +7522,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 cfff sdl v1,-1\(a0\) +[ 0-9a-f]+: 6064 d006 sdr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 diff --git a/gas/testsuite/gas/mips/micromips-trap.d b/gas/testsuite/gas/mips/micromips-trap.d index bafc4a1..8c59ec5 100644 --- a/gas/testsuite/gas/mips/micromips-trap.d +++ b/gas/testsuite/gas/mips/micromips-trap.d @@ -12,10 +12,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\) [ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 6001 2800 pref 0x0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 6001 27ff pref 0x0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\) @@ -29,27 +29,23 @@ Disassembly of section \.text: [ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\) [ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\) [ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\) [ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 7fff addiu at,v0,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 3022 8000 addiu at,v0,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 0c00 nop [ 0-9a-f]+: 0c00 nop @@ -825,19 +821,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) [ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\) [ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\) [ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\) @@ -854,12 +848,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) @@ -875,10 +867,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) [ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\) @@ -1438,8 +1430,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 @@ -1450,8 +1442,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8001 li v1,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\) @@ -1461,11 +1453,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3004 ll v1,4\(a0\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 @@ -1473,15 +1463,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3064 8001 addiu v1,a0,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) @@ -1645,17 +1633,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) [ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) [ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -1666,20 +1652,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) [ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\) [ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) [ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) @@ -1688,8 +1672,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1700,8 +1684,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1712,11 +1696,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1724,15 +1706,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1747,8 +1727,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1759,8 +1739,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1771,11 +1751,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1783,15 +1761,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1806,8 +1782,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1818,8 +1794,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1830,11 +1806,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1842,15 +1816,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -1865,8 +1837,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1877,8 +1849,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1889,11 +1861,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1901,15 +1871,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -2383,8 +2351,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) [ 0-9a-f]+: 6060 b7ff sc v1,2047\(zero\) [ 0-9a-f]+: 6060 b800 sc v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -2395,8 +2363,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 6060 bfff sc v1,-1\(zero\) @@ -2407,11 +2375,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) [ 0-9a-f]+: 6064 b7ff sc v1,2047\(a0\) [ 0-9a-f]+: 6064 b800 sc v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -2419,15 +2385,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) @@ -2954,8 +2918,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -2966,8 +2930,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -2978,11 +2942,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -2990,15 +2952,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3011,8 +2971,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3023,8 +2983,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3035,11 +2995,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3047,15 +3005,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3068,8 +3024,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3080,8 +3036,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3092,11 +3048,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3104,15 +3058,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3125,8 +3077,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3137,8 +3089,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3149,11 +3101,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3161,15 +3111,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3206,19 +3154,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2020 d004 swm s0,4\(zero\) [ 0-9a-f]+: 2020 d7ff swm s0,2047\(zero\) [ 0-9a-f]+: 2020 d800 swm s0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2025 d000 swm s0,0\(a1\) [ 0-9a-f]+: 2025 d7ff swm s0,2047\(a1\) [ 0-9a-f]+: 2025 d800 swm s0,-2048\(a1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3025 0800 addiu at,a1,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3025 f7ff addiu at,a1,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2045 d7ff swm s0-s1,2047\(a1\) [ 0-9a-f]+: 2065 d7ff swm s0-s2,2047\(a1\) [ 0-9a-f]+: 2085 d7ff swm s0-s3,2047\(a1\) @@ -3237,12 +3183,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 22e5 d000 swm s0-s6,ra,0\(a1\) [ 0-9a-f]+: 2305 d000 swm s0-s7,ra,0\(a1\) [ 0-9a-f]+: 2325 d000 swm s0-s7,s8,ra,0\(a1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 d000 swm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) [ 0-9a-f]+: 203d d000 swm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -3251,25 +3195,21 @@ Disassembly of section \.text: [ 0-9a-f]+: 2040 9004 swp v0,4\(zero\) [ 0-9a-f]+: 2040 97ff swp v0,2047\(zero\) [ 0-9a-f]+: 2040 9800 swp v0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 2043 97ff swp v0,2047\(v1\) [ 0-9a-f]+: 2043 9800 swp v0,-2048\(v1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 2043 9000 swp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3437,11 +3377,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8000 lb at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3450,11 +3388,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8001 lb at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3462,11 +3398,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 ffff lb at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) [ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) @@ -3504,11 +3438,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8000 lbu at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3517,11 +3449,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8001 lbu at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3529,11 +3459,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 ffff lbu at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) @@ -3579,9 +3507,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 6060 1002 lwr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -3615,8 +3542,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3624,18 +3550,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 6064 1002 lwr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3675,14 +3598,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8000 sb at,-32768\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3692,14 +3610,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8002 sb v1,-32766\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8001 sb at,-32767\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 1861 0001 sb v1,1\(at\) @@ -3708,14 +3621,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 ffff sb at,-1\(a0\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) [ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) @@ -3760,9 +3668,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 6060 9002 swr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3796,8 +3703,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3805,18 +3711,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 6064 9002 swr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4703,8 +4606,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) [ 0-9a-f]+: f860 0004 sw v1,4\(zero\) [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) -[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) -[ 0-9a-f]+: f880 8003 sw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) [ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4713,21 +4617,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f860 8001 sw v1,-32767\(zero\) +[ 0-9a-f]+: f880 8005 sw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f860 ffff sw v1,-1\(zero\) +[ 0-9a-f]+: f880 0003 sw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) [ 0-9a-f]+: f881 567c sw a0,22140\(at\) @@ -4735,8 +4636,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) [ 0-9a-f]+: f864 0000 sw v1,0\(a0\) [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) -[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) -[ 0-9a-f]+: f884 8003 sw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) [ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4747,26 +4649,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f864 8001 sw v1,-32767\(a0\) +[ 0-9a-f]+: f884 8005 sw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f864 ffff sw v1,-1\(a0\) +[ 0-9a-f]+: f884 0003 sw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) @@ -4775,8 +4671,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) [ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) -[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) -[ 0-9a-f]+: fc80 8003 lw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) [ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4785,21 +4682,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\) +[ 0-9a-f]+: fc80 8005 lw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\) +[ 0-9a-f]+: fc80 0003 lw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) [ 0-9a-f]+: fc81 567c lw a0,22140\(at\) @@ -4807,8 +4701,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) [ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) -[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) -[ 0-9a-f]+: fc84 8003 lw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) [ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4819,26 +4714,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\) +[ 0-9a-f]+: fc84 8005 lw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\) +[ 0-9a-f]+: fc84 0003 lw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) @@ -4862,11 +4751,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4874,15 +4761,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) @@ -4897,11 +4782,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4909,15 +4792,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) @@ -5060,11 +4941,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5072,15 +4951,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) @@ -5095,11 +4972,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5107,15 +4982,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) @@ -5180,7 +5053,6 @@ Disassembly of section \.text: [ 0-9a-f]+: 03ff 8b7c syscall 0x3ff [ 0-9a-f]+: 03ff fffa cop2 0x7fffff [ 0-9a-f]+: 0c00 nop -[ 0-9a-f]+: 0000 0000 nop [0-9a-f]+ <fp_test>: [ 0-9a-f]+: 5400 01a0 prefx 0x0,zero\(zero\) @@ -7185,8 +7057,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 4004 ldl v0,4\(v1\) [ 0-9a-f]+: 6043 4e00 ldl v0,-512\(v1\) [ 0-9a-f]+: 6043 41ff ldl v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 4000 ldl v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7200,8 +7071,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 5004 ldr v0,4\(v1\) [ 0-9a-f]+: 6043 5e00 ldr v0,-512\(v1\) [ 0-9a-f]+: 6043 51ff ldr v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 5000 ldr v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7215,8 +7085,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 7004 lld v0,4\(v1\) [ 0-9a-f]+: 6043 7e00 lld v0,-512\(v1\) [ 0-9a-f]+: 6043 71ff lld v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 7000 lld v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7230,8 +7099,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 e004 lwu v0,4\(v1\) [ 0-9a-f]+: 6043 ee00 lwu v0,-512\(v1\) [ 0-9a-f]+: 6043 e1ff lwu v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 e000 lwu v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7245,8 +7113,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 f004 scd v0,4\(v1\) [ 0-9a-f]+: 6043 fe00 scd v0,-512\(v1\) [ 0-9a-f]+: 6043 f1ff scd v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 f000 scd v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7266,12 +7133,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) [ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) [ 0-9a-f]+: 6043 c004 sdl v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 cfff sdl v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7282,12 +7147,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) [ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) [ 0-9a-f]+: 6043 d004 sdr v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 dfff sdr v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7316,17 +7179,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 7000 ldm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) [ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) [ 0-9a-f]+: 203d 7000 ldm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7341,20 +7202,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) [ 0-9a-f]+: 2043 4800 ldp v0,-2048\(v1\) [ 0-9a-f]+: 2043 47ff ldp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) [ 0-9a-f]+: 41a3 1234 lui v1,0x1234 @@ -7384,17 +7243,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 f000 sdm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) [ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) [ 0-9a-f]+: 203d f000 sdm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7409,20 +7266,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) [ 0-9a-f]+: 2043 c800 sdp v0,-2048\(v1\) [ 0-9a-f]+: 2043 c7ff sdp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 2043 c000 sdp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 @@ -7472,9 +7327,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 4fff ldl v1,-1\(zero\) +[ 0-9a-f]+: 6060 5006 ldr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) @@ -7508,8 +7362,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7517,18 +7370,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4fff ldl v1,-1\(a0\) +[ 0-9a-f]+: 6064 5006 ldr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -7578,9 +7428,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6060 cfff sdl v1,-1\(zero\) +[ 0-9a-f]+: 6060 d006 sdr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) @@ -7614,8 +7463,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7623,18 +7471,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 cfff sdl v1,-1\(a0\) +[ 0-9a-f]+: 6064 d006 sdr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 diff --git a/gas/testsuite/gas/mips/micromips.d b/gas/testsuite/gas/mips/micromips.d index 29af148..6bd6bfa 100644 --- a/gas/testsuite/gas/mips/micromips.d +++ b/gas/testsuite/gas/mips/micromips.d @@ -12,10 +12,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\) [ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 6001 2800 pref 0x0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 6001 27ff pref 0x0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\) [ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\) @@ -29,27 +29,23 @@ Disassembly of section \.text: [ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\) [ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\) [ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\) [ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 2800 pref 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 63e1 27ff pref 0x1f,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 6061 2fff pref 0x3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\) +[ 0-9a-f]+: 3022 7fff addiu at,v0,32767 +[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) +[ 0-9a-f]+: 3022 8000 addiu at,v0,-32768 [ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\) [ 0-9a-f]+: 0c00 nop [ 0-9a-f]+: 0c00 nop @@ -825,19 +821,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\) [ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\) [ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\) [ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 67ff cache 0x0,2047\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0041 0950 addu at,at,v0 -[ 0-9a-f]+: 2001 6800 cache 0x0,-2048\(at\) +[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) +[ 0-9a-f]+: 3022 0800 addiu at,v0,2048 +[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\) [ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\) @@ -854,12 +848,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) @@ -875,10 +867,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 23e1 6800 cache 0x1f,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 23e1 67ff cache 0x1f,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\) [ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\) @@ -1453,8 +1445,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 3000 ll v1,0\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) [ 0-9a-f]+: 6060 3004 ll v1,4\(zero\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 @@ -1465,8 +1457,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3060 8001 li v1,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\) @@ -1476,11 +1468,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3000 ll v1,0\(a0\) [ 0-9a-f]+: 6064 3004 ll v1,4\(a0\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 @@ -1488,15 +1478,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 +[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 ffff lui v1,0xffff [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) -[ 0-9a-f]+: 3060 8000 li v1,-32768 -[ 0-9a-f]+: 0083 1950 addu v1,v1,a0 -[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\) +[ 0-9a-f]+: 3064 8001 addiu v1,a0,-32767 +[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) [ 0-9a-f]+: 41a3 f000 lui v1,0xf000 [ 0-9a-f]+: 0083 1950 addu v1,v1,a0 [ 0-9a-f]+: 6063 3000 ll v1,0\(v1\) @@ -1660,17 +1648,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) [ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 5000 lwm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\) [ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -1681,20 +1667,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\) [ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\) [ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 1000 lwp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\) [ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\) @@ -1703,8 +1687,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1715,8 +1699,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1727,11 +1711,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1739,15 +1721,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1762,8 +1742,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\) [ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1774,8 +1754,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) @@ -1786,11 +1766,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\) [ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\) [ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1798,15 +1776,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -1821,8 +1797,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1833,8 +1809,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1845,11 +1821,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1857,15 +1831,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -1880,8 +1852,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 1000 lwr v1,0\(zero\) [ 0-9a-f]+: 6060 17ff lwr v1,2047\(zero\) [ 0-9a-f]+: 6060 1800 lwr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -1892,8 +1864,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 6060 1fff lwr v1,-1\(zero\) @@ -1904,11 +1876,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 1000 lwr v1,0\(a0\) [ 0-9a-f]+: 6064 17ff lwr v1,2047\(a0\) [ 0-9a-f]+: 6064 1800 lwr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1fff lwr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -1916,15 +1886,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 1001 lwr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 1000 lwr v1,0\(at\) @@ -2455,8 +2423,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 b004 sc v1,4\(zero\) [ 0-9a-f]+: 6060 b7ff sc v1,2047\(zero\) [ 0-9a-f]+: 6060 b800 sc v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -2467,8 +2435,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 6060 bfff sc v1,-1\(zero\) @@ -2479,11 +2447,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 b000 sc v1,0\(a0\) [ 0-9a-f]+: 6064 b7ff sc v1,2047\(a0\) [ 0-9a-f]+: 6064 b800 sc v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 bfff sc v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -2491,15 +2457,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b001 sc v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 b001 sc v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 b000 sc v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 b000 sc v1,0\(at\) @@ -3026,8 +2990,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3038,8 +3002,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3050,11 +3014,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3062,15 +3024,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3083,8 +3043,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3095,8 +3055,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3107,11 +3067,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3119,15 +3077,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3140,8 +3096,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 8004 swl v1,4\(zero\) [ 0-9a-f]+: 6060 87ff swl v1,2047\(zero\) [ 0-9a-f]+: 6060 8800 swl v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3152,8 +3108,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) @@ -3164,11 +3120,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 8000 swl v1,0\(a0\) [ 0-9a-f]+: 6064 87ff swl v1,2047\(a0\) [ 0-9a-f]+: 6064 8800 swl v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8fff swl v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3176,15 +3130,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8001 swl v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8001 swl v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3197,8 +3149,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 9004 swr v1,4\(zero\) [ 0-9a-f]+: 6060 97ff swr v1,2047\(zero\) [ 0-9a-f]+: 6060 9800 swr v1,-2048\(zero\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3209,8 +3161,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3020 8001 li at,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 6060 9fff swr v1,-1\(zero\) @@ -3221,11 +3173,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 6064 9000 swr v1,0\(a0\) [ 0-9a-f]+: 6064 97ff swr v1,2047\(a0\) [ 0-9a-f]+: 6064 9800 swr v1,-2048\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9fff swr v1,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3233,15 +3183,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9001 swr v1,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 9001 swr v1,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 6061 9000 swr v1,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 9000 swr v1,0\(at\) @@ -3278,19 +3226,17 @@ Disassembly of section \.text: [ 0-9a-f]+: 2020 d004 swm s0,4\(zero\) [ 0-9a-f]+: 2020 d7ff swm s0,2047\(zero\) [ 0-9a-f]+: 2020 d800 swm s0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2025 d000 swm s0,0\(a1\) [ 0-9a-f]+: 2025 d7ff swm s0,2047\(a1\) [ 0-9a-f]+: 2025 d800 swm s0,-2048\(a1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d800 swm s0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 00a1 0950 addu at,at,a1 -[ 0-9a-f]+: 2021 d7ff swm s0,2047\(at\) +[ 0-9a-f]+: 3025 0800 addiu at,a1,2048 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 3025 f7ff addiu at,a1,-2049 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) [ 0-9a-f]+: 2045 d7ff swm s0-s1,2047\(a1\) [ 0-9a-f]+: 2065 d7ff swm s0-s2,2047\(a1\) [ 0-9a-f]+: 2085 d7ff swm s0-s3,2047\(a1\) @@ -3309,12 +3255,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 22e5 d000 swm s0-s6,ra,0\(a1\) [ 0-9a-f]+: 2305 d000 swm s0-s7,ra,0\(a1\) [ 0-9a-f]+: 2325 d000 swm s0-s7,s8,ra,0\(a1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 d000 swm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 d000 swm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 dfff swm s0,-1\(at\) [ 0-9a-f]+: 203d d000 swm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -3323,25 +3267,21 @@ Disassembly of section \.text: [ 0-9a-f]+: 2040 9004 swp v0,4\(zero\) [ 0-9a-f]+: 2040 97ff swp v0,2047\(zero\) [ 0-9a-f]+: 2040 9800 swp v0,-2048\(zero\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) +[ 0-9a-f]+: 3020 0800 li at,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3020 f7ff li at,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 205d 9000 swp v0,0\(sp\) [ 0-9a-f]+: 2043 97ff swp v0,2047\(v1\) [ 0-9a-f]+: 2043 9800 swp v0,-2048\(v1\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9800 swp v0,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 97ff swp v0,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 9fff swp v0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 0800 addiu at,v1,2048 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 +[ 0-9a-f]+: 2041 9000 swp v0,0\(at\) +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 2041 9000 swp v0,0\(at\) [ 0-9a-f]+: 2043 9000 swp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -3509,11 +3449,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8000 lb at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3522,11 +3460,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 8001 lb at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3534,11 +3470,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1c61 0000 lb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1c24 ffff lb at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 1420 0004 lbu at,4\(zero\) [ 0-9a-f]+: 1460 0005 lbu v1,5\(zero\) @@ -3576,11 +3510,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8000 lbu at,-32768\(a0\) +[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 @@ -3589,11 +3521,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 8001 lbu at,-32767\(a0\) +[ 0-9a-f]+: 1464 8002 lbu v1,-32766\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3601,11 +3531,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1461 0000 lbu v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 +[ 0-9a-f]+: 1424 ffff lbu at,-1\(a0\) +[ 0-9a-f]+: 1464 0000 lbu v1,0\(a0\) +[ 0-9a-f]+: 0021 4000 sll at,at,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at [ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\) [ 0-9a-f]+: 6060 1003 lwr v1,3\(zero\) @@ -3651,9 +3579,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\) +[ 0-9a-f]+: 6060 1002 lwr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) @@ -3687,8 +3614,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3696,18 +3622,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) [ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\) -[ 0-9a-f]+: 6061 1003 lwr v1,3\(at\) +[ 0-9a-f]+: 6064 0fff lwl v1,-1\(a0\) +[ 0-9a-f]+: 6064 1002 lwr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3747,14 +3670,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8001 sb v1,-32767\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8000 sb at,-32768\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 5021 0001 ori at,at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -3764,14 +3682,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 8002 sb v1,-32766\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 8001 sb at,-32767\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 1861 0001 sb v1,1\(at\) @@ -3780,14 +3693,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 1421 0001 lbu at,1\(at\) [ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 [ 0-9a-f]+: 0023 1a90 or v1,v1,at -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 1861 0001 sb v1,1\(at\) -[ 0-9a-f]+: 0063 4040 srl v1,v1,0x8 -[ 0-9a-f]+: 1861 0000 sb v1,0\(at\) -[ 0-9a-f]+: 1421 0001 lbu at,1\(at\) -[ 0-9a-f]+: 0063 4000 sll v1,v1,0x8 -[ 0-9a-f]+: 0023 1a90 or v1,v1,at +[ 0-9a-f]+: 1864 0000 sb v1,0\(a0\) +[ 0-9a-f]+: 0023 4040 srl at,v1,0x8 +[ 0-9a-f]+: 1824 ffff sb at,-1\(a0\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) [ 0-9a-f]+: 6060 9003 swr v1,3\(zero\) [ 0-9a-f]+: 6060 8000 swl v1,0\(zero\) @@ -3832,9 +3740,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6060 8fff swl v1,-1\(zero\) +[ 0-9a-f]+: 6060 9002 swr v1,2\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) @@ -3868,8 +3775,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -3877,18 +3783,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 8000 swl v1,0\(at\) [ 0-9a-f]+: 6061 9003 swr v1,3\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 8000 swl v1,0\(at\) -[ 0-9a-f]+: 6061 9003 swr v1,3\(at\) +[ 0-9a-f]+: 6064 8fff swl v1,-1\(a0\) +[ 0-9a-f]+: 6064 9002 swr v1,2\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4775,8 +4678,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) [ 0-9a-f]+: f860 0004 sw v1,4\(zero\) [ 0-9a-f]+: f880 0008 sw a0,8\(zero\) -[ 0-9a-f]+: f860 7fff sw v1,32767\(zero\) -[ 0-9a-f]+: f880 8003 sw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) [ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4785,21 +4689,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f860 8000 sw v1,-32768\(zero\) +[ 0-9a-f]+: f880 8004 sw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f860 8001 sw v1,-32767\(zero\) +[ 0-9a-f]+: f880 8005 sw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f860 ffff sw v1,-1\(zero\) +[ 0-9a-f]+: f880 0003 sw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) [ 0-9a-f]+: f881 567c sw a0,22140\(at\) @@ -4807,8 +4708,9 @@ Disassembly of section \.text: [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) [ 0-9a-f]+: f864 0000 sw v1,0\(a0\) [ 0-9a-f]+: f884 0004 sw a0,4\(a0\) -[ 0-9a-f]+: f864 7fff sw v1,32767\(a0\) -[ 0-9a-f]+: f884 8003 sw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: f861 0000 sw v1,0\(at\) +[ 0-9a-f]+: f881 0004 sw a0,4\(at\) [ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) [ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4819,26 +4721,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8000 sw v1,-32768\(at\) -[ 0-9a-f]+: f881 8004 sw a0,-32764\(at\) +[ 0-9a-f]+: f864 8000 sw v1,-32768\(a0\) +[ 0-9a-f]+: f884 8004 sw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0001 sw v1,1\(at\) [ 0-9a-f]+: f881 0005 sw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 8001 sw v1,-32767\(at\) -[ 0-9a-f]+: f881 8005 sw a0,-32763\(at\) +[ 0-9a-f]+: f864 8001 sw v1,-32767\(a0\) +[ 0-9a-f]+: f884 8005 sw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 0000 sw v1,0\(at\) [ 0-9a-f]+: f881 0004 sw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: f861 ffff sw v1,-1\(at\) -[ 0-9a-f]+: f881 0003 sw a0,3\(at\) +[ 0-9a-f]+: f864 ffff sw v1,-1\(a0\) +[ 0-9a-f]+: f884 0003 sw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: f861 5678 sw v1,22136\(at\) @@ -4847,8 +4743,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) [ 0-9a-f]+: fc60 0004 lw v1,4\(zero\) [ 0-9a-f]+: fc80 0008 lw a0,8\(zero\) -[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\) -[ 0-9a-f]+: fc80 8003 lw a0,-32765\(zero\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) [ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4857,21 +4754,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\) +[ 0-9a-f]+: fc80 8004 lw a0,-32764\(zero\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\) +[ 0-9a-f]+: fc80 8005 lw a0,-32763\(zero\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\) +[ 0-9a-f]+: fc80 0003 lw a0,3\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) [ 0-9a-f]+: fc81 567c lw a0,22140\(at\) @@ -4879,8 +4773,9 @@ Disassembly of section \.text: [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) [ 0-9a-f]+: fc64 0000 lw v1,0\(a0\) [ 0-9a-f]+: fc84 0004 lw a0,4\(a0\) -[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\) -[ 0-9a-f]+: fc84 8003 lw a0,-32765\(a0\) +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: fc61 0000 lw v1,0\(at\) +[ 0-9a-f]+: fc81 0004 lw a0,4\(at\) [ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) [ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 @@ -4891,26 +4786,20 @@ Disassembly of section \.text: [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8000 lw v1,-32768\(at\) -[ 0-9a-f]+: fc81 8004 lw a0,-32764\(at\) +[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\) +[ 0-9a-f]+: fc84 8004 lw a0,-32764\(a0\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0001 lw v1,1\(at\) [ 0-9a-f]+: fc81 0005 lw a0,5\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 8001 lw v1,-32767\(at\) -[ 0-9a-f]+: fc81 8005 lw a0,-32763\(at\) +[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\) +[ 0-9a-f]+: fc84 8005 lw a0,-32763\(a0\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 0000 lw v1,0\(at\) [ 0-9a-f]+: fc81 0004 lw a0,4\(at\) -[ 0-9a-f]+: 41a1 0000 lui at,0x0 -[ 0-9a-f]+: 0024 0950 addu at,a0,at -[ 0-9a-f]+: fc61 ffff lw v1,-1\(at\) -[ 0-9a-f]+: fc81 0003 lw a0,3\(at\) +[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\) +[ 0-9a-f]+: fc84 0003 lw a0,3\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 0024 0950 addu at,a0,at [ 0-9a-f]+: fc61 5678 lw v1,22136\(at\) @@ -4934,11 +4823,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 2004 ldc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 2000 ldc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2fff ldc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4946,15 +4833,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 2001 ldc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 2000 ldc2 \$3,0\(at\) @@ -4969,11 +4854,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 0004 lwc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 0000 lwc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0fff lwc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -4981,15 +4864,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 0001 lwc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 0000 lwc2 \$3,0\(at\) @@ -5132,11 +5013,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 a004 sdc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 a000 sdc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 afff sdc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5144,15 +5023,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 a001 sdc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 a000 sdc2 \$3,0\(at\) @@ -5167,11 +5044,9 @@ Disassembly of section \.text: [ 0-9a-f]+: 2060 8004 swc2 \$3,4\(zero\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) [ 0-9a-f]+: 2064 8000 swc2 \$3,0\(a0\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8fff swc2 \$3,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 7fff addiu at,a0,32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -5179,15 +5054,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 2061 8001 swc2 \$3,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 2061 8000 swc2 \$3,0\(at\) @@ -5252,7 +5125,6 @@ Disassembly of section \.text: [ 0-9a-f]+: 03ff 8b7c syscall 0x3ff [ 0-9a-f]+: 03ff fffa cop2 0x7fffff [ 0-9a-f]+: 0c00 nop -[ 0-9a-f]+: 0000 0000 nop [0-9a-f]+ <fp_test>: [ 0-9a-f]+: 5400 01a0 prefx 0x0,zero\(zero\) @@ -7314,8 +7186,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 4004 ldl v0,4\(v1\) [ 0-9a-f]+: 6043 4e00 ldl v0,-512\(v1\) [ 0-9a-f]+: 6043 41ff ldl v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 4000 ldl v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7329,8 +7200,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 5004 ldr v0,4\(v1\) [ 0-9a-f]+: 6043 5e00 ldr v0,-512\(v1\) [ 0-9a-f]+: 6043 51ff ldr v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 5000 ldr v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7344,8 +7214,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 7004 lld v0,4\(v1\) [ 0-9a-f]+: 6043 7e00 lld v0,-512\(v1\) [ 0-9a-f]+: 6043 71ff lld v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 7000 lld v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7359,8 +7228,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 e004 lwu v0,4\(v1\) [ 0-9a-f]+: 6043 ee00 lwu v0,-512\(v1\) [ 0-9a-f]+: 6043 e1ff lwu v0,511\(v1\) -[ 0-9a-f]+: 3040 8000 li v0,-32768 -[ 0-9a-f]+: 0062 1150 addu v0,v0,v1 +[ 0-9a-f]+: 3043 8000 addiu v0,v1,-32768 [ 0-9a-f]+: 6042 e000 lwu v0,0\(v0\) [ 0-9a-f]+: 41a2 1234 lui v0,0x1234 [ 0-9a-f]+: 5042 5000 ori v0,v0,0x5000 @@ -7374,8 +7242,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 6043 f004 scd v0,4\(v1\) [ 0-9a-f]+: 6043 fe00 scd v0,-512\(v1\) [ 0-9a-f]+: 6043 f1ff scd v0,511\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 [ 0-9a-f]+: 6041 f000 scd v0,0\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 @@ -7395,12 +7262,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 c000 sdl v0,0\(zero\) [ 0-9a-f]+: 6040 c004 sdl v0,4\(zero\) [ 0-9a-f]+: 6043 c004 sdl v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 c000 sdl v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 cfff sdl v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7411,12 +7276,10 @@ Disassembly of section \.text: [ 0-9a-f]+: 6040 d000 sdr v0,0\(zero\) [ 0-9a-f]+: 6040 d004 sdr v0,4\(zero\) [ 0-9a-f]+: 6043 d004 sdr v0,4\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 6041 d000 sdr v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 6041 dfff sdr v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5000 ori at,at,0x5000 [ 0-9a-f]+: 0061 0950 addu at,at,v1 @@ -7445,17 +7308,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 7000 ldm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) [ 0-9a-f]+: 2020 7000 ldm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 7000 ldm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 7fff ldm s0,-1\(at\) [ 0-9a-f]+: 203d 7000 ldm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7470,20 +7331,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d 4000 ldp v0,0\(sp\) [ 0-9a-f]+: 2043 4800 ldp v0,-2048\(v1\) [ 0-9a-f]+: 2043 47ff ldp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 4000 ldp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 4fff ldp v0,-1\(at\) [ 0-9a-f]+: 3060 8000 li v1,-32768 [ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) -[ 0-9a-f]+: 5060 8000 li v1,0x8000 -[ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) +[ 0-9a-f]+: 3060 7fff li v1,32767 +[ 0-9a-f]+: 2043 4000 ldp v0,0\(v1\) [ 0-9a-f]+: 41a3 0001 lui v1,0x1 [ 0-9a-f]+: 2043 4fff ldp v0,-1\(v1\) [ 0-9a-f]+: 41a3 1234 lui v1,0x1234 @@ -7513,17 +7372,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 2325 f000 sdm s0-s7,s8,ra,0\(a1\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) [ 0-9a-f]+: 2020 f000 sdm s0,0\(zero\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp +[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768 +[ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) +[ 0-9a-f]+: 303d 7fff addiu at,sp,32767 [ 0-9a-f]+: 2021 f000 sdm s0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03a1 0950 addu at,at,sp -[ 0-9a-f]+: 2021 ffff sdm s0,-1\(at\) [ 0-9a-f]+: 203d f000 sdm s0,0\(sp\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 03a1 0950 addu at,at,sp @@ -7538,20 +7395,18 @@ Disassembly of section \.text: [ 0-9a-f]+: 205d c000 sdp v0,0\(sp\) [ 0-9a-f]+: 2043 c800 sdp v0,-2048\(v1\) [ 0-9a-f]+: 2043 c7ff sdp v0,2047\(v1\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 +[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) +[ 0-9a-f]+: 3023 7fff addiu at,v1,32767 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 0061 0950 addu at,at,v1 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 2043 c000 sdp v0,0\(v1\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0061 0950 addu at,at,v1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 3020 8000 li at,-32768 [ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) +[ 0-9a-f]+: 3020 7fff li at,32767 +[ 0-9a-f]+: 2041 c000 sdp v0,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 2041 cfff sdp v0,-1\(at\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 @@ -7601,9 +7456,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6060 4fff ldl v1,-1\(zero\) +[ 0-9a-f]+: 6060 5006 ldr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) @@ -7637,8 +7491,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7646,18 +7499,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) [ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 4000 ldl v1,0\(at\) -[ 0-9a-f]+: 6061 5007 ldr v1,7\(at\) +[ 0-9a-f]+: 6064 4fff ldl v1,-1\(a0\) +[ 0-9a-f]+: 6064 5006 ldr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -7707,9 +7557,8 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6060 cfff sdl v1,-1\(zero\) +[ 0-9a-f]+: 6060 d006 sdr v1,6\(zero\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) @@ -7743,8 +7592,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff @@ -7752,18 +7600,15 @@ Disassembly of section \.text: [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 8001 li at,-32767 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) [ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) -[ 0-9a-f]+: 3020 ffff li at,-1 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 6061 c000 sdl v1,0\(at\) -[ 0-9a-f]+: 6061 d007 sdr v1,7\(at\) +[ 0-9a-f]+: 6064 cfff sdl v1,-1\(a0\) +[ 0-9a-f]+: 6064 d006 sdr v1,6\(a0\) [ 0-9a-f]+: 41a1 1234 lui at,0x1234 [ 0-9a-f]+: 5021 5678 ori at,at,0x5678 [ 0-9a-f]+: 0081 0950 addu at,at,a0 diff --git a/gas/testsuite/gas/mips/micromips@cache.d b/gas/testsuite/gas/mips/micromips@cache.d index eb3964a..226ac48 100644 --- a/gas/testsuite/gas/mips/micromips@cache.d +++ b/gas/testsuite/gas/mips/micromips@cache.d @@ -10,17 +10,13 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 20a2 67ff cache 0x5,2047\(v0\) [0-9a-f]+ <[^>]*> 20a3 6800 cache 0x5,-2048\(v1\) -[0-9a-f]+ <[^>]*> 3020 1000 li at,4096 -[0-9a-f]+ <[^>]*> 0081 0950 addu at,at,a0 -[0-9a-f]+ <[^>]*> 20a1 6800 cache 0x5,-2048\(at\) -[0-9a-f]+ <[^>]*> 3020 f000 li at,-4096 -[0-9a-f]+ <[^>]*> 00a1 0950 addu at,at,a1 -[0-9a-f]+ <[^>]*> 20a1 67ff cache 0x5,2047\(at\) -[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 -[0-9a-f]+ <[^>]*> 00c1 0950 addu at,at,a2 -[0-9a-f]+ <[^>]*> 20a1 6fff cache 0x5,-1\(at\) -[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 -[0-9a-f]+ <[^>]*> 00e1 0950 addu at,at,a3 +[0-9a-f]+ <[^>]*> 3024 0800 addiu at,a0,2048 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3025 f7ff addiu at,a1,-2049 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3026 7fff addiu at,a2,32767 +[0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3027 8000 addiu at,a3,-32768 [0-9a-f]+ <[^>]*> 20a1 6000 cache 0x5,0\(at\) [0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 [0-9a-f]+ <[^>]*> 0101 0950 addu at,at,t0 diff --git a/gas/testsuite/gas/mips/micromips@eva.d b/gas/testsuite/gas/mips/micromips@eva.d index fc3caa1..d528f09 100644 --- a/gas/testsuite/gas/mips/micromips@eva.d +++ b/gas/testsuite/gas/mips/micromips@eva.d @@ -13,65 +13,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6060 6100 lbue \$3,-256\(\$0\) [ 0-9a-f]+: 6085 60ff lbue \$4,255\(\$5\) [ 0-9a-f]+: 60c0 60ff lbue \$6,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 -[ 0-9a-f]+: 60e1 60ff lbue \$7,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6121 60ff lbue \$9,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0161 0950 addu \$1,\$1,\$11 -[ 0-9a-f]+: 6141 6100 lbue \$10,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6181 6100 lbue \$12,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 +[ 0-9a-f]+: 3028 feff addiu \$1,\$8,-257 +[ 0-9a-f]+: 60e1 6000 lbue \$7,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6121 6000 lbue \$9,0\(\$1\) +[ 0-9a-f]+: 302b 0100 addiu \$1,\$11,256 +[ 0-9a-f]+: 6141 6000 lbue \$10,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6181 6000 lbue \$12,0\(\$1\) +[ 0-9a-f]+: 302e fe00 addiu \$1,\$14,-512 [ 0-9a-f]+: 61a1 6000 lbue \$13,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 61e1 6000 lbue \$15,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0221 0950 addu \$1,\$1,\$17 -[ 0-9a-f]+: 6201 61ff lbue \$16,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6241 61ff lbue \$18,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 +[ 0-9a-f]+: 3031 01ff addiu \$1,\$17,511 +[ 0-9a-f]+: 6201 6000 lbue \$16,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6241 6000 lbue \$18,0\(\$1\) +[ 0-9a-f]+: 3034 fc00 addiu \$1,\$20,-1024 [ 0-9a-f]+: 6261 6000 lbue \$19,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 62a1 6000 lbue \$21,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 02e1 0950 addu \$1,\$1,\$23 -[ 0-9a-f]+: 62c1 61ff lbue \$22,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6301 61ff lbue \$24,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 +[ 0-9a-f]+: 3037 03ff addiu \$1,\$23,1023 +[ 0-9a-f]+: 62c1 6000 lbue \$22,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6301 6000 lbue \$24,0\(\$1\) +[ 0-9a-f]+: 303a f800 addiu \$1,\$26,-2048 [ 0-9a-f]+: 6321 6000 lbue \$25,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6361 6000 lbue \$27,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 -[ 0-9a-f]+: 6381 61ff lbue \$28,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 63c1 61ff lbue \$30,-1\(\$1\) +[ 0-9a-f]+: 303d 07ff addiu \$1,\$29,2047 +[ 0-9a-f]+: 6381 6000 lbue \$28,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 63c1 6000 lbue \$30,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 63e1 6000 lbue \$31,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6041 6000 lbue \$2,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 -[ 0-9a-f]+: 6061 61ff lbue \$3,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 60a1 61ff lbue \$5,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 +[ 0-9a-f]+: 3024 0fff addiu \$1,\$4,4095 +[ 0-9a-f]+: 6061 6000 lbue \$3,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 60a1 6000 lbue \$5,0\(\$1\) +[ 0-9a-f]+: 3027 8000 addiu \$1,\$7,-32768 [ 0-9a-f]+: 60c1 6000 lbue \$6,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6101 6000 lbue \$8,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 -[ 0-9a-f]+: 6121 61ff lbue \$9,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6161 61ff lbue \$11,-1\(\$1\) +[ 0-9a-f]+: 302a 7fff addiu \$1,\$10,32767 +[ 0-9a-f]+: 6121 6000 lbue \$9,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6161 6000 lbue \$11,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 [ 0-9a-f]+: 6181 61ff lbue \$12,-1\(\$1\) @@ -102,66 +91,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 63a0 6300 lhue \$29,-256\(\$0\) [ 0-9a-f]+: 63df 62ff lhue \$30,255\(\$31\) [ 0-9a-f]+: 6000 62ff lhue \$0,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 -[ 0-9a-f]+: 6041 62ff lhue \$2,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6081 62ff lhue \$4,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 00c1 0950 addu \$1,\$1,\$6 -[ 0-9a-f]+: 60a1 6300 lhue \$5,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 60e1 6300 lhue \$7,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 +[ 0-9a-f]+: 3023 feff addiu \$1,\$3,-257 +[ 0-9a-f]+: 6041 6200 lhue \$2,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6081 6200 lhue \$4,0\(\$1\) +[ 0-9a-f]+: 3026 0100 addiu \$1,\$6,256 +[ 0-9a-f]+: 60a1 6200 lhue \$5,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 60e1 6200 lhue \$7,0\(\$1\) +[ 0-9a-f]+: 3029 fe00 addiu \$1,\$9,-512 [ 0-9a-f]+: 6101 6200 lhue \$8,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6141 6200 lhue \$10,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0181 0950 addu \$1,\$1,\$12 -[ 0-9a-f]+: 6161 63ff lhue \$11,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 61a1 63ff lhue \$13,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 +[ 0-9a-f]+: 302c 01ff addiu \$1,\$12,511 +[ 0-9a-f]+: 6161 6200 lhue \$11,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 61a1 6200 lhue \$13,0\(\$1\) +[ 0-9a-f]+: 302f fc00 addiu \$1,\$15,-1024 [ 0-9a-f]+: 61c1 6200 lhue \$14,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6201 6200 lhue \$16,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0241 0950 addu \$1,\$1,\$18 -[ 0-9a-f]+: 6221 63ff lhue \$17,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6261 63ff lhue \$19,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 02a1 0950 addu \$1,\$1,\$21 +[ 0-9a-f]+: 3032 03ff addiu \$1,\$18,1023 +[ 0-9a-f]+: 6221 6200 lhue \$17,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6261 6200 lhue \$19,0\(\$1\) +[ 0-9a-f]+: 3035 f800 addiu \$1,\$21,-2048 [ 0-9a-f]+: 6281 6200 lhue \$20,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 62c1 6200 lhue \$22,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 -[ 0-9a-f]+: 62e1 63ff lhue \$23,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6321 63ff lhue \$25,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0361 0950 addu \$1,\$1,\$27 +[ 0-9a-f]+: 3038 07ff addiu \$1,\$24,2047 +[ 0-9a-f]+: 62e1 6200 lhue \$23,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6321 6200 lhue \$25,0\(\$1\) +[ 0-9a-f]+: 303b f000 addiu \$1,\$27,-4096 [ 0-9a-f]+: 6341 6200 lhue \$26,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6381 6200 lhue \$28,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 -[ 0-9a-f]+: 63a1 63ff lhue \$29,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 63e1 63ff lhue \$31,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0041 0950 addu \$1,\$1,\$2 +[ 0-9a-f]+: 303e 0fff addiu \$1,\$30,4095 +[ 0-9a-f]+: 63a1 6200 lhue \$29,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 63e1 6200 lhue \$31,0\(\$1\) +[ 0-9a-f]+: 3022 8000 addiu \$1,\$2,-32768 [ 0-9a-f]+: 6001 6200 lhue \$0,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6061 6200 lhue \$3,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 -[ 0-9a-f]+: 6081 63ff lhue \$4,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 60c1 63ff lhue \$6,-1\(\$1\) +[ 0-9a-f]+: 3025 7fff addiu \$1,\$5,32767 +[ 0-9a-f]+: 6081 6200 lhue \$4,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 60c1 6200 lhue \$6,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 [ 0-9a-f]+: 60e1 63ff lhue \$7,-1\(\$1\) @@ -192,65 +169,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6300 6900 lbe \$24,-256\(\$0\) [ 0-9a-f]+: 633a 68ff lbe \$25,255\(\$26\) [ 0-9a-f]+: 6360 68ff lbe \$27,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 -[ 0-9a-f]+: 6381 68ff lbe \$28,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 63c1 68ff lbe \$30,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 63e1 6900 lbe \$31,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6041 6900 lbe \$2,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 +[ 0-9a-f]+: 303d feff addiu \$1,\$29,-257 +[ 0-9a-f]+: 6381 6800 lbe \$28,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 63c1 6800 lbe \$30,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 63e1 6800 lbe \$31,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6041 6800 lbe \$2,0\(\$1\) +[ 0-9a-f]+: 3024 fe00 addiu \$1,\$4,-512 [ 0-9a-f]+: 6061 6800 lbe \$3,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 60a1 6800 lbe \$5,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 -[ 0-9a-f]+: 60c1 69ff lbe \$6,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6101 69ff lbe \$8,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 +[ 0-9a-f]+: 3027 01ff addiu \$1,\$7,511 +[ 0-9a-f]+: 60c1 6800 lbe \$6,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6101 6800 lbe \$8,0\(\$1\) +[ 0-9a-f]+: 302a fc00 addiu \$1,\$10,-1024 [ 0-9a-f]+: 6121 6800 lbe \$9,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6161 6800 lbe \$11,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 -[ 0-9a-f]+: 6181 69ff lbe \$12,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 61c1 69ff lbe \$14,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0201 0950 addu \$1,\$1,\$16 +[ 0-9a-f]+: 302d 03ff addiu \$1,\$13,1023 +[ 0-9a-f]+: 6181 6800 lbe \$12,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 61c1 6800 lbe \$14,0\(\$1\) +[ 0-9a-f]+: 3030 f800 addiu \$1,\$16,-2048 [ 0-9a-f]+: 61e1 6800 lbe \$15,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6221 6800 lbe \$17,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 -[ 0-9a-f]+: 6241 69ff lbe \$18,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6281 69ff lbe \$20,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 02c1 0950 addu \$1,\$1,\$22 +[ 0-9a-f]+: 3033 07ff addiu \$1,\$19,2047 +[ 0-9a-f]+: 6241 6800 lbe \$18,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6281 6800 lbe \$20,0\(\$1\) +[ 0-9a-f]+: 3036 f000 addiu \$1,\$22,-4096 [ 0-9a-f]+: 62a1 6800 lbe \$21,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 62e1 6800 lbe \$23,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 -[ 0-9a-f]+: 6301 69ff lbe \$24,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6341 69ff lbe \$26,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0381 0950 addu \$1,\$1,\$28 +[ 0-9a-f]+: 3039 0fff addiu \$1,\$25,4095 +[ 0-9a-f]+: 6301 6800 lbe \$24,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6341 6800 lbe \$26,0\(\$1\) +[ 0-9a-f]+: 303c 8000 addiu \$1,\$28,-32768 [ 0-9a-f]+: 6361 6800 lbe \$27,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 63a1 6800 lbe \$29,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 -[ 0-9a-f]+: 63c1 69ff lbe \$30,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6001 69ff lbe \$0,-1\(\$1\) +[ 0-9a-f]+: 303f 7fff addiu \$1,\$31,32767 +[ 0-9a-f]+: 63c1 6800 lbe \$30,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6001 6800 lbe \$0,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 [ 0-9a-f]+: 6041 69ff lbe \$2,-1\(\$1\) @@ -281,66 +247,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6260 6b00 lhe \$19,-256\(\$0\) [ 0-9a-f]+: 6295 6aff lhe \$20,255\(\$21\) [ 0-9a-f]+: 62c0 6aff lhe \$22,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 -[ 0-9a-f]+: 62e1 6aff lhe \$23,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6321 6aff lhe \$25,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0361 0950 addu \$1,\$1,\$27 -[ 0-9a-f]+: 6341 6b00 lhe \$26,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6381 6b00 lhe \$28,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 +[ 0-9a-f]+: 3038 feff addiu \$1,\$24,-257 +[ 0-9a-f]+: 62e1 6a00 lhe \$23,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6321 6a00 lhe \$25,0\(\$1\) +[ 0-9a-f]+: 303b 0100 addiu \$1,\$27,256 +[ 0-9a-f]+: 6341 6a00 lhe \$26,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6381 6a00 lhe \$28,0\(\$1\) +[ 0-9a-f]+: 303e fe00 addiu \$1,\$30,-512 [ 0-9a-f]+: 63a1 6a00 lhe \$29,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 63e1 6a00 lhe \$31,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0041 0950 addu \$1,\$1,\$2 -[ 0-9a-f]+: 6001 6bff lhe \$0,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6061 6bff lhe \$3,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 +[ 0-9a-f]+: 3022 01ff addiu \$1,\$2,511 +[ 0-9a-f]+: 6001 6a00 lhe \$0,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6061 6a00 lhe \$3,0\(\$1\) +[ 0-9a-f]+: 3025 fc00 addiu \$1,\$5,-1024 [ 0-9a-f]+: 6081 6a00 lhe \$4,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 60c1 6a00 lhe \$6,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 -[ 0-9a-f]+: 60e1 6bff lhe \$7,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6121 6bff lhe \$9,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0161 0950 addu \$1,\$1,\$11 +[ 0-9a-f]+: 3028 03ff addiu \$1,\$8,1023 +[ 0-9a-f]+: 60e1 6a00 lhe \$7,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6121 6a00 lhe \$9,0\(\$1\) +[ 0-9a-f]+: 302b f800 addiu \$1,\$11,-2048 [ 0-9a-f]+: 6141 6a00 lhe \$10,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6181 6a00 lhe \$12,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 -[ 0-9a-f]+: 61a1 6bff lhe \$13,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 61e1 6bff lhe \$15,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0221 0950 addu \$1,\$1,\$17 +[ 0-9a-f]+: 302e 07ff addiu \$1,\$14,2047 +[ 0-9a-f]+: 61a1 6a00 lhe \$13,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 61e1 6a00 lhe \$15,0\(\$1\) +[ 0-9a-f]+: 3031 f000 addiu \$1,\$17,-4096 [ 0-9a-f]+: 6201 6a00 lhe \$16,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6241 6a00 lhe \$18,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 -[ 0-9a-f]+: 6261 6bff lhe \$19,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 62a1 6bff lhe \$21,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 02e1 0950 addu \$1,\$1,\$23 +[ 0-9a-f]+: 3034 0fff addiu \$1,\$20,4095 +[ 0-9a-f]+: 6261 6a00 lhe \$19,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 62a1 6a00 lhe \$21,0\(\$1\) +[ 0-9a-f]+: 3037 8000 addiu \$1,\$23,-32768 [ 0-9a-f]+: 62c1 6a00 lhe \$22,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6301 6a00 lhe \$24,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 -[ 0-9a-f]+: 6321 6bff lhe \$25,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6361 6bff lhe \$27,-1\(\$1\) +[ 0-9a-f]+: 303a 7fff addiu \$1,\$26,32767 +[ 0-9a-f]+: 6321 6a00 lhe \$25,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6361 6a00 lhe \$27,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 [ 0-9a-f]+: 6381 6bff lhe \$28,-1\(\$1\) @@ -370,66 +324,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 61c0 6d00 lle \$14,-256\(\$0\) [ 0-9a-f]+: 61f0 6cff lle \$15,255\(\$16\) [ 0-9a-f]+: 6220 6cff lle \$17,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 -[ 0-9a-f]+: 6241 6cff lle \$18,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6281 6cff lle \$20,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 02c1 0950 addu \$1,\$1,\$22 -[ 0-9a-f]+: 62a1 6d00 lle \$21,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 62e1 6d00 lle \$23,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 +[ 0-9a-f]+: 3033 feff addiu \$1,\$19,-257 +[ 0-9a-f]+: 6241 6c00 lle \$18,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6281 6c00 lle \$20,0\(\$1\) +[ 0-9a-f]+: 3036 0100 addiu \$1,\$22,256 +[ 0-9a-f]+: 62a1 6c00 lle \$21,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 62e1 6c00 lle \$23,0\(\$1\) +[ 0-9a-f]+: 3039 fe00 addiu \$1,\$25,-512 [ 0-9a-f]+: 6301 6c00 lle \$24,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6341 6c00 lle \$26,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0381 0950 addu \$1,\$1,\$28 -[ 0-9a-f]+: 6361 6dff lle \$27,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 63a1 6dff lle \$29,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 +[ 0-9a-f]+: 303c 01ff addiu \$1,\$28,511 +[ 0-9a-f]+: 6361 6c00 lle \$27,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 63a1 6c00 lle \$29,0\(\$1\) +[ 0-9a-f]+: 303f fc00 addiu \$1,\$31,-1024 [ 0-9a-f]+: 63c1 6c00 lle \$30,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6001 6c00 lle \$0,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 -[ 0-9a-f]+: 6041 6dff lle \$2,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6081 6dff lle \$4,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 00c1 0950 addu \$1,\$1,\$6 +[ 0-9a-f]+: 3023 03ff addiu \$1,\$3,1023 +[ 0-9a-f]+: 6041 6c00 lle \$2,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6081 6c00 lle \$4,0\(\$1\) +[ 0-9a-f]+: 3026 f800 addiu \$1,\$6,-2048 [ 0-9a-f]+: 60a1 6c00 lle \$5,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 60e1 6c00 lle \$7,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 -[ 0-9a-f]+: 6101 6dff lle \$8,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6141 6dff lle \$10,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0181 0950 addu \$1,\$1,\$12 +[ 0-9a-f]+: 3029 07ff addiu \$1,\$9,2047 +[ 0-9a-f]+: 6101 6c00 lle \$8,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6141 6c00 lle \$10,0\(\$1\) +[ 0-9a-f]+: 302c f000 addiu \$1,\$12,-4096 [ 0-9a-f]+: 6161 6c00 lle \$11,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 61a1 6c00 lle \$13,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 -[ 0-9a-f]+: 61c1 6dff lle \$14,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6201 6dff lle \$16,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0241 0950 addu \$1,\$1,\$18 +[ 0-9a-f]+: 302f 0fff addiu \$1,\$15,4095 +[ 0-9a-f]+: 61c1 6c00 lle \$14,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6201 6c00 lle \$16,0\(\$1\) +[ 0-9a-f]+: 3032 8000 addiu \$1,\$18,-32768 [ 0-9a-f]+: 6221 6c00 lle \$17,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6261 6c00 lle \$19,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 02a1 0950 addu \$1,\$1,\$21 -[ 0-9a-f]+: 6281 6dff lle \$20,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 62c1 6dff lle \$22,-1\(\$1\) +[ 0-9a-f]+: 3035 7fff addiu \$1,\$21,32767 +[ 0-9a-f]+: 6281 6c00 lle \$20,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 62c1 6c00 lle \$22,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 [ 0-9a-f]+: 62e1 6dff lle \$23,-1\(\$1\) @@ -460,65 +402,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6120 6f00 lwe \$9,-256\(\$0\) [ 0-9a-f]+: 614b 6eff lwe \$10,255\(\$11\) [ 0-9a-f]+: 6180 6eff lwe \$12,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 -[ 0-9a-f]+: 61a1 6eff lwe \$13,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 61e1 6eff lwe \$15,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0221 0950 addu \$1,\$1,\$17 -[ 0-9a-f]+: 6201 6f00 lwe \$16,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6241 6f00 lwe \$18,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 +[ 0-9a-f]+: 302e feff addiu \$1,\$14,-257 +[ 0-9a-f]+: 61a1 6e00 lwe \$13,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 61e1 6e00 lwe \$15,0\(\$1\) +[ 0-9a-f]+: 3031 0100 addiu \$1,\$17,256 +[ 0-9a-f]+: 6201 6e00 lwe \$16,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6241 6e00 lwe \$18,0\(\$1\) +[ 0-9a-f]+: 3034 fe00 addiu \$1,\$20,-512 [ 0-9a-f]+: 6261 6e00 lwe \$19,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 62a1 6e00 lwe \$21,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 02e1 0950 addu \$1,\$1,\$23 -[ 0-9a-f]+: 62c1 6fff lwe \$22,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6301 6fff lwe \$24,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 +[ 0-9a-f]+: 3037 01ff addiu \$1,\$23,511 +[ 0-9a-f]+: 62c1 6e00 lwe \$22,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6301 6e00 lwe \$24,0\(\$1\) +[ 0-9a-f]+: 303a fc00 addiu \$1,\$26,-1024 [ 0-9a-f]+: 6321 6e00 lwe \$25,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6361 6e00 lwe \$27,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 -[ 0-9a-f]+: 6381 6fff lwe \$28,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 63c1 6fff lwe \$30,-1\(\$1\) +[ 0-9a-f]+: 303d 03ff addiu \$1,\$29,1023 +[ 0-9a-f]+: 6381 6e00 lwe \$28,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 63c1 6e00 lwe \$30,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 63e1 6e00 lwe \$31,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6041 6e00 lwe \$2,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 -[ 0-9a-f]+: 6061 6fff lwe \$3,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 60a1 6fff lwe \$5,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 +[ 0-9a-f]+: 3024 07ff addiu \$1,\$4,2047 +[ 0-9a-f]+: 6061 6e00 lwe \$3,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 60a1 6e00 lwe \$5,0\(\$1\) +[ 0-9a-f]+: 3027 f000 addiu \$1,\$7,-4096 [ 0-9a-f]+: 60c1 6e00 lwe \$6,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6101 6e00 lwe \$8,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 -[ 0-9a-f]+: 6121 6fff lwe \$9,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6161 6fff lwe \$11,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 +[ 0-9a-f]+: 302a 0fff addiu \$1,\$10,4095 +[ 0-9a-f]+: 6121 6e00 lwe \$9,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6161 6e00 lwe \$11,0\(\$1\) +[ 0-9a-f]+: 302d 8000 addiu \$1,\$13,-32768 [ 0-9a-f]+: 6181 6e00 lwe \$12,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 61c1 6e00 lwe \$14,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0201 0950 addu \$1,\$1,\$16 -[ 0-9a-f]+: 61e1 6fff lwe \$15,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6221 6fff lwe \$17,-1\(\$1\) +[ 0-9a-f]+: 3030 7fff addiu \$1,\$16,32767 +[ 0-9a-f]+: 61e1 6e00 lwe \$15,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6221 6e00 lwe \$17,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 [ 0-9a-f]+: 6241 6fff lwe \$18,-1\(\$1\) @@ -549,66 +480,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6080 6500 lwle \$4,-256\(\$0\) [ 0-9a-f]+: 60a6 64ff lwle \$5,255\(\$6\) [ 0-9a-f]+: 60e0 64ff lwle \$7,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 -[ 0-9a-f]+: 6101 64ff lwle \$8,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6141 64ff lwle \$10,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0181 0950 addu \$1,\$1,\$12 -[ 0-9a-f]+: 6161 6500 lwle \$11,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 61a1 6500 lwle \$13,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 +[ 0-9a-f]+: 3029 feff addiu \$1,\$9,-257 +[ 0-9a-f]+: 6101 6400 lwle \$8,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6141 6400 lwle \$10,0\(\$1\) +[ 0-9a-f]+: 302c 0100 addiu \$1,\$12,256 +[ 0-9a-f]+: 6161 6400 lwle \$11,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 61a1 6400 lwle \$13,0\(\$1\) +[ 0-9a-f]+: 302f fe00 addiu \$1,\$15,-512 [ 0-9a-f]+: 61c1 6400 lwle \$14,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6201 6400 lwle \$16,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0241 0950 addu \$1,\$1,\$18 -[ 0-9a-f]+: 6221 65ff lwle \$17,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6261 65ff lwle \$19,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 02a1 0950 addu \$1,\$1,\$21 +[ 0-9a-f]+: 3032 01ff addiu \$1,\$18,511 +[ 0-9a-f]+: 6221 6400 lwle \$17,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6261 6400 lwle \$19,0\(\$1\) +[ 0-9a-f]+: 3035 fc00 addiu \$1,\$21,-1024 [ 0-9a-f]+: 6281 6400 lwle \$20,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 62c1 6400 lwle \$22,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 -[ 0-9a-f]+: 62e1 65ff lwle \$23,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6321 65ff lwle \$25,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0361 0950 addu \$1,\$1,\$27 +[ 0-9a-f]+: 3038 03ff addiu \$1,\$24,1023 +[ 0-9a-f]+: 62e1 6400 lwle \$23,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6321 6400 lwle \$25,0\(\$1\) +[ 0-9a-f]+: 303b f800 addiu \$1,\$27,-2048 [ 0-9a-f]+: 6341 6400 lwle \$26,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6381 6400 lwle \$28,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 -[ 0-9a-f]+: 63a1 65ff lwle \$29,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 63e1 65ff lwle \$31,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0041 0950 addu \$1,\$1,\$2 +[ 0-9a-f]+: 303e 07ff addiu \$1,\$30,2047 +[ 0-9a-f]+: 63a1 6400 lwle \$29,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 63e1 6400 lwle \$31,0\(\$1\) +[ 0-9a-f]+: 3022 f000 addiu \$1,\$2,-4096 [ 0-9a-f]+: 6001 6400 lwle \$0,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6061 6400 lwle \$3,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 -[ 0-9a-f]+: 6081 65ff lwle \$4,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 60c1 65ff lwle \$6,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 +[ 0-9a-f]+: 3025 0fff addiu \$1,\$5,4095 +[ 0-9a-f]+: 6081 6400 lwle \$4,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 60c1 6400 lwle \$6,0\(\$1\) +[ 0-9a-f]+: 3028 8000 addiu \$1,\$8,-32768 [ 0-9a-f]+: 60e1 6400 lwle \$7,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6121 6400 lwle \$9,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0161 0950 addu \$1,\$1,\$11 -[ 0-9a-f]+: 6141 65ff lwle \$10,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6181 65ff lwle \$12,-1\(\$1\) +[ 0-9a-f]+: 302b 7fff addiu \$1,\$11,32767 +[ 0-9a-f]+: 6141 6400 lwle \$10,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6181 6400 lwle \$12,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 [ 0-9a-f]+: 61a1 65ff lwle \$13,-1\(\$1\) @@ -639,66 +558,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 63c0 6700 lwre \$30,-256\(\$0\) [ 0-9a-f]+: 63e0 66ff lwre \$31,255\(\$0\) [ 0-9a-f]+: 6040 66ff lwre \$2,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 -[ 0-9a-f]+: 6061 66ff lwre \$3,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 60a1 66ff lwre \$5,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 -[ 0-9a-f]+: 60c1 6700 lwre \$6,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6101 6700 lwre \$8,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 +[ 0-9a-f]+: 3024 feff addiu \$1,\$4,-257 +[ 0-9a-f]+: 6061 6600 lwre \$3,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 60a1 6600 lwre \$5,0\(\$1\) +[ 0-9a-f]+: 3027 0100 addiu \$1,\$7,256 +[ 0-9a-f]+: 60c1 6600 lwre \$6,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6101 6600 lwre \$8,0\(\$1\) +[ 0-9a-f]+: 302a fe00 addiu \$1,\$10,-512 [ 0-9a-f]+: 6121 6600 lwre \$9,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6161 6600 lwre \$11,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 -[ 0-9a-f]+: 6181 67ff lwre \$12,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 61c1 67ff lwre \$14,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0201 0950 addu \$1,\$1,\$16 +[ 0-9a-f]+: 302d 01ff addiu \$1,\$13,511 +[ 0-9a-f]+: 6181 6600 lwre \$12,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 61c1 6600 lwre \$14,0\(\$1\) +[ 0-9a-f]+: 3030 fc00 addiu \$1,\$16,-1024 [ 0-9a-f]+: 61e1 6600 lwre \$15,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6221 6600 lwre \$17,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 -[ 0-9a-f]+: 6241 67ff lwre \$18,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6281 67ff lwre \$20,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 02c1 0950 addu \$1,\$1,\$22 +[ 0-9a-f]+: 3033 03ff addiu \$1,\$19,1023 +[ 0-9a-f]+: 6241 6600 lwre \$18,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6281 6600 lwre \$20,0\(\$1\) +[ 0-9a-f]+: 3036 f800 addiu \$1,\$22,-2048 [ 0-9a-f]+: 62a1 6600 lwre \$21,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 62e1 6600 lwre \$23,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 -[ 0-9a-f]+: 6301 67ff lwre \$24,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6341 67ff lwre \$26,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0381 0950 addu \$1,\$1,\$28 +[ 0-9a-f]+: 3039 07ff addiu \$1,\$25,2047 +[ 0-9a-f]+: 6301 6600 lwre \$24,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6341 6600 lwre \$26,0\(\$1\) +[ 0-9a-f]+: 303c f000 addiu \$1,\$28,-4096 [ 0-9a-f]+: 6361 6600 lwre \$27,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 63a1 6600 lwre \$29,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 -[ 0-9a-f]+: 63c1 67ff lwre \$30,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6001 67ff lwre \$0,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 +[ 0-9a-f]+: 303f 0fff addiu \$1,\$31,4095 +[ 0-9a-f]+: 63c1 6600 lwre \$30,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6001 6600 lwre \$0,0\(\$1\) +[ 0-9a-f]+: 3023 8000 addiu \$1,\$3,-32768 [ 0-9a-f]+: 6041 6600 lwre \$2,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6081 6600 lwre \$4,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 00c1 0950 addu \$1,\$1,\$6 -[ 0-9a-f]+: 60a1 67ff lwre \$5,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 60e1 67ff lwre \$7,-1\(\$1\) +[ 0-9a-f]+: 3026 7fff addiu \$1,\$6,32767 +[ 0-9a-f]+: 60a1 6600 lwre \$5,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 60e1 6600 lwre \$7,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 [ 0-9a-f]+: 6101 67ff lwre \$8,-1\(\$1\) @@ -729,65 +636,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6320 a900 sbe \$25,-256\(\$0\) [ 0-9a-f]+: 635b a8ff sbe \$26,255\(\$27\) [ 0-9a-f]+: 6380 a8ff sbe \$28,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 -[ 0-9a-f]+: 63a1 a8ff sbe \$29,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 63e1 a8ff sbe \$31,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0041 0950 addu \$1,\$1,\$2 -[ 0-9a-f]+: 6001 a900 sbe \$0,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6061 a900 sbe \$3,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 +[ 0-9a-f]+: 303e feff addiu \$1,\$30,-257 +[ 0-9a-f]+: 63a1 a800 sbe \$29,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 63e1 a800 sbe \$31,0\(\$1\) +[ 0-9a-f]+: 3022 0100 addiu \$1,\$2,256 +[ 0-9a-f]+: 6001 a800 sbe \$0,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6061 a800 sbe \$3,0\(\$1\) +[ 0-9a-f]+: 3025 fe00 addiu \$1,\$5,-512 [ 0-9a-f]+: 6081 a800 sbe \$4,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 60c1 a800 sbe \$6,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 -[ 0-9a-f]+: 60e1 a9ff sbe \$7,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6121 a9ff sbe \$9,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0161 0950 addu \$1,\$1,\$11 +[ 0-9a-f]+: 3028 01ff addiu \$1,\$8,511 +[ 0-9a-f]+: 60e1 a800 sbe \$7,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6121 a800 sbe \$9,0\(\$1\) +[ 0-9a-f]+: 302b fc00 addiu \$1,\$11,-1024 [ 0-9a-f]+: 6141 a800 sbe \$10,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6181 a800 sbe \$12,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 -[ 0-9a-f]+: 61a1 a9ff sbe \$13,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 61e1 a9ff sbe \$15,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0221 0950 addu \$1,\$1,\$17 +[ 0-9a-f]+: 302e 03ff addiu \$1,\$14,1023 +[ 0-9a-f]+: 61a1 a800 sbe \$13,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 61e1 a800 sbe \$15,0\(\$1\) +[ 0-9a-f]+: 3031 f800 addiu \$1,\$17,-2048 [ 0-9a-f]+: 6201 a800 sbe \$16,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6241 a800 sbe \$18,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 -[ 0-9a-f]+: 6261 a9ff sbe \$19,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 62a1 a9ff sbe \$21,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 02e1 0950 addu \$1,\$1,\$23 +[ 0-9a-f]+: 3034 07ff addiu \$1,\$20,2047 +[ 0-9a-f]+: 6261 a800 sbe \$19,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 62a1 a800 sbe \$21,0\(\$1\) +[ 0-9a-f]+: 3037 f000 addiu \$1,\$23,-4096 [ 0-9a-f]+: 62c1 a800 sbe \$22,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6301 a800 sbe \$24,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 -[ 0-9a-f]+: 6321 a9ff sbe \$25,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6361 a9ff sbe \$27,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 +[ 0-9a-f]+: 303a 0fff addiu \$1,\$26,4095 +[ 0-9a-f]+: 6321 a800 sbe \$25,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6361 a800 sbe \$27,0\(\$1\) +[ 0-9a-f]+: 303d 8000 addiu \$1,\$29,-32768 [ 0-9a-f]+: 6381 a800 sbe \$28,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 63c1 a800 sbe \$30,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 63e1 a9ff sbe \$31,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6041 a9ff sbe \$2,-1\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 63e1 a800 sbe \$31,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6041 a800 sbe \$2,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 [ 0-9a-f]+: 6061 a9ff sbe \$3,-1\(\$1\) @@ -818,66 +714,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6280 ad00 sce \$20,-256\(\$0\) [ 0-9a-f]+: 62b6 acff sce \$21,255\(\$22\) [ 0-9a-f]+: 62e0 acff sce \$23,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 -[ 0-9a-f]+: 6301 acff sce \$24,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6341 acff sce \$26,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0381 0950 addu \$1,\$1,\$28 -[ 0-9a-f]+: 6361 ad00 sce \$27,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 63a1 ad00 sce \$29,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 +[ 0-9a-f]+: 3039 feff addiu \$1,\$25,-257 +[ 0-9a-f]+: 6301 ac00 sce \$24,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6341 ac00 sce \$26,0\(\$1\) +[ 0-9a-f]+: 303c 0100 addiu \$1,\$28,256 +[ 0-9a-f]+: 6361 ac00 sce \$27,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 63a1 ac00 sce \$29,0\(\$1\) +[ 0-9a-f]+: 303f fe00 addiu \$1,\$31,-512 [ 0-9a-f]+: 63c1 ac00 sce \$30,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6001 ac00 sce \$0,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 -[ 0-9a-f]+: 6041 adff sce \$2,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6081 adff sce \$4,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 00c1 0950 addu \$1,\$1,\$6 +[ 0-9a-f]+: 3023 01ff addiu \$1,\$3,511 +[ 0-9a-f]+: 6041 ac00 sce \$2,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6081 ac00 sce \$4,0\(\$1\) +[ 0-9a-f]+: 3026 fc00 addiu \$1,\$6,-1024 [ 0-9a-f]+: 60a1 ac00 sce \$5,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 60e1 ac00 sce \$7,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 -[ 0-9a-f]+: 6101 adff sce \$8,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6141 adff sce \$10,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0181 0950 addu \$1,\$1,\$12 +[ 0-9a-f]+: 3029 03ff addiu \$1,\$9,1023 +[ 0-9a-f]+: 6101 ac00 sce \$8,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6141 ac00 sce \$10,0\(\$1\) +[ 0-9a-f]+: 302c f800 addiu \$1,\$12,-2048 [ 0-9a-f]+: 6161 ac00 sce \$11,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 61a1 ac00 sce \$13,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 -[ 0-9a-f]+: 61c1 adff sce \$14,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6201 adff sce \$16,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0241 0950 addu \$1,\$1,\$18 +[ 0-9a-f]+: 302f 07ff addiu \$1,\$15,2047 +[ 0-9a-f]+: 61c1 ac00 sce \$14,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6201 ac00 sce \$16,0\(\$1\) +[ 0-9a-f]+: 3032 f000 addiu \$1,\$18,-4096 [ 0-9a-f]+: 6221 ac00 sce \$17,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6261 ac00 sce \$19,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 02a1 0950 addu \$1,\$1,\$21 -[ 0-9a-f]+: 6281 adff sce \$20,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 62c1 adff sce \$22,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 +[ 0-9a-f]+: 3035 0fff addiu \$1,\$21,4095 +[ 0-9a-f]+: 6281 ac00 sce \$20,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 62c1 ac00 sce \$22,0\(\$1\) +[ 0-9a-f]+: 3038 8000 addiu \$1,\$24,-32768 [ 0-9a-f]+: 62e1 ac00 sce \$23,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6321 ac00 sce \$25,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0361 0950 addu \$1,\$1,\$27 -[ 0-9a-f]+: 6341 adff sce \$26,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6381 adff sce \$28,-1\(\$1\) +[ 0-9a-f]+: 303b 7fff addiu \$1,\$27,32767 +[ 0-9a-f]+: 6341 ac00 sce \$26,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6381 ac00 sce \$28,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 [ 0-9a-f]+: 63a1 adff sce \$29,-1\(\$1\) @@ -908,65 +792,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 61e0 ab00 she \$15,-256\(\$0\) [ 0-9a-f]+: 6211 aaff she \$16,255\(\$17\) [ 0-9a-f]+: 6240 aaff she \$18,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 -[ 0-9a-f]+: 6261 aaff she \$19,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 62a1 aaff she \$21,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 02e1 0950 addu \$1,\$1,\$23 -[ 0-9a-f]+: 62c1 ab00 she \$22,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6301 ab00 she \$24,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 +[ 0-9a-f]+: 3034 feff addiu \$1,\$20,-257 +[ 0-9a-f]+: 6261 aa00 she \$19,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 62a1 aa00 she \$21,0\(\$1\) +[ 0-9a-f]+: 3037 0100 addiu \$1,\$23,256 +[ 0-9a-f]+: 62c1 aa00 she \$22,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6301 aa00 she \$24,0\(\$1\) +[ 0-9a-f]+: 303a fe00 addiu \$1,\$26,-512 [ 0-9a-f]+: 6321 aa00 she \$25,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6361 aa00 she \$27,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 -[ 0-9a-f]+: 6381 abff she \$28,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 63c1 abff she \$30,-1\(\$1\) +[ 0-9a-f]+: 303d 01ff addiu \$1,\$29,511 +[ 0-9a-f]+: 6381 aa00 she \$28,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 63c1 aa00 she \$30,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 63e1 aa00 she \$31,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6041 aa00 she \$2,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 -[ 0-9a-f]+: 6061 abff she \$3,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 60a1 abff she \$5,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 +[ 0-9a-f]+: 3024 03ff addiu \$1,\$4,1023 +[ 0-9a-f]+: 6061 aa00 she \$3,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 60a1 aa00 she \$5,0\(\$1\) +[ 0-9a-f]+: 3027 f800 addiu \$1,\$7,-2048 [ 0-9a-f]+: 60c1 aa00 she \$6,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6101 aa00 she \$8,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 -[ 0-9a-f]+: 6121 abff she \$9,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6161 abff she \$11,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 +[ 0-9a-f]+: 302a 07ff addiu \$1,\$10,2047 +[ 0-9a-f]+: 6121 aa00 she \$9,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6161 aa00 she \$11,0\(\$1\) +[ 0-9a-f]+: 302d f000 addiu \$1,\$13,-4096 [ 0-9a-f]+: 6181 aa00 she \$12,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 61c1 aa00 she \$14,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0201 0950 addu \$1,\$1,\$16 -[ 0-9a-f]+: 61e1 abff she \$15,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6221 abff she \$17,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 +[ 0-9a-f]+: 3030 0fff addiu \$1,\$16,4095 +[ 0-9a-f]+: 61e1 aa00 she \$15,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6221 aa00 she \$17,0\(\$1\) +[ 0-9a-f]+: 3033 8000 addiu \$1,\$19,-32768 [ 0-9a-f]+: 6241 aa00 she \$18,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6281 aa00 she \$20,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 02c1 0950 addu \$1,\$1,\$22 -[ 0-9a-f]+: 62a1 abff she \$21,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 62e1 abff she \$23,-1\(\$1\) +[ 0-9a-f]+: 3036 7fff addiu \$1,\$22,32767 +[ 0-9a-f]+: 62a1 aa00 she \$21,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 62e1 aa00 she \$23,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 [ 0-9a-f]+: 6301 abff she \$24,-1\(\$1\) @@ -997,66 +870,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6140 af00 swe \$10,-256\(\$0\) [ 0-9a-f]+: 616c aeff swe \$11,255\(\$12\) [ 0-9a-f]+: 61a0 aeff swe \$13,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 -[ 0-9a-f]+: 61c1 aeff swe \$14,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6201 aeff swe \$16,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0241 0950 addu \$1,\$1,\$18 -[ 0-9a-f]+: 6221 af00 swe \$17,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6261 af00 swe \$19,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 02a1 0950 addu \$1,\$1,\$21 +[ 0-9a-f]+: 302f feff addiu \$1,\$15,-257 +[ 0-9a-f]+: 61c1 ae00 swe \$14,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6201 ae00 swe \$16,0\(\$1\) +[ 0-9a-f]+: 3032 0100 addiu \$1,\$18,256 +[ 0-9a-f]+: 6221 ae00 swe \$17,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6261 ae00 swe \$19,0\(\$1\) +[ 0-9a-f]+: 3035 fe00 addiu \$1,\$21,-512 [ 0-9a-f]+: 6281 ae00 swe \$20,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 62c1 ae00 swe \$22,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 -[ 0-9a-f]+: 62e1 afff swe \$23,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6321 afff swe \$25,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0361 0950 addu \$1,\$1,\$27 +[ 0-9a-f]+: 3038 01ff addiu \$1,\$24,511 +[ 0-9a-f]+: 62e1 ae00 swe \$23,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6321 ae00 swe \$25,0\(\$1\) +[ 0-9a-f]+: 303b fc00 addiu \$1,\$27,-1024 [ 0-9a-f]+: 6341 ae00 swe \$26,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6381 ae00 swe \$28,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 -[ 0-9a-f]+: 63a1 afff swe \$29,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 63e1 afff swe \$31,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0041 0950 addu \$1,\$1,\$2 +[ 0-9a-f]+: 303e 03ff addiu \$1,\$30,1023 +[ 0-9a-f]+: 63a1 ae00 swe \$29,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 63e1 ae00 swe \$31,0\(\$1\) +[ 0-9a-f]+: 3022 f800 addiu \$1,\$2,-2048 [ 0-9a-f]+: 6001 ae00 swe \$0,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6061 ae00 swe \$3,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 -[ 0-9a-f]+: 6081 afff swe \$4,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 60c1 afff swe \$6,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 +[ 0-9a-f]+: 3025 07ff addiu \$1,\$5,2047 +[ 0-9a-f]+: 6081 ae00 swe \$4,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 60c1 ae00 swe \$6,0\(\$1\) +[ 0-9a-f]+: 3028 f000 addiu \$1,\$8,-4096 [ 0-9a-f]+: 60e1 ae00 swe \$7,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6121 ae00 swe \$9,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0161 0950 addu \$1,\$1,\$11 -[ 0-9a-f]+: 6141 afff swe \$10,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6181 afff swe \$12,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 +[ 0-9a-f]+: 302b 0fff addiu \$1,\$11,4095 +[ 0-9a-f]+: 6141 ae00 swe \$10,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6181 ae00 swe \$12,0\(\$1\) +[ 0-9a-f]+: 302e 8000 addiu \$1,\$14,-32768 [ 0-9a-f]+: 61a1 ae00 swe \$13,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 61e1 ae00 swe \$15,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0221 0950 addu \$1,\$1,\$17 -[ 0-9a-f]+: 6201 afff swe \$16,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6241 afff swe \$18,-1\(\$1\) +[ 0-9a-f]+: 3031 7fff addiu \$1,\$17,32767 +[ 0-9a-f]+: 6201 ae00 swe \$16,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6241 ae00 swe \$18,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 [ 0-9a-f]+: 6261 afff swe \$19,-1\(\$1\) @@ -1087,66 +948,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 60a0 a100 swle \$5,-256\(\$0\) [ 0-9a-f]+: 60c7 a0ff swle \$6,255\(\$7\) [ 0-9a-f]+: 6100 a0ff swle \$8,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 -[ 0-9a-f]+: 6121 a0ff swle \$9,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6161 a0ff swle \$11,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 -[ 0-9a-f]+: 6181 a100 swle \$12,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 61c1 a100 swle \$14,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0201 0950 addu \$1,\$1,\$16 +[ 0-9a-f]+: 302a feff addiu \$1,\$10,-257 +[ 0-9a-f]+: 6121 a000 swle \$9,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6161 a000 swle \$11,0\(\$1\) +[ 0-9a-f]+: 302d 0100 addiu \$1,\$13,256 +[ 0-9a-f]+: 6181 a000 swle \$12,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 61c1 a000 swle \$14,0\(\$1\) +[ 0-9a-f]+: 3030 fe00 addiu \$1,\$16,-512 [ 0-9a-f]+: 61e1 a000 swle \$15,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6221 a000 swle \$17,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 -[ 0-9a-f]+: 6241 a1ff swle \$18,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6281 a1ff swle \$20,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 02c1 0950 addu \$1,\$1,\$22 +[ 0-9a-f]+: 3033 01ff addiu \$1,\$19,511 +[ 0-9a-f]+: 6241 a000 swle \$18,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6281 a000 swle \$20,0\(\$1\) +[ 0-9a-f]+: 3036 fc00 addiu \$1,\$22,-1024 [ 0-9a-f]+: 62a1 a000 swle \$21,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 62e1 a000 swle \$23,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 -[ 0-9a-f]+: 6301 a1ff swle \$24,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6341 a1ff swle \$26,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0381 0950 addu \$1,\$1,\$28 +[ 0-9a-f]+: 3039 03ff addiu \$1,\$25,1023 +[ 0-9a-f]+: 6301 a000 swle \$24,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6341 a000 swle \$26,0\(\$1\) +[ 0-9a-f]+: 303c f800 addiu \$1,\$28,-2048 [ 0-9a-f]+: 6361 a000 swle \$27,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 63a1 a000 swle \$29,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 -[ 0-9a-f]+: 63c1 a1ff swle \$30,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6001 a1ff swle \$0,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 +[ 0-9a-f]+: 303f 07ff addiu \$1,\$31,2047 +[ 0-9a-f]+: 63c1 a000 swle \$30,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6001 a000 swle \$0,0\(\$1\) +[ 0-9a-f]+: 3023 f000 addiu \$1,\$3,-4096 [ 0-9a-f]+: 6041 a000 swle \$2,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6081 a000 swle \$4,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 00c1 0950 addu \$1,\$1,\$6 -[ 0-9a-f]+: 60a1 a1ff swle \$5,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 60e1 a1ff swle \$7,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 +[ 0-9a-f]+: 3026 0fff addiu \$1,\$6,4095 +[ 0-9a-f]+: 60a1 a000 swle \$5,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 60e1 a000 swle \$7,0\(\$1\) +[ 0-9a-f]+: 3029 8000 addiu \$1,\$9,-32768 [ 0-9a-f]+: 6101 a000 swle \$8,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6141 a000 swle \$10,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0181 0950 addu \$1,\$1,\$12 -[ 0-9a-f]+: 6161 a1ff swle \$11,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 61a1 a1ff swle \$13,-1\(\$1\) +[ 0-9a-f]+: 302c 7fff addiu \$1,\$12,32767 +[ 0-9a-f]+: 6161 a000 swle \$11,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 61a1 a000 swle \$13,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 [ 0-9a-f]+: 61c1 a1ff swle \$14,-1\(\$1\) @@ -1177,65 +1026,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 63e0 a300 swre \$31,-256\(\$0\) [ 0-9a-f]+: 6002 a2ff swre \$0,255\(\$2\) [ 0-9a-f]+: 6060 a2ff swre \$3,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 -[ 0-9a-f]+: 6081 a2ff swre \$4,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 60c1 a2ff swre \$6,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0101 0950 addu \$1,\$1,\$8 -[ 0-9a-f]+: 60e1 a300 swre \$7,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6121 a300 swre \$9,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0161 0950 addu \$1,\$1,\$11 +[ 0-9a-f]+: 3025 feff addiu \$1,\$5,-257 +[ 0-9a-f]+: 6081 a200 swre \$4,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 60c1 a200 swre \$6,0\(\$1\) +[ 0-9a-f]+: 3028 0100 addiu \$1,\$8,256 +[ 0-9a-f]+: 60e1 a200 swre \$7,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6121 a200 swre \$9,0\(\$1\) +[ 0-9a-f]+: 302b fe00 addiu \$1,\$11,-512 [ 0-9a-f]+: 6141 a200 swre \$10,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6181 a200 swre \$12,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 01c1 0950 addu \$1,\$1,\$14 -[ 0-9a-f]+: 61a1 a3ff swre \$13,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 61e1 a3ff swre \$15,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0221 0950 addu \$1,\$1,\$17 +[ 0-9a-f]+: 302e 01ff addiu \$1,\$14,511 +[ 0-9a-f]+: 61a1 a200 swre \$13,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 61e1 a200 swre \$15,0\(\$1\) +[ 0-9a-f]+: 3031 fc00 addiu \$1,\$17,-1024 [ 0-9a-f]+: 6201 a200 swre \$16,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6241 a200 swre \$18,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0281 0950 addu \$1,\$1,\$20 -[ 0-9a-f]+: 6261 a3ff swre \$19,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 62a1 a3ff swre \$21,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 02e1 0950 addu \$1,\$1,\$23 +[ 0-9a-f]+: 3034 03ff addiu \$1,\$20,1023 +[ 0-9a-f]+: 6261 a200 swre \$19,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 62a1 a200 swre \$21,0\(\$1\) +[ 0-9a-f]+: 3037 f800 addiu \$1,\$23,-2048 [ 0-9a-f]+: 62c1 a200 swre \$22,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6301 a200 swre \$24,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 -[ 0-9a-f]+: 6321 a3ff swre \$25,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6361 a3ff swre \$27,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 +[ 0-9a-f]+: 303a 07ff addiu \$1,\$26,2047 +[ 0-9a-f]+: 6321 a200 swre \$25,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6361 a200 swre \$27,0\(\$1\) +[ 0-9a-f]+: 303d f000 addiu \$1,\$29,-4096 [ 0-9a-f]+: 6381 a200 swre \$28,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 63c1 a200 swre \$30,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 63e1 a3ff swre \$31,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6041 a3ff swre \$2,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 63e1 a200 swre \$31,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6041 a200 swre \$2,0\(\$1\) +[ 0-9a-f]+: 3024 8000 addiu \$1,\$4,-32768 [ 0-9a-f]+: 6061 a200 swre \$3,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 60a1 a200 swre \$5,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 -[ 0-9a-f]+: 60c1 a3ff swre \$6,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6101 a3ff swre \$8,-1\(\$1\) +[ 0-9a-f]+: 3027 7fff addiu \$1,\$7,32767 +[ 0-9a-f]+: 60c1 a200 swre \$6,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6101 a200 swre \$8,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 [ 0-9a-f]+: 6121 a3ff swre \$9,-1\(\$1\) @@ -1266,66 +1104,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 6340 a700 cachee 0x1a,-256\(\$0\) [ 0-9a-f]+: 637c a6ff cachee 0x1b,255\(\$28\) [ 0-9a-f]+: 63a0 a6ff cachee 0x1d,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 -[ 0-9a-f]+: 63c1 a6ff cachee 0x1e,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6001 a6ff cachee 0x0,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0061 0950 addu \$1,\$1,\$3 -[ 0-9a-f]+: 6041 a700 cachee 0x2,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6081 a700 cachee 0x4,-256\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 00c1 0950 addu \$1,\$1,\$6 +[ 0-9a-f]+: 303f feff addiu \$1,\$31,-257 +[ 0-9a-f]+: 63c1 a600 cachee 0x1e,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6001 a600 cachee 0x0,0\(\$1\) +[ 0-9a-f]+: 3023 0100 addiu \$1,\$3,256 +[ 0-9a-f]+: 6041 a600 cachee 0x2,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 6081 a600 cachee 0x4,0\(\$1\) +[ 0-9a-f]+: 3026 fe00 addiu \$1,\$6,-512 [ 0-9a-f]+: 60a1 a600 cachee 0x5,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 60e1 a600 cachee 0x7,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0121 0950 addu \$1,\$1,\$9 -[ 0-9a-f]+: 6101 a7ff cachee 0x8,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 6141 a7ff cachee 0xa,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 0181 0950 addu \$1,\$1,\$12 +[ 0-9a-f]+: 3029 01ff addiu \$1,\$9,511 +[ 0-9a-f]+: 6101 a600 cachee 0x8,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 6141 a600 cachee 0xa,0\(\$1\) +[ 0-9a-f]+: 302c fc00 addiu \$1,\$12,-1024 [ 0-9a-f]+: 6161 a600 cachee 0xb,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 61a1 a600 cachee 0xd,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 01e1 0950 addu \$1,\$1,\$15 -[ 0-9a-f]+: 61c1 a7ff cachee 0xe,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6201 a7ff cachee 0x10,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 0241 0950 addu \$1,\$1,\$18 +[ 0-9a-f]+: 302f 03ff addiu \$1,\$15,1023 +[ 0-9a-f]+: 61c1 a600 cachee 0xe,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6201 a600 cachee 0x10,0\(\$1\) +[ 0-9a-f]+: 3032 f800 addiu \$1,\$18,-2048 [ 0-9a-f]+: 6221 a600 cachee 0x11,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 6261 a600 cachee 0x13,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 02a1 0950 addu \$1,\$1,\$21 -[ 0-9a-f]+: 6281 a7ff cachee 0x14,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 62c1 a7ff cachee 0x16,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0301 0950 addu \$1,\$1,\$24 +[ 0-9a-f]+: 3035 07ff addiu \$1,\$21,2047 +[ 0-9a-f]+: 6281 a600 cachee 0x14,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 62c1 a600 cachee 0x16,0\(\$1\) +[ 0-9a-f]+: 3038 f000 addiu \$1,\$24,-4096 [ 0-9a-f]+: 62e1 a600 cachee 0x17,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6321 a600 cachee 0x19,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 0361 0950 addu \$1,\$1,\$27 -[ 0-9a-f]+: 6341 a7ff cachee 0x1a,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 6381 a7ff cachee 0x1c,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 03c1 0950 addu \$1,\$1,\$30 +[ 0-9a-f]+: 303b 0fff addiu \$1,\$27,4095 +[ 0-9a-f]+: 6341 a600 cachee 0x1a,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 6381 a600 cachee 0x1c,0\(\$1\) +[ 0-9a-f]+: 303e 8000 addiu \$1,\$30,-32768 [ 0-9a-f]+: 63a1 a600 cachee 0x1d,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 63e1 a600 cachee 0x1f,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0041 0950 addu \$1,\$1,\$2 -[ 0-9a-f]+: 6001 a7ff cachee 0x0,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 6061 a7ff cachee 0x3,-1\(\$1\) +[ 0-9a-f]+: 3022 7fff addiu \$1,\$2,32767 +[ 0-9a-f]+: 6001 a600 cachee 0x0,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 6061 a600 cachee 0x3,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 00a1 0950 addu \$1,\$1,\$5 [ 0-9a-f]+: 6081 a7ff cachee 0x4,-1\(\$1\) @@ -1356,65 +1182,54 @@ Disassembly of section \.text: [ 0-9a-f]+: 62a0 a500 prefe 0x15,-256\(\$0\) [ 0-9a-f]+: 62d7 a4ff prefe 0x16,255\(\$23\) [ 0-9a-f]+: 6300 a4ff prefe 0x18,255\(\$0\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 0341 0950 addu \$1,\$1,\$26 -[ 0-9a-f]+: 6321 a4ff prefe 0x19,255\(\$1\) -[ 0-9a-f]+: 3020 fe00 li \$1,-512 -[ 0-9a-f]+: 6361 a4ff prefe 0x1b,255\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 03a1 0950 addu \$1,\$1,\$29 -[ 0-9a-f]+: 6381 a500 prefe 0x1c,-256\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 63c1 a500 prefe 0x1e,-256\(\$1\) +[ 0-9a-f]+: 303a feff addiu \$1,\$26,-257 +[ 0-9a-f]+: 6321 a400 prefe 0x19,0\(\$1\) +[ 0-9a-f]+: 3020 feff li \$1,-257 +[ 0-9a-f]+: 6361 a400 prefe 0x1b,0\(\$1\) +[ 0-9a-f]+: 303d 0100 addiu \$1,\$29,256 +[ 0-9a-f]+: 6381 a400 prefe 0x1c,0\(\$1\) +[ 0-9a-f]+: 3020 0100 li \$1,256 +[ 0-9a-f]+: 63c1 a400 prefe 0x1e,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 63e1 a400 prefe 0x1f,0\(\$1\) [ 0-9a-f]+: 3020 fe00 li \$1,-512 [ 0-9a-f]+: 6041 a400 prefe 0x2,0\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 0081 0950 addu \$1,\$1,\$4 -[ 0-9a-f]+: 6061 a5ff prefe 0x3,-1\(\$1\) -[ 0-9a-f]+: 3020 0200 li \$1,512 -[ 0-9a-f]+: 60a1 a5ff prefe 0x5,-1\(\$1\) -[ 0-9a-f]+: 3020 fc00 li \$1,-1024 -[ 0-9a-f]+: 00e1 0950 addu \$1,\$1,\$7 +[ 0-9a-f]+: 3024 01ff addiu \$1,\$4,511 +[ 0-9a-f]+: 6061 a400 prefe 0x3,0\(\$1\) +[ 0-9a-f]+: 3020 01ff li \$1,511 +[ 0-9a-f]+: 60a1 a400 prefe 0x5,0\(\$1\) +[ 0-9a-f]+: 3027 fc00 addiu \$1,\$7,-1024 [ 0-9a-f]+: 60c1 a400 prefe 0x6,0\(\$1\) [ 0-9a-f]+: 3020 fc00 li \$1,-1024 [ 0-9a-f]+: 6101 a400 prefe 0x8,0\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 0141 0950 addu \$1,\$1,\$10 -[ 0-9a-f]+: 6121 a5ff prefe 0x9,-1\(\$1\) -[ 0-9a-f]+: 3020 0400 li \$1,1024 -[ 0-9a-f]+: 6161 a5ff prefe 0xb,-1\(\$1\) -[ 0-9a-f]+: 3020 f800 li \$1,-2048 -[ 0-9a-f]+: 01a1 0950 addu \$1,\$1,\$13 +[ 0-9a-f]+: 302a 03ff addiu \$1,\$10,1023 +[ 0-9a-f]+: 6121 a400 prefe 0x9,0\(\$1\) +[ 0-9a-f]+: 3020 03ff li \$1,1023 +[ 0-9a-f]+: 6161 a400 prefe 0xb,0\(\$1\) +[ 0-9a-f]+: 302d f800 addiu \$1,\$13,-2048 [ 0-9a-f]+: 6181 a400 prefe 0xc,0\(\$1\) [ 0-9a-f]+: 3020 f800 li \$1,-2048 [ 0-9a-f]+: 61c1 a400 prefe 0xe,0\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 0201 0950 addu \$1,\$1,\$16 -[ 0-9a-f]+: 61e1 a5ff prefe 0xf,-1\(\$1\) -[ 0-9a-f]+: 3020 0800 li \$1,2048 -[ 0-9a-f]+: 6221 a5ff prefe 0x11,-1\(\$1\) -[ 0-9a-f]+: 3020 f000 li \$1,-4096 -[ 0-9a-f]+: 0261 0950 addu \$1,\$1,\$19 +[ 0-9a-f]+: 3030 07ff addiu \$1,\$16,2047 +[ 0-9a-f]+: 61e1 a400 prefe 0xf,0\(\$1\) +[ 0-9a-f]+: 3020 07ff li \$1,2047 +[ 0-9a-f]+: 6221 a400 prefe 0x11,0\(\$1\) +[ 0-9a-f]+: 3033 f000 addiu \$1,\$19,-4096 [ 0-9a-f]+: 6241 a400 prefe 0x12,0\(\$1\) [ 0-9a-f]+: 3020 f000 li \$1,-4096 [ 0-9a-f]+: 6281 a400 prefe 0x14,0\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 02c1 0950 addu \$1,\$1,\$22 -[ 0-9a-f]+: 62a1 a5ff prefe 0x15,-1\(\$1\) -[ 0-9a-f]+: 3020 1000 li \$1,4096 -[ 0-9a-f]+: 62e1 a5ff prefe 0x17,-1\(\$1\) -[ 0-9a-f]+: 3020 8000 li \$1,-32768 -[ 0-9a-f]+: 0321 0950 addu \$1,\$1,\$25 +[ 0-9a-f]+: 3036 0fff addiu \$1,\$22,4095 +[ 0-9a-f]+: 62a1 a400 prefe 0x15,0\(\$1\) +[ 0-9a-f]+: 3020 0fff li \$1,4095 +[ 0-9a-f]+: 62e1 a400 prefe 0x17,0\(\$1\) +[ 0-9a-f]+: 3039 8000 addiu \$1,\$25,-32768 [ 0-9a-f]+: 6301 a400 prefe 0x18,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 6341 a400 prefe 0x1a,0\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 0381 0950 addu \$1,\$1,\$28 -[ 0-9a-f]+: 6361 a5ff prefe 0x1b,-1\(\$1\) -[ 0-9a-f]+: 5020 8000 li \$1,0x8000 -[ 0-9a-f]+: 63a1 a5ff prefe 0x1d,-1\(\$1\) +[ 0-9a-f]+: 303c 7fff addiu \$1,\$28,32767 +[ 0-9a-f]+: 6361 a400 prefe 0x1b,0\(\$1\) +[ 0-9a-f]+: 3020 7fff li \$1,32767 +[ 0-9a-f]+: 63a1 a400 prefe 0x1d,0\(\$1\) [ 0-9a-f]+: 3020 8000 li \$1,-32768 [ 0-9a-f]+: 03e1 0950 addu \$1,\$1,\$31 [ 0-9a-f]+: 63c1 a5ff prefe 0x1e,-1\(\$1\) @@ -1441,4 +1256,7 @@ Disassembly of section \.text: [ 0-9a-f]+: 3021 0000 addiu \$1,\$1,0 [ 0-9a-f]+: R_MICROMIPS_LO16 MYDATA [ 0-9a-f]+: 61a1 a400 prefe 0xd,0\(\$1\) +[ 0-9a-f]+: 3026 0000 addiu \$1,\$6,0 + [ 0-9a-f]+: R_MICROMIPS_LO16 foo +[ 0-9a-f]+: 60a1 a400 prefe 0x5,0\(\$1\) #pass diff --git a/gas/testsuite/gas/mips/micromips@mcu.d b/gas/testsuite/gas/mips/micromips@mcu.d index eec0ed7..a78fc2c 100644 --- a/gas/testsuite/gas/mips/micromips@mcu.d +++ b/gas/testsuite/gas/mips/micromips@mcu.d @@ -23,17 +23,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 20ff b000 aclr 0x7,0\(ra\) [ 0-9a-f]+: 20ff b7ff aclr 0x7,2047\(ra\) [ 0-9a-f]+: 20ff b800 aclr 0x7,-2048\(ra\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra -[ 0-9a-f]+: 20e1 b800 aclr 0x7,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra -[ 0-9a-f]+: 20e1 b7ff aclr 0x7,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra -[ 0-9a-f]+: 20e1 bfff aclr 0x7,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 303f 0800 addiu at,ra,2048 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 303f f7ff addiu at,ra,-2049 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 303f 7fff addiu at,ra,32767 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) +[ 0-9a-f]+: 303f 8000 addiu at,ra,-32768 [ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -44,15 +40,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 20e1 b001 aclr 0x7,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 20e1 b001 aclr 0x7,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 20e1 b000 aclr 0x7,0\(at\) @@ -81,17 +75,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 20ff 3000 aset 0x7,0\(ra\) [ 0-9a-f]+: 20ff 37ff aset 0x7,2047\(ra\) [ 0-9a-f]+: 20ff 3800 aset 0x7,-2048\(ra\) -[ 0-9a-f]+: 3020 1000 li at,4096 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra -[ 0-9a-f]+: 20e1 3800 aset 0x7,-2048\(at\) -[ 0-9a-f]+: 3020 f000 li at,-4096 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra -[ 0-9a-f]+: 20e1 37ff aset 0x7,2047\(at\) -[ 0-9a-f]+: 5020 8000 li at,0x8000 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra -[ 0-9a-f]+: 20e1 3fff aset 0x7,-1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 03e1 0950 addu at,at,ra +[ 0-9a-f]+: 303f 0800 addiu at,ra,2048 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 303f f7ff addiu at,ra,-2049 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 303f 7fff addiu at,ra,32767 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) +[ 0-9a-f]+: 303f 8000 addiu at,ra,-32768 [ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) [ 0-9a-f]+: 41a1 0001 lui at,0x1 [ 0-9a-f]+: 0081 0950 addu at,at,a0 @@ -102,15 +92,13 @@ Disassembly of section \.text: [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 +[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768 [ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) [ 0-9a-f]+: 41a1 ffff lui at,0xffff [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 20e1 3001 aset 0x7,1\(at\) -[ 0-9a-f]+: 3020 8000 li at,-32768 -[ 0-9a-f]+: 0081 0950 addu at,at,a0 -[ 0-9a-f]+: 20e1 3001 aset 0x7,1\(at\) +[ 0-9a-f]+: 3024 8001 addiu at,a0,-32767 +[ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) [ 0-9a-f]+: 41a1 f000 lui at,0xf000 [ 0-9a-f]+: 0081 0950 addu at,at,a0 [ 0-9a-f]+: 20e1 3000 aset 0x7,0\(at\) diff --git a/gas/testsuite/gas/mips/micromips@pref.d b/gas/testsuite/gas/mips/micromips@pref.d index 578a797..6dbee45 100644 --- a/gas/testsuite/gas/mips/micromips@pref.d +++ b/gas/testsuite/gas/mips/micromips@pref.d @@ -10,17 +10,13 @@ Disassembly of section \.text: [0-9a-f]+ <[^>]*> 60a2 27ff pref 0x5,2047\(v0\) [0-9a-f]+ <[^>]*> 60a3 2800 pref 0x5,-2048\(v1\) -[0-9a-f]+ <[^>]*> 3020 1000 li at,4096 -[0-9a-f]+ <[^>]*> 0081 0950 addu at,at,a0 -[0-9a-f]+ <[^>]*> 60a1 2800 pref 0x5,-2048\(at\) -[0-9a-f]+ <[^>]*> 3020 f000 li at,-4096 -[0-9a-f]+ <[^>]*> 00a1 0950 addu at,at,a1 -[0-9a-f]+ <[^>]*> 60a1 27ff pref 0x5,2047\(at\) -[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 -[0-9a-f]+ <[^>]*> 00c1 0950 addu at,at,a2 -[0-9a-f]+ <[^>]*> 60a1 2fff pref 0x5,-1\(at\) -[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768 -[0-9a-f]+ <[^>]*> 00e1 0950 addu at,at,a3 +[0-9a-f]+ <[^>]*> 3024 0800 addiu at,a0,2048 +[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3025 f7ff addiu at,a1,-2049 +[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3026 7fff addiu at,a2,32767 +[0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) +[0-9a-f]+ <[^>]*> 3027 8000 addiu at,a3,-32768 [0-9a-f]+ <[^>]*> 60a1 2000 pref 0x5,0\(at\) [0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000 [0-9a-f]+ <[^>]*> 0101 0950 addu at,at,t0 diff --git a/gas/testsuite/gas/mips/micromips@ulw-reloc.d b/gas/testsuite/gas/mips/micromips@ulw-reloc.d new file mode 100644 index 0000000..0b542b5 --- /dev/null +++ b/gas/testsuite/gas/mips/micromips@ulw-reloc.d @@ -0,0 +1,144 @@ +#as: -32 -EB +#objdump: -dr --prefix-addresses -Mgpr-names=numeric +#name: ULW with relocation operators +#source: ulw-reloc.s + +.*file format.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> lwl \$1,0\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,3\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> lwl \$1,2044\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,2047\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$4,2045 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,2047 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,2048 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32764 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32765 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32767 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$4 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$5\) +[0-9a-f]+ <[^>]*> lwl \$4,2044\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,2047\(\$5\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,2045 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,2047 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,2048 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32764 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32765 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32767 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffc +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffd +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +# Would be more efficient to apply the offset to the base register. +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,-30875 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,4661 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_MICROMIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[ ]*[0-9a-f]+: R_MICROMIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[ ]*[0-9a-f]+: R_MICROMIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#pass diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index a1254d9..673b1d7 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -1114,4 +1114,16 @@ if { [istarget mips*-*-vxworks*] } { run_list_test "ase-errors-2" "-mabi=o64 -march=mips3" "ASE errors (2)" run_list_test "ase-errors-3" "-mabi=32 -march=mips1" "ASE errors (3)" run_list_test "ase-errors-4" "-mabi=o64 -march=mips3" "ASE errors (4)" + + run_dump_test_arches "la-reloc" [mips_arch_list_matching mips1] + if { $has_newabi } { + run_dump_test_arches "dla-reloc" [mips_arch_list_matching mips3] + } + + # Start with MIPS II to avoid load delay nops. + run_dump_test_arches "ld-reloc" [mips_arch_list_matching mips2] + run_dump_test_arches "ulw-reloc" [mips_arch_list_matching mips2] + run_dump_test_arches "ulh-reloc" [mips_arch_list_matching mips2] + + run_dump_test "l_d-reloc" } diff --git a/gas/testsuite/gas/mips/ulh-reloc.d b/gas/testsuite/gas/mips/ulh-reloc.d new file mode 100644 index 0000000..2a66c5d --- /dev/null +++ b/gas/testsuite/gas/mips/ulh-reloc.d @@ -0,0 +1,160 @@ +#as: -32 -EB +#objdump: -dr --prefix-addresses -Mgpr-names=numeric +#name: ULH with relocation operators + +.*file format.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> lb \$1,0\(\$4\) +[0-9a-f]+ <[^>]*> lbu \$4,1\(\$4\) +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> lb \$1,32766\(\$4\) +[0-9a-f]+ <[^>]*> lbu \$4,32767\(\$4\) +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32767 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> li \$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$4 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> lb \$1,0\(\$5\) +[0-9a-f]+ <[^>]*> lbu \$4,1\(\$5\) +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> lb \$1,32766\(\$5\) +[0-9a-f]+ <[^>]*> lbu \$4,32767\(\$5\) +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32767 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> li \$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +# Would be more efficient to apply the offset to the base register. +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffe +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +# This one must use LUI/ORI +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +# Would be more efficient to apply the offset to the base register. +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> lb \$1,0\(\$0\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lbu \$4,1\(\$0\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> li \$1,-30875 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> li \$1,4661 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> lb \$1,0\(\$4\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lbu \$4,1\(\$4\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> lb \$1,0\(\$5\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lbu \$4,1\(\$5\) +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> sll \$1,\$1,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[ ]*[0-9a-f]+: R_(MICRO|)MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lb \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lbu \$1,1\(\$1\) +[0-9a-f]+ <[^>]*> sll \$4,\$4,0x8 +[0-9a-f]+ <[^>]*> or \$4,\$4,\$1 +#pass diff --git a/gas/testsuite/gas/mips/ulh-reloc.s b/gas/testsuite/gas/mips/ulh-reloc.s new file mode 100644 index 0000000..42e8959 --- /dev/null +++ b/gas/testsuite/gas/mips/ulh-reloc.s @@ -0,0 +1,33 @@ + .ent func +func: + ulh $4,($4) + ulh $4,0x7ffe($4) + ulh $4,0x7fff($4) + ulh $4,0x8000($4) + + ulh $4,($5) + ulh $4,0x7ffe($5) + ulh $4,0x7fff($5) + ulh $4,0x8000($5) + ulh $4,0x37ffe($5) + ulh $4,0x37fff($5) + ulh $4,0x38000($5) + + ulh $4,%lo(foo) + ulh $4,%hi(foo) + ulh $4,%gp_rel(foo) + ulh $4,%lo(0x12348765) + ulh $4,%hi(0x12348765) + + ulh $4,%lo(foo)($4) + ulh $4,%hi(foo)($4) + ulh $4,%gp_rel(foo)($4) + + ulh $4,%lo(foo)($5) + ulh $4,%hi(foo)($5) + ulh $4,%gp_rel(foo)($5) + ulh $4,%lo(0x12348765)($5) + ulh $4,%hi(0x12348765)($5) + ulh $4,%lo(foo+0x12348765)($5) + ulh $4,%hi(foo+0x12348765)($5) + .end func diff --git a/gas/testsuite/gas/mips/ulw-reloc.d b/gas/testsuite/gas/mips/ulw-reloc.d new file mode 100644 index 0000000..920d507 --- /dev/null +++ b/gas/testsuite/gas/mips/ulw-reloc.d @@ -0,0 +1,143 @@ +#as: -32 -EB +#objdump: -dr --prefix-addresses -Mgpr-names=numeric +#name: ULW with relocation operators + +.*file format.* + +Disassembly of section \.text: +[0-9a-f]+ <[^>]*> lwl \$1,0\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,3\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> lwl \$1,2044\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,2047\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> lwl \$1,2045\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,2048\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> lwl \$1,2047\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,2050\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> lwl \$1,2048\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,2051\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> lwl \$1,32764\(\$4\) +[0-9a-f]+ <[^>]*> lwr \$1,32767\(\$4\) +[0-9a-f]+ <[^>]*> move \$4,\$1 +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32765 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,32767 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$4 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$5\) +[0-9a-f]+ <[^>]*> lwl \$4,2044\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,2047\(\$5\) +[0-9a-f]+ <[^>]*> lwl \$4,2045\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,2048\(\$5\) +[0-9a-f]+ <[^>]*> lwl \$4,2047\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,2050\(\$5\) +[0-9a-f]+ <[^>]*> lwl \$4,2048\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,2051\(\$5\) +[0-9a-f]+ <[^>]*> lwl \$4,32764\(\$5\) +[0-9a-f]+ <[^>]*> lwr \$4,32767\(\$5\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32765 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,32767 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +# Would be more efficient to apply the offset to the base register. +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffc +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +# This one must use LUI/ORI +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7ffd +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +# This one must use LUI/ORI +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x7fff +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +# Would be more efficient to apply the offset to the base register. +[0-9a-f]+ <[^>]*> lui \$1,0x3 +[0-9a-f]+ <[^>]*> ori \$1,\$1,0x8000 +[0-9a-f]+ <[^>]*> addu \$1,\$1,\$5 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,0 +[ ]*[0-9a-f]+: R_MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$0\) +[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$0\) +[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> li \$1,-30875 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> li \$1,4661 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$4,0 +[ ]*[0-9a-f]+: R_MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> lwl \$1,0\(\$4\) +[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwr \$1,3\(\$4\) +[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> move \$4,\$1 +#-------------------------------------------------------------------- +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,0 +[ ]*[0-9a-f]+: R_MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$5\) +[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$5\) +[ ]*[0-9a-f]+: R_MIPS_GPREL16 foo +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,-30875 +[ ]*[0-9a-f]+: R_MIPS_LO16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +[0-9a-f]+ <[^>]*> addiu \$1,\$5,4661 +[ ]*[0-9a-f]+: R_MIPS_HI16 foo +[0-9a-f]+ <[^>]*> lwl \$4,0\(\$1\) +[0-9a-f]+ <[^>]*> lwr \$4,3\(\$1\) +#pass diff --git a/gas/testsuite/gas/mips/ulw-reloc.s b/gas/testsuite/gas/mips/ulw-reloc.s new file mode 100644 index 0000000..8d3111c --- /dev/null +++ b/gas/testsuite/gas/mips/ulw-reloc.s @@ -0,0 +1,44 @@ + .ent func +func: + ulw $4,($4) + ulw $4,0x7fc($4) + ulw $4,0x7fd($4) + ulw $4,0x7ff($4) + ulw $4,0x800($4) + ulw $4,0x7ffc($4) + ulw $4,0x7ffd($4) + ulw $4,0x7fff($4) + ulw $4,0x8000($4) + + ulw $4,($5) + ulw $4,0x7fc($5) + ulw $4,0x7fd($5) + ulw $4,0x7ff($5) + ulw $4,0x800($5) + ulw $4,0x7ffc($5) + ulw $4,0x7ffd($5) + ulw $4,0x7fff($5) + ulw $4,0x8000($5) + ulw $4,0x37ffc($5) + ulw $4,0x37ffd($5) + ulw $4,0x37fff($5) + ulw $4,0x38000($5) + + ulw $4,%lo(foo) + ulw $4,%hi(foo) + ulw $4,%gp_rel(foo) + ulw $4,%lo(0x12348765) + ulw $4,%hi(0x12348765) + + ulw $4,%lo(foo)($4) + ulw $4,%hi(foo)($4) + ulw $4,%gp_rel(foo)($4) + + ulw $4,%lo(foo)($5) + ulw $4,%hi(foo)($5) + ulw $4,%gp_rel(foo)($5) + ulw $4,%lo(0x12348765)($5) + ulw $4,%hi(0x12348765)($5) + ulw $4,%lo(foo+0x12348765)($5) + ulw $4,%hi(foo+0x12348765)($5) + .end func diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 62661e2..4d57384 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,5 +1,24 @@ 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * mips.h (M_ACLR_OB, M_ASET_OB, M_CACHE_OB, M_CACHEE_OB, M_L_DOB) + (M_LB_A, M_LBE_OB, M_LBU_A, M_LBUE_OB, M_LD_A, M_LD_OB, M_LDC2_OB) + (M_LDL_OB, M_LDM_OB, M_LDP_OB, M_LDR_OB, M_LH_A, M_LHE_OB, M_LHU_A) + (M_LHUE_OB, M_LL_OB, M_LLD_OB, M_LLE_OB, M_LS_A, M_LW_A, M_LWE_OB) + (M_LWC0_A, M_LWC1_A, M_LWC2_A, M_LWC2_OB, M_LWC3_A, M_LWL_A, M_LWL_OB) + (M_LWLE_OB, M_LWM_OB, M_LWP_OB, M_LWR_A, M_LWR_OB, M_LWRE_OB, M_LWU_OB) + (M_PREF_OB, M_PREFE_OB, M_S_DOB, M_SAA_OB, M_SAAD_OB, M_SC_OB) + (M_SCD_OB, M_SCE_OB, M_SD_A, M_SD_OB, M_SDC2_OB, M_SDL_OB, M_SDM_OB) + (M_SDP_OB, M_SDR_OB, M_SB_A, M_SBE_OB, M_SH_A, M_SHE_OB, M_SW_A) + (M_SWE_OB, M_SWC0_A, M_SWC1_A, M_SWC2_A, M_SWC2_OB, M_SWC3_A, M_SWL_A) + (M_SWL_OB, M_SWLE_OB, M_SWM_OB, M_SWP_OB, M_SWR_A, M_SWR_OB, M_SWRE_OB) + (M_ULD, M_ULH, M_ULHU, M_ULW, M_USH, M_USW, M_USD): Delete. + (M_ULD_A, M_ULH_A, M_ULHU_A, M_ULW_A, M_USH_A, M_USW_A, M_USD_A): + Rename to... + (M_ULD_AB, M_ULH_AB, M_ULHU_AB, M_ULW_AB, M_USH_AB, M_USW_AB) + (M_USD_AB): ...these. + +2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * mips.h: Remove documentation of "[" and "]". Update documentation of "k" and the MDMX formats. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index f70a500..89ea3e9 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -947,8 +947,8 @@ opcode_is_member (const struct mips_opcode *insn, int isa, int ase, int cpu) /* This is a list of macro expanded instructions. _I appended means immediate - _A appended means address - _AB appended means address with base register + _A appended means target address of a jump + _AB appended means address with (possibly zero) base register _D appended means 64 bit floating point constant _S appended means 32 bit floating point constant. */ @@ -956,12 +956,10 @@ enum { M_ABS, M_ACLR_AB, - M_ACLR_OB, M_ADD_I, M_ADDU_I, M_AND_I, M_ASET_AB, - M_ASET_OB, M_BALIGN, M_BC1FL, M_BC1TL, @@ -1018,9 +1016,7 @@ enum M_BNE_I, M_BNEL_I, M_CACHE_AB, - M_CACHE_OB, M_CACHEE_AB, - M_CACHEE_OB, M_DABS, M_DADD_I, M_DADDU_I, @@ -1059,41 +1055,25 @@ enum M_JALS_A, M_JRADDIUSP, M_JRC, - M_L_DOB, M_L_DAB, M_LA_AB, - M_LB_A, M_LB_AB, - M_LBE_OB, M_LBE_AB, - M_LBU_A, M_LBU_AB, - M_LBUE_OB, M_LBUE_AB, M_LCA_AB, - M_LD_A, - M_LD_OB, M_LD_AB, M_LDC1_AB, M_LDC2_AB, - M_LDC2_OB, M_LQC2_AB, M_LDC3_AB, M_LDL_AB, - M_LDL_OB, M_LDM_AB, - M_LDM_OB, M_LDP_AB, - M_LDP_OB, M_LDR_AB, - M_LDR_OB, - M_LH_A, M_LH_AB, - M_LHE_OB, M_LHE_AB, - M_LHU_A, M_LHU_AB, - M_LHUE_OB, M_LHUE_AB, M_LI, M_LI_D, @@ -1101,42 +1081,22 @@ enum M_LI_S, M_LI_SS, M_LL_AB, - M_LL_OB, M_LLD_AB, - M_LLD_OB, M_LLE_AB, - M_LLE_OB, M_LQ_AB, - M_LS_A, - M_LW_A, M_LW_AB, - M_LWE_OB, M_LWE_AB, - M_LWC0_A, M_LWC0_AB, - M_LWC1_A, M_LWC1_AB, - M_LWC2_A, M_LWC2_AB, - M_LWC2_OB, - M_LWC3_A, M_LWC3_AB, - M_LWL_A, M_LWL_AB, - M_LWL_OB, M_LWLE_AB, - M_LWLE_OB, M_LWM_AB, - M_LWM_OB, M_LWP_AB, - M_LWP_OB, - M_LWR_A, M_LWR_AB, - M_LWR_OB, M_LWRE_AB, - M_LWRE_OB, M_LWU_AB, - M_LWU_OB, M_MSGSND, M_MSGLD, M_MSGLD_T, @@ -1153,9 +1113,7 @@ enum M_NOR_I, M_OR_I, M_PREF_AB, - M_PREF_OB, M_PREFE_AB, - M_PREFE_OB, M_REM_3, M_REM_3I, M_REMU_3, @@ -1169,35 +1127,22 @@ enum M_DROR_I, M_ROR_I, M_S_DA, - M_S_DOB, M_S_DAB, M_S_S, M_SAA_AB, - M_SAA_OB, M_SAAD_AB, - M_SAAD_OB, M_SC_AB, - M_SC_OB, M_SCD_AB, - M_SCD_OB, M_SCE_AB, - M_SCE_OB, - M_SD_A, - M_SD_OB, M_SD_AB, M_SDC1_AB, M_SDC2_AB, - M_SDC2_OB, M_SQC2_AB, M_SDC3_AB, M_SDL_AB, - M_SDL_OB, M_SDM_AB, - M_SDM_OB, M_SDP_AB, - M_SDP_OB, M_SDR_AB, - M_SDR_OB, M_SEQ, M_SEQ_I, M_SGE, @@ -1216,42 +1161,23 @@ enum M_SLTU_I, M_SNE, M_SNE_I, - M_SB_A, M_SB_AB, - M_SBE_OB, M_SBE_AB, - M_SH_A, M_SH_AB, - M_SHE_OB, M_SHE_AB, M_SQ_AB, - M_SW_A, M_SW_AB, - M_SWE_OB, M_SWE_AB, - M_SWC0_A, M_SWC0_AB, - M_SWC1_A, M_SWC1_AB, - M_SWC2_A, M_SWC2_AB, - M_SWC2_OB, - M_SWC3_A, M_SWC3_AB, - M_SWL_A, M_SWL_AB, - M_SWL_OB, M_SWLE_AB, - M_SWLE_OB, M_SWM_AB, - M_SWM_OB, M_SWP_AB, - M_SWP_OB, - M_SWR_A, M_SWR_AB, - M_SWR_OB, M_SWRE_AB, - M_SWRE_OB, M_SUB_I, M_SUBU_I, M_SUBU_I_2, @@ -1263,20 +1189,13 @@ enum M_TNE_I, M_TRUNCWD, M_TRUNCWS, - M_ULD, - M_ULD_A, - M_ULH, - M_ULH_A, - M_ULHU, - M_ULHU_A, - M_ULW, - M_ULW_A, - M_USH, - M_USH_A, - M_USW, - M_USW_A, - M_USD, - M_USD_A, + M_ULD_AB, + M_ULH_AB, + M_ULHU_AB, + M_ULW_AB, + M_USH_AB, + M_USW_AB, + M_USD_AB, M_XOR_I, M_COP0, M_COP1, diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index fe6a543..88dd972 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * mips-opc.c (mips_builtin_opcodes): Remove o(b) macros. Move LD + and SD A(B) macros up. + * micromips-opc.c (micromips_opcodes): Likewise. + +2013-07-07 Richard Sandiford <rdsandiford@googlemail.com> + * mips16-opc.c: Add entries for argumentless "entry" and "exit" instructions. diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index 6a72396..de8053c 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -127,7 +127,6 @@ const struct mips_opcode micromips_opcodes[] = instruction name anyhow. */ /* name, args, match, mask, pinfo, pinfo2, membership, [ase], [exclusions] */ {"pref", "k,~(b)", 0x60002000, 0xfc00f000, RD_b, 0, I1 }, -{"pref", "k,o(b)", 0, (int) M_PREF_OB, INSN_MACRO, 0, I1 }, {"pref", "k,A(b)", 0, (int) M_PREF_AB, INSN_MACRO, 0, I1 }, {"prefx", "h,t(b)", 0x540001a0, 0xfc0007ff, RD_b|RD_t|FP_S, 0, I1 }, {"nop", "", 0x0c00, 0xffff, 0, INSN2_ALIAS, I1 }, @@ -160,7 +159,6 @@ const struct mips_opcode micromips_opcodes[] = {"abs.s", "T,V", 0x5400037b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, {"abs.ps", "T,V", 0x5400437b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, {"aclr", "\\,~(b)", 0x2000b000, 0xff00f000, SM|RD_b|NODS, 0, 0, MC }, -{"aclr", "\\,o(b)", 0, (int) M_ACLR_OB, INSN_MACRO, 0, 0, MC }, {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, 0, MC }, {"add", "d,v,t", 0x00000110, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, {"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1 }, @@ -195,7 +193,6 @@ const struct mips_opcode micromips_opcodes[] = {"andi", "md,mc,mC", 0x2c00, 0xfc00, 0, WR_md|RD_mc, I1 }, {"andi", "t,r,i", 0xd0000000, 0xfc000000, WR_t|RD_s, 0, I1 }, {"aset", "\\,~(b)", 0x20003000, 0xff00f000, SM|RD_b|NODS, 0, 0, MC }, -{"aset", "\\,o(b)", 0, (int) M_ASET_OB, INSN_MACRO, 0, 0, MC }, {"aset", "\\,A(b)", 0, (int) M_ASET_AB, INSN_MACRO, 0, 0, MC }, /* b is at the top of the table. */ /* bal is at the top of the table. */ @@ -383,7 +380,6 @@ const struct mips_opcode micromips_opcodes[] = {"c.ngt.ps", "S,T", 0x54000bfc, 0xfc00ffff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, {"c.ngt.ps", "M,S,T", 0x54000bfc, 0xfc001fff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, {"cache", "k,~(b)", 0x20006000, 0xfc00f000, RD_b, 0, I1 }, -{"cache", "k,o(b)", 0, (int) M_CACHE_OB, INSN_MACRO, 0, I1 }, {"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I1 }, {"ceil.l.d", "T,S", 0x5400533b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, {"ceil.l.s", "T,S", 0x5400133b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, @@ -596,29 +592,23 @@ const struct mips_opcode micromips_opcodes[] = {"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, 0, I1 }, {"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, 0, I1 }, /* The macro has to be first to handle o32 correctly. */ -{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, 0, I1 }, -{"ld", "t,o(b)", 0xdc000000, 0xfc000000, RD_b|WR_t, 0, I3 }, {"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1 }, +{"ld", "t,o(b)", 0xdc000000, 0xfc000000, RD_b|WR_t, 0, I3 }, {"ldc1", "T,o(b)", 0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0, I1 }, {"ldc1", "E,o(b)", 0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0, I1 }, {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"ldc2", "E,~(b)", 0x20002000, 0xfc00f000, RD_b|WR_CC, 0, I1 }, -{"ldc2", "E,o(b)", 0, (int) M_LDC2_OB, INSN_MACRO, 0, I1 }, {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I1 }, {"l.d", "T,o(b)", 0xbc000000, 0xfc000000, RD_b|WR_T|FP_D, 0, I1 }, /* ldc1 */ {"l.d", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"ldl", "t,~(b)", 0x60004000, 0xfc00f000, WR_t|RD_b, 0, I3 }, -{"ldl", "t,o(b)", 0, (int) M_LDL_OB, INSN_MACRO, 0, I3 }, {"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, 0, I3 }, {"ldm", "n,~(b)", 0x20007000, 0xfc00f000, RD_b, 0, I3 }, -{"ldm", "n,o(b)", 0, (int) M_LDM_OB, INSN_MACRO, 0, I3 }, {"ldm", "n,A(b)", 0, (int) M_LDM_AB, INSN_MACRO, 0, I3 }, {"ldp", "t,~(b)", 0x20004000, 0xfc00f000, RD_b|WR_t, 0, I3 }, -{"ldp", "t,o(b)", 0, (int) M_LDP_OB, INSN_MACRO, 0, I3 }, {"ldp", "t,A(b)", 0, (int) M_LDP_AB, INSN_MACRO, 0, I3 }, {"ldr", "t,~(b)", 0x60005000, 0xfc00f000, WR_t|RD_b, 0, I3 }, -{"ldr", "t,o(b)", 0, (int) M_LDR_OB, INSN_MACRO, 0, I3 }, {"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, 0, I3 }, {"ldxc1", "D,t(b)", 0x540000c8, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D, 0, I1 }, {"lh", "t,o(b)", 0x3c000000, 0xfc000000, RD_b|WR_t, 0, I1 }, @@ -632,10 +622,8 @@ const struct mips_opcode micromips_opcodes[] = {"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO, INSN2_M_FP_S, I1 }, {"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO, INSN2_M_FP_S, I1 }, {"ll", "t,~(b)", 0x60003000, 0xfc00f000, RD_b|WR_t, 0, I1 }, -{"ll", "t,o(b)", 0, (int) M_LL_OB, INSN_MACRO, 0, I1 }, {"ll", "t,A(b)", 0, (int) M_LL_AB, INSN_MACRO, 0, I1 }, {"lld", "t,~(b)", 0x60007000, 0xfc00f000, RD_b|WR_t, 0, I3 }, -{"lld", "t,o(b)", 0, (int) M_LLD_OB, INSN_MACRO, 0, I3 }, {"lld", "t,A(b)", 0, (int) M_LLD_AB, INSN_MACRO, 0, I3 }, {"lui", "s,u", 0x41a00000, 0xffe00000, WR_s, 0, I1 }, {"luxc1", "D,t(b)", 0x54000148, 0xfc0007ff, WR_D|RD_t|RD_b|FP_D, 0, I1 }, @@ -649,32 +637,24 @@ const struct mips_opcode micromips_opcodes[] = {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, {"lwc2", "E,~(b)", 0x20000000, 0xfc00f000, RD_b|WR_CC, 0, I1 }, -{"lwc2", "E,o(b)", 0, (int) M_LWC2_OB, INSN_MACRO, 0, I1 }, {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, 0, I1 }, {"l.s", "T,o(b)", 0x9c000000, 0xfc000000, RD_b|WR_T|FP_S, 0, I1 }, /* lwc1 */ {"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, {"lwl", "t,~(b)", 0x60000000, 0xfc00f000, RD_b|WR_t, 0, I1 }, -{"lwl", "t,o(b)", 0, (int) M_LWL_OB, INSN_MACRO, 0, I1 }, {"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1 }, {"lcache", "t,~(b)", 0x60000000, 0xfc00f000, RD_b|WR_t, 0, I1 }, /* same */ -{"lcache", "t,o(b)", 0, (int) M_LWL_OB, INSN_MACRO, 0, I1 }, {"lcache", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO, 0, I1 }, {"lwm", "mN,mJ(ms)", 0x4500, 0xffc0, NODS, RD_sp, I1 }, {"lwm", "n,~(b)", 0x20005000, 0xfc00f000, RD_b|NODS, 0, I1 }, -{"lwm", "n,o(b)", 0, (int) M_LWM_OB, INSN_MACRO, 0, I1 }, {"lwm", "n,A(b)", 0, (int) M_LWM_AB, INSN_MACRO, 0, I1 }, {"lwp", "t,~(b)", 0x20001000, 0xfc00f000, RD_b|WR_t|NODS, 0, I1 }, -{"lwp", "t,o(b)", 0, (int) M_LWP_OB, INSN_MACRO, 0, I1 }, {"lwp", "t,A(b)", 0, (int) M_LWP_AB, INSN_MACRO, 0, I1 }, {"lwr", "t,~(b)", 0x60001000, 0xfc00f000, RD_b|WR_t, 0, I1 }, -{"lwr", "t,o(b)", 0, (int) M_LWR_OB, INSN_MACRO, 0, I1 }, {"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1 }, {"lwu", "t,~(b)", 0x6000e000, 0xfc00f000, RD_b|WR_t, 0, I3 }, -{"lwu", "t,o(b)", 0, (int) M_LWU_OB, INSN_MACRO, 0, I3 }, {"lwu", "t,A(b)", 0, (int) M_LWU_AB, INSN_MACRO, 0, I3 }, {"lwxc1", "D,t(b)", 0x54000048, 0xfc0007ff, WR_D|RD_t|RD_b|FP_S, 0, I1 }, {"flush", "t,~(b)", 0x60001000, 0xfc00f000, RD_b|WR_t, 0, I1 }, /* same */ -{"flush", "t,o(b)", 0, (int) M_LWR_OB, INSN_MACRO, 0, I1 }, {"flush", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO, 0, I1 }, {"lwxs", "d,t(b)", 0x00000118, 0xfc0007ff, RD_b|RD_t|WR_d, 0, I1 }, {"madd", "s,t", 0x0000cb3c, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I1 }, @@ -819,15 +799,12 @@ const struct mips_opcode micromips_opcodes[] = {"sb", "t,o(b)", 0x18000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, {"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO, 0, I1 }, {"sc", "t,~(b)", 0x6000b000, 0xfc00f000, SM|RD_t|WR_t|RD_b, 0, I1 }, -{"sc", "t,o(b)", 0, (int) M_SC_OB, INSN_MACRO, 0, I1 }, {"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, 0, I1 }, {"scd", "t,~(b)", 0x6000f000, 0xfc00f000, SM|RD_t|WR_t|RD_b, 0, I3 }, -{"scd", "t,o(b)", 0, (int) M_SCD_OB, INSN_MACRO, 0, I3 }, {"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, 0, I3 }, /* The macro has to be first to handle o32 correctly. */ -{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, 0, I1 }, -{"sd", "t,o(b)", 0xd8000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, {"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, 0, I1 }, +{"sd", "t,o(b)", 0xd8000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, {"sdbbp", "", 0x46c0, 0xffff, TRAP, 0, I1 }, {"sdbbp", "", 0x0000db7c, 0xffffffff, TRAP, 0, I1 }, {"sdbbp", "mO", 0x46c0, 0xfff0, TRAP, 0, I1 }, @@ -837,21 +814,16 @@ const struct mips_opcode micromips_opcodes[] = {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"sdc2", "E,~(b)", 0x2000a000, 0xfc00f000, SM|RD_C2|RD_b, 0, I1 }, -{"sdc2", "E,o(b)", 0, (int) M_SDC2_OB, INSN_MACRO, 0, I1 }, {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, 0, I1 }, {"s.d", "T,o(b)", 0xb8000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I1 }, /* sdc1 */ {"s.d", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"sdl", "t,~(b)", 0x6000c000, 0xfc00f000, SM|RD_t|RD_b, 0, I3 }, -{"sdl", "t,o(b)", 0, (int) M_SDL_OB, INSN_MACRO, 0, I3 }, {"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3 }, {"sdm", "n,~(b)", 0x2000f000, 0xfc00f000, SM|RD_b, 0, I3 }, -{"sdm", "n,o(b)", 0, (int) M_SDM_OB, INSN_MACRO, 0, I3 }, {"sdm", "n,A(b)", 0, (int) M_SDM_AB, INSN_MACRO, 0, I3 }, {"sdp", "t,~(b)", 0x2000c000, 0xfc00f000, SM|RD_t|RD_b, 0, I3 }, -{"sdp", "t,o(b)", 0, (int) M_SDP_OB, INSN_MACRO, 0, I3 }, {"sdp", "t,A(b)", 0, (int) M_SDP_AB, INSN_MACRO, 0, I3 }, {"sdr", "t,~(b)", 0x6000d000, 0xfc00f000, SM|RD_t|RD_b, 0, I3 }, -{"sdr", "t,o(b)", 0, (int) M_SDR_OB, INSN_MACRO, 0, I3 }, {"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, 0, I3 }, {"sdxc1", "D,t(b)", 0x54000108, 0xfc0007ff, SM|RD_t|RD_b|FP_D, RD_D, I1 }, {"seb", "t,r", 0x00002b3c, 0xfc00ffff, WR_t|RD_s, 0, I1 }, @@ -913,28 +885,21 @@ const struct mips_opcode micromips_opcodes[] = {"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, {"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, {"swc2", "E,~(b)", 0x20008000, 0xfc00f000, SM|RD_C2|RD_b, 0, I1 }, -{"swc2", "E,o(b)", 0, (int) M_SWC2_OB, INSN_MACRO, 0, I1 }, {"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, 0, I1 }, {"s.s", "T,o(b)", 0x98000000, 0xfc000000, SM|RD_T|RD_b|FP_S, 0, I1 }, /* swc1 */ {"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, INSN2_M_FP_S, I1 }, {"swl", "t,~(b)", 0x60008000, 0xfc00f000, SM|RD_t|RD_b, 0, I1 }, -{"swl", "t,o(b)", 0, (int) M_SWL_OB, INSN_MACRO, 0, I1 }, {"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1 }, {"scache", "t,~(b)", 0x60008000, 0xfc00f000, SM|RD_t|RD_b, 0, I1 }, /* same */ -{"scache", "t,o(b)", 0, (int) M_SWL_OB, INSN_MACRO, 0, I1 }, {"scache", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO, 0, I1 }, {"swm", "mN,mJ(ms)", 0x4540, 0xffc0, NODS, RD_sp, I1 }, {"swm", "n,~(b)", 0x2000d000, 0xfc00f000, SM|RD_b|NODS, 0, I1 }, -{"swm", "n,o(b)", 0, (int) M_SWM_OB, INSN_MACRO, 0, I1 }, {"swm", "n,A(b)", 0, (int) M_SWM_AB, INSN_MACRO, 0, I1 }, {"swp", "t,~(b)", 0x20009000, 0xfc00f000, SM|RD_t|RD_b|NODS, 0, I1 }, -{"swp", "t,o(b)", 0, (int) M_SWP_OB, INSN_MACRO, 0, I1 }, {"swp", "t,A(b)", 0, (int) M_SWP_AB, INSN_MACRO, 0, I1 }, {"swr", "t,~(b)", 0x60009000, 0xfc00f000, SM|RD_b|RD_t, 0, I1 }, -{"swr", "t,o(b)", 0, (int) M_SWR_OB, INSN_MACRO, 0, I1 }, {"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO, 0, I1 }, {"invalidate", "t,~(b)",0x60009000, 0xfc00f000, SM|RD_b|RD_t, 0, I1 }, /* same */ -{"invalidate", "t,o(b)",0, (int) M_SWR_OB, INSN_MACRO, 0, I1 }, {"invalidate", "t,A(b)",0, (int) M_SWR_AB, INSN_MACRO, 0, I1 }, {"swxc1", "D,t(b)", 0x54000088, 0xfc0007ff, SM|RD_t|RD_b|FP_S, RD_D, I1 }, {"sync_acquire", "", 0x00116b7c, 0xffffffff, NODS, 0, I1 }, @@ -993,20 +958,13 @@ const struct mips_opcode micromips_opcodes[] = {"trunc.l.s", "T,S", 0x5400233b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, {"trunc.w.d", "T,S", 0x54006b3b, 0xfc00ffff, WR_T|RD_S|FP_S|FP_D, 0, I1 }, {"trunc.w.s", "T,S", 0x54002b3b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, -{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, 0, I3 }, -{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, 0, I3 }, -{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, 0, I1 }, -{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, 0, I1 }, -{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, 0, I1 }, -{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, 0, I1 }, -{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, 0, I1 }, -{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, 0, I1 }, -{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, 0, I1 }, -{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, 0, I1 }, -{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, 0, I1 }, -{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, 0, I1 }, -{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, 0, I1 }, -{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, 0, I1 }, +{"uld", "t,A(b)", 0, (int) M_ULD_AB, INSN_MACRO, 0, I3 }, +{"ulh", "t,A(b)", 0, (int) M_ULH_AB, INSN_MACRO, 0, I1 }, +{"ulhu", "t,A(b)", 0, (int) M_ULHU_AB, INSN_MACRO, 0, I1 }, +{"ulw", "t,A(b)", 0, (int) M_ULW_AB, INSN_MACRO, 0, I1 }, +{"usd", "t,A(b)", 0, (int) M_USD_AB, INSN_MACRO, 0, I1 }, +{"ush", "t,A(b)", 0, (int) M_USH_AB, INSN_MACRO, 0, I1 }, +{"usw", "t,A(b)", 0, (int) M_USW_AB, INSN_MACRO, 0, I1 }, {"wait", "", 0x0000937c, 0xffffffff, NODS, 0, I1 }, {"wait", "B", 0x0000937c, 0xfc00ffff, NODS, 0, I1 }, {"wrpgpr", "t,r", 0x0000f17c, 0xfc00ffff, RD_s, 0, I1 }, @@ -1018,52 +976,36 @@ const struct mips_opcode micromips_opcodes[] = {"xori", "t,r,i", 0x70000000, 0xfc000000, WR_t|RD_s, 0, I1 }, /* microMIPS Enhanced VA Scheme */ {"lbue", "t,+j(b)", 0x60006000, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lbue", "t,o(b)", 0, (int) M_LBUE_OB, INSN_MACRO, 0, 0, EVA }, {"lbue", "t,A(b)", 0, (int) M_LBUE_AB, INSN_MACRO, 0, 0, EVA }, {"lhue", "t,+j(b)", 0x60006200, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lhue", "t,o(b)", 0, (int) M_LHUE_OB, INSN_MACRO, 0, 0, EVA }, {"lhue", "t,A(b)", 0, (int) M_LHUE_AB, INSN_MACRO, 0, 0, EVA }, {"lbe", "t,+j(b)", 0x60006800, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lbe", "t,o(b)", 0, (int) M_LBE_OB, INSN_MACRO, 0, 0, EVA }, {"lbe", "t,A(b)", 0, (int) M_LBE_AB, INSN_MACRO, 0, 0, EVA }, {"lhe", "t,+j(b)", 0x60006a00, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lhe", "t,o(b)", 0, (int) M_LHE_OB, INSN_MACRO, 0, 0, EVA }, {"lhe", "t,A(b)", 0, (int) M_LHE_AB, INSN_MACRO, 0, 0, EVA }, {"lle", "t,+j(b)", 0x60006c00, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lle", "t,o(b)", 0, (int) M_LLE_OB, INSN_MACRO, 0, 0, EVA }, {"lle", "t,A(b)", 0, (int) M_LLE_AB, INSN_MACRO, 0, 0, EVA }, {"lwe", "t,+j(b)", 0x60006e00, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lwe", "t,o(b)", 0, (int) M_LWE_OB, INSN_MACRO, 0, 0, EVA }, {"lwe", "t,A(b)", 0, (int) M_LWE_AB, INSN_MACRO, 0, 0, EVA }, {"lwle", "t,+j(b)", 0x60006400, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lwle", "t,o(b)", 0, (int) M_LWLE_OB, INSN_MACRO, 0, 0, EVA }, {"lwle", "t,A(b)", 0, (int) M_LWLE_AB, INSN_MACRO, 0, 0, EVA }, {"lwre", "t,+j(b)", 0x60006600, 0xfc00fe00, RD_b|WR_t, 0, 0, EVA }, -{"lwre", "t,o(b)", 0, (int) M_LWRE_OB, INSN_MACRO, 0, 0, EVA }, {"lwre", "t,A(b)", 0, (int) M_LWRE_AB, INSN_MACRO, 0, 0, EVA }, {"sbe", "t,+j(b)", 0x6000a800, 0xfc00fe00, SM|RD_b|WR_t, 0, 0, EVA }, -{"sbe", "t,o(b)", 0, (int) M_SBE_OB, INSN_MACRO, 0, 0, EVA }, {"sbe", "t,A(b)", 0, (int) M_SBE_AB, INSN_MACRO, 0, 0, EVA }, {"sce", "t,+j(b)", 0x6000ac00, 0xfc00fe00, SM|RD_t|WR_t|RD_b, 0, 0, EVA }, -{"sce", "t,o(b)", 0, (int) M_SCE_OB, INSN_MACRO, 0, 0, EVA }, {"sce", "t,A(b)", 0, (int) M_SCE_AB, INSN_MACRO, 0, 0, EVA }, {"she", "t,+j(b)", 0x6000aa00, 0xfc00fe00, SM|RD_b|WR_t, 0, 0, EVA }, -{"she", "t,o(b)", 0, (int) M_SHE_OB, INSN_MACRO, 0, 0, EVA }, {"she", "t,A(b)", 0, (int) M_SHE_AB, INSN_MACRO, 0, 0, EVA }, {"swe", "t,+j(b)", 0x6000ae00, 0xfc00fe00, SM|RD_b|WR_t, 0, 0, EVA }, -{"swe", "t,o(b)", 0, (int) M_SWE_OB, INSN_MACRO, 0, 0, EVA }, {"swe", "t,A(b)", 0, (int) M_SWE_AB, INSN_MACRO, 0, 0, EVA }, {"swle", "t,+j(b)", 0x6000a000, 0xfc00fe00, SM|RD_b|WR_t, 0, 0, EVA }, -{"swle", "t,o(b)", 0, (int) M_SWLE_OB, INSN_MACRO, 0, 0, EVA }, {"swle", "t,A(b)", 0, (int) M_SWLE_AB, INSN_MACRO, 0, 0, EVA }, {"swre", "t,+j(b)", 0x6000a200, 0xfc00fe00, SM|RD_b|WR_t, 0, 0, EVA }, -{"swre", "t,o(b)", 0, (int) M_SWRE_OB, INSN_MACRO, 0, 0, EVA }, {"swre", "t,A(b)", 0, (int) M_SWRE_AB, INSN_MACRO, 0, 0, EVA }, {"cachee", "k,+j(b)", 0x6000a600, 0xfc00fe00, RD_b, 0, 0, EVA }, -{"cachee", "k,o(b)", 0, (int) M_CACHEE_OB,INSN_MACRO, 0, 0, EVA }, {"cachee", "k,A(b)", 0, (int) M_CACHEE_AB,INSN_MACRO, 0, 0, EVA }, {"prefe", "k,+j(b)", 0x6000a400, 0xfc00fe00, RD_b, 0, 0, EVA }, -{"prefe", "k,o(b)", 0, (int) M_PREFE_OB, INSN_MACRO, 0, 0, EVA }, {"prefe", "k,A(b)", 0, (int) M_PREFE_AB, INSN_MACRO, 0, 0, EVA }, /* MIPS DSP ASE. */ {"absq_s.ph", "t,s", 0x0000113c, 0xfc00ffff, WR_t|RD_s, 0, 0, D32 }, diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index e33b561..9a80de6 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -300,7 +300,6 @@ const struct mips_opcode mips_builtin_opcodes[] = {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D|RD_S|FP_D, 0, I5_33|IL2F }, {"abs.ps", "D,V", 0x45600005, 0xffff003f, WR_D|RD_S|FP_D, 0, IL2E }, {"aclr", "\\,~(b)", 0x04070000, 0xfc1f8000, SM|RD_b|NODS, 0, 0, MC }, -{"aclr", "\\,o(b)", 0, (int) M_ACLR_OB, INSN_MACRO, 0, 0, MC }, {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB, INSN_MACRO, 0, 0, MC }, {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, {"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO, 0, I1 }, @@ -340,7 +339,6 @@ const struct mips_opcode mips_builtin_opcodes[] = {"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, 0, MX }, {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s, 0, I1 }, {"aset", "\\,~(b)", 0x04078000, 0xfc1f8000, SM|RD_b|NODS, 0, 0, MC }, -{"aset", "\\,o(b)", 0, (int) M_ASET_OB, INSN_MACRO, 0, 0, MC }, {"aset", "\\,A(b)", 0, (int) M_ASET_AB, INSN_MACRO, 0, 0, MC }, {"baddu", "d,v,t", 0x70000028, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, /* b is at the top of the table. */ @@ -869,9 +867,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"lwux", "d,t(b)", 0x7c00040a, 0xfc0007ff, LDD|WR_d|RD_t|RD_b, 0, IOCT2 }, {"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, 0, I1 }, /* The macro has to be first to handle o32 correctly. */ -{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, 0, I1 }, -{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, 0, I3 }, {"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1 }, +{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, 0, I3 }, {"ldaddw", "t,b", 0x70000010, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR }, {"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR }, {"ldaddd", "t,b", 0x70000012, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR }, @@ -880,7 +877,6 @@ const struct mips_opcode mips_builtin_opcodes[] = {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF }, {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, INSN2_M_FP_D, I2, 0, SF }, {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2, 0, SF }, /* ldc1 */ -{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I2, 0, IOCT|IOCTP|IOCT2|EE }, {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I2, 0, IOCT|IOCTP|IOCT2|EE }, @@ -1397,10 +1393,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_D|RD_T|FP_D, RD_MACC, SB1, MX }, {"rzu.ob", "D,Q", 0x48000020, 0xfc20f83f, WR_D|RD_S|RD_T, 0, N54 }, {"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_D|RD_T|FP_D, RD_MACC, 0, MX }, -{"saa", "t,o(b)", 0, (int) M_SAA_OB, INSN_MACRO, 0, IOCTP }, {"saa", "t,A(b)", 0, (int) M_SAA_AB, INSN_MACRO, 0, IOCTP }, {"saa", "t,(b)", 0x70000018, 0xfc00ffff, SM|RD_t|RD_b, 0, IOCTP }, -{"saad", "t,o(b)", 0, (int) M_SAAD_OB, INSN_MACRO, 0, IOCTP }, {"saad", "t,A(b)", 0, (int) M_SAAD_AB, INSN_MACRO, 0, IOCTP }, {"saad", "t,(b)", 0x70000019, 0xfc00ffff, SM|RD_t|RD_b, 0, IOCTP }, {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, @@ -1410,9 +1404,8 @@ const struct mips_opcode mips_builtin_opcodes[] = {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, 0, I3, 0, EE }, {"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, 0, I3, 0, EE }, /* The macro has to be first to handle o32 correctly. */ -{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, 0, I1 }, -{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, {"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, 0, I1 }, +{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, 0, G2 }, {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, 0, G2 }, {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, 0, G2 }, @@ -1427,7 +1420,6 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, 0, I2, 0, IOCT|IOCTP|IOCT2|EE }, {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, 0, I2, 0, IOCT|IOCTP|IOCT2|EE }, {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2, 0, SF }, -{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, INSN2_M_FP_D, I1 }, {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, {"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3 }, @@ -1636,20 +1628,13 @@ const struct mips_opcode mips_builtin_opcodes[] = {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, 0, I2, 0, EE }, {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S, 0, I2, 0, EE }, {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO, INSN2_M_FP_S, I1, 0, EE }, -{"uld", "t,o(b)", 0, (int) M_ULD, INSN_MACRO, 0, I3 }, -{"uld", "t,A(b)", 0, (int) M_ULD_A, INSN_MACRO, 0, I3 }, -{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO, 0, I1 }, -{"ulh", "t,A(b)", 0, (int) M_ULH_A, INSN_MACRO, 0, I1 }, -{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO, 0, I1 }, -{"ulhu", "t,A(b)", 0, (int) M_ULHU_A, INSN_MACRO, 0, I1 }, -{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO, 0, I1 }, -{"ulw", "t,A(b)", 0, (int) M_ULW_A, INSN_MACRO, 0, I1 }, -{"usd", "t,o(b)", 0, (int) M_USD, INSN_MACRO, 0, I3 }, -{"usd", "t,A(b)", 0, (int) M_USD_A, INSN_MACRO, 0, I3 }, -{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO, 0, I1 }, -{"ush", "t,A(b)", 0, (int) M_USH_A, INSN_MACRO, 0, I1 }, -{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO, 0, I1 }, -{"usw", "t,A(b)", 0, (int) M_USW_A, INSN_MACRO, 0, I1 }, +{"uld", "t,A(b)", 0, (int) M_ULD_AB, INSN_MACRO, 0, I3 }, +{"ulh", "t,A(b)", 0, (int) M_ULH_AB, INSN_MACRO, 0, I1 }, +{"ulhu", "t,A(b)", 0, (int) M_ULHU_AB, INSN_MACRO, 0, I1 }, +{"ulw", "t,A(b)", 0, (int) M_ULW_AB, INSN_MACRO, 0, I1 }, +{"usd", "t,A(b)", 0, (int) M_USD_AB, INSN_MACRO, 0, I3 }, +{"ush", "t,A(b)", 0, (int) M_USH_AB, INSN_MACRO, 0, I1 }, +{"usw", "t,A(b)", 0, (int) M_USW_AB, INSN_MACRO, 0, I1 }, {"v3mulu", "d,v,t", 0x70000011, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, {"vmm0", "d,v,t", 0x70000010, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, {"vmulu", "d,v,t", 0x7000000f, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, @@ -2258,52 +2243,36 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sequ", "S,T", 0x4b80000c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, 0, IL2F|IL3A }, /* MIPS Enhanced VA Scheme */ {"lbue", "t,+j(b)", 0x7c000028, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lbue", "t,o(b)", 0, (int) M_LBUE_OB, INSN_MACRO, 0, 0, EVA }, {"lbue", "t,A(b)", 0, (int) M_LBUE_AB, INSN_MACRO, 0, 0, EVA }, {"lhue", "t,+j(b)", 0x7c000029, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lhue", "t,o(b)", 0, (int) M_LHUE_OB, INSN_MACRO, 0, 0, EVA }, {"lhue", "t,A(b)", 0, (int) M_LHUE_AB, INSN_MACRO, 0, 0, EVA }, {"lbe", "t,+j(b)", 0x7c00002c, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lbe", "t,o(b)", 0, (int) M_LBE_OB, INSN_MACRO, 0, 0, EVA }, {"lbe", "t,A(b)", 0, (int) M_LBE_AB, INSN_MACRO, 0, 0, EVA }, {"lhe", "t,+j(b)", 0x7c00002d, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lhe", "t,o(b)", 0, (int) M_LHE_OB, INSN_MACRO, 0, 0, EVA }, {"lhe", "t,A(b)", 0, (int) M_LHE_AB, INSN_MACRO, 0, 0, EVA }, {"lle", "t,+j(b)", 0x7c00002e, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lle", "t,o(b)", 0, (int) M_LLE_OB, INSN_MACRO, 0, 0, EVA }, {"lle", "t,A(b)", 0, (int) M_LLE_AB, INSN_MACRO, 0, 0, EVA }, {"lwe", "t,+j(b)", 0x7c00002f, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lwe", "t,o(b)", 0, (int) M_LWE_OB, INSN_MACRO, 0, 0, EVA }, {"lwe", "t,A(b)", 0, (int) M_LWE_AB, INSN_MACRO, 0, 0, EVA }, {"lwle", "t,+j(b)", 0x7c000019, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lwle", "t,o(b)", 0, (int) M_LWLE_OB, INSN_MACRO, 0, 0, EVA }, {"lwle", "t,A(b)", 0, (int) M_LWLE_AB, INSN_MACRO, 0, 0, EVA }, {"lwre", "t,+j(b)", 0x7c00001a, 0xfc00007f, LDD|RD_b|WR_t, 0, 0, EVA }, -{"lwre", "t,o(b)", 0, (int) M_LWRE_OB, INSN_MACRO, 0, 0, EVA }, {"lwre", "t,A(b)", 0, (int) M_LWRE_AB, INSN_MACRO, 0, 0, EVA }, {"sbe", "t,+j(b)", 0x7c00001c, 0xfc00007f, SM|RD_t|RD_b, 0, 0, EVA }, -{"sbe", "t,o(b)", 0, (int) M_SBE_OB, INSN_MACRO, 0, 0, EVA }, {"sbe", "t,A(b)", 0, (int) M_SBE_AB, INSN_MACRO, 0, 0, EVA }, {"sce", "t,+j(b)", 0x7c00001e, 0xfc00007f, SM|RD_t|WR_t|RD_b, 0, 0, EVA }, -{"sce", "t,o(b)", 0, (int) M_SCE_OB, INSN_MACRO, 0, 0, EVA }, {"sce", "t,A(b)", 0, (int) M_SCE_AB, INSN_MACRO, 0, 0, EVA }, {"she", "t,+j(b)", 0x7c00001d, 0xfc00007f, SM|RD_t|RD_b, 0, 0, EVA }, -{"she", "t,o(b)", 0, (int) M_SHE_OB, INSN_MACRO, 0, 0, EVA }, {"she", "t,A(b)", 0, (int) M_SHE_AB, INSN_MACRO, 0, 0, EVA }, {"swe", "t,+j(b)", 0x7c00001f, 0xfc00007f, SM|RD_t|RD_b, 0, 0, EVA }, -{"swe", "t,o(b)", 0, (int) M_SWE_OB, INSN_MACRO, 0, 0, EVA }, {"swe", "t,A(b)", 0, (int) M_SWE_AB, INSN_MACRO, 0, 0, EVA }, {"swle", "t,+j(b)", 0x7c000021, 0xfc00007f, SM|RD_t|RD_b, 0, 0, EVA }, -{"swle", "t,o(b)", 0, (int) M_SWLE_OB, INSN_MACRO, 0, 0, EVA }, {"swle", "t,A(b)", 0, (int) M_SWLE_AB, INSN_MACRO, 0, 0, EVA }, {"swre", "t,+j(b)", 0x7c000022, 0xfc00007f, SM|RD_t|RD_b, 0, 0, EVA }, -{"swre", "t,o(b)", 0, (int) M_SWRE_OB, INSN_MACRO, 0, 0, EVA }, {"swre", "t,A(b)", 0, (int) M_SWRE_AB, INSN_MACRO, 0, 0, EVA }, {"cachee", "k,+j(b)", 0x7c00001b, 0xfc00007f, RD_b, 0, 0, EVA }, -{"cachee", "k,o(b)", 0, (int) M_CACHEE_OB,INSN_MACRO, 0, 0, EVA }, {"cachee", "k,A(b)", 0, (int) M_CACHEE_AB,INSN_MACRO, 0, 0, EVA }, {"prefe", "k,+j(b)", 0x7c000023, 0xfc00007f, RD_b, 0, 0, EVA }, -{"prefe", "k,o(b)", 0, (int) M_PREFE_OB, INSN_MACRO, 0, 0, EVA }, {"prefe", "k,A(b)", 0, (int) M_PREFE_AB, INSN_MACRO, 0, 0, EVA }, /* No hazard protection on coprocessor instructions--they shouldn't change the state of the processor and if they do it's up to the |