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authorMaciej W. Rozycki <macro@linux-mips.org>2011-08-03 21:09:46 +0000
committerMaciej W. Rozycki <macro@linux-mips.org>2011-08-03 21:09:46 +0000
commit7c176fa823e0c2387e4e7919734afbbd12ba2556 (patch)
tree0a5c627dba8c2a1983b9b75a480a0371725acb61
parent2421fe6f20fb65373bc9c845b7071be25eebe40a (diff)
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* mips.h: Document the use of FP_D in MIPS16 mode. Adjust the
order of flags documented.
-rw-r--r--include/opcode/ChangeLog5
-rw-r--r--include/opcode/mips.h5
2 files changed, 9 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index e7bfecd..b21812e 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2011-08-03 Maciej W. Rozycki <macro@codesourcery.com>
+
+ * mips.h: Document the use of FP_D in MIPS16 mode. Adjust the
+ order of flags documented.
+
2011-07-29 Maciej W. Rozycki <macro@codesourcery.com>
* mips.h: Clarify the description of microMIPS instruction
diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 609a4af..eba7191 100644
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -1315,6 +1315,9 @@ extern int bfd_mips_num_opcodes;
/* The following flags have the same value for the mips16 opcode
table:
+
+ INSN_ISA3
+
INSN_UNCOND_BRANCH_DELAY
INSN_COND_BRANCH_DELAY
INSN_COND_BRANCH_LIKELY (never used)
@@ -1323,7 +1326,7 @@ extern int bfd_mips_num_opcodes;
INSN_WRITE_HI
INSN_WRITE_LO
INSN_TRAP
- INSN_ISA3
+ FP_D (never used)
*/
extern const struct mips_opcode mips16_opcodes[];