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| author | Jan Beulich <jbeulich@suse.com> | 2023-01-11 10:31:43 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-01-11 10:35:54 +0100 |
| commit | ad2021a0f761e23576820aca50a7ac10d7f40bed (patch) | |
| tree | d3c61946bc5b438843286ec1ca73110fe4fbcff6 | |
| parent | 5cf8624d4d7eda0c8434f0f7a7f0bf38a0b6b364 (diff) | |
| download | gdb-ad2021a0f761e23576820aca50a7ac10d7f40bed.zip gdb-ad2021a0f761e23576820aca50a7ac10d7f40bed.tar.gz gdb-ad2021a0f761e23576820aca50a7ac10d7f40bed.tar.bz2 | |
gas/RISC-V: adjust assembler for opcode table re-ordering
PR gas/29940
With the single-operand JAL entry now sitting ahead of the two-operand
one, the parsing of a two-operand insn would first try to parse an 'a'-
style operand, resulting in the insertion of bogus (and otherwise
unused) undefined symbols in the symbol table, having register names.
Since 'a' is used as 1st operand only with J and JAL, and since JAL is
the only insn _also_ allowing for a register as 1st operand (and then
there being a 2nd one), special case this parsing aspect right there.
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
| -rw-r--r-- | gas/config/tc-riscv.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 2dc4176..6793b64 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -3266,6 +3266,17 @@ riscv_ip (char *str, struct riscv_cl_insn *ip, expressionS *imm_expr, continue; case 'a': /* 20-bit PC-relative offset. */ + /* Like in my_getSmallExpression() we need to avoid emitting + a stray undefined symbol if the 1st JAL entry doesn't match, + but the 2nd (with 2 operands) might. */ + if (oparg == insn->args) + { + asargStart = asarg; + if (reg_lookup (&asarg, RCLASS_GPR, NULL) + && (*asarg == ',' || (ISSPACE (*asarg) && asarg[1] == ','))) + break; + asarg = asargStart; + } jump: my_getExpression (imm_expr, asarg); asarg = expr_end; |