From b188ebb19e8447d549511c56da590629b32f733a Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 28 Jul 2005 13:51:18 -0700 Subject: re PR target/17692 (ICE splitting sse conditional move) PR target/17692 * config/i386/i386.c (ix86_split_sse_movcc): Emit DELETED note when expanding to nothing. From-SVN: r102509 --- gcc/ChangeLog | 6 ++++++ gcc/testsuite/gcc.target/i386/pr17692.c | 21 +++++++++++++++++++++ 2 files changed, 27 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr17692.c (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 36ae71b..46d1a4d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-07-28 Richard Henderson + + PR target/17692 + * config/i386/i386.c (ix86_split_sse_movcc): Emit DELETED note + when expanding to nothing. + 2005-07-28 Josh Conner * ipa-inline.c (update_caller_keys): Fix estimated_growth caching. diff --git a/gcc/testsuite/gcc.target/i386/pr17692.c b/gcc/testsuite/gcc.target/i386/pr17692.c new file mode 100644 index 0000000..a837386 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr17692.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O -mfpmath=sse -msse2" } */ +/* The fact that t1 and t2 are uninitialized is critical. With them + uninitialized, the register allocator is free to put them in the same + hard register, which results in + + xmm0 = xmm0 >= xmm0 ? xmm0 : xmm0 + + Which is of course a nop, but one for which we would ICE splitting the + pattern. */ + +double out; + +static void foo(void) +{ + double t1, t2, t3, t4; + + t4 = t1 >= t2 ? t1 : t2; + t4 = t4 >= t3 ? t4 : t3; + out = t4; +} -- cgit v1.1