diff options
Diffstat (limited to 'libgcc')
-rw-r--r-- | libgcc/ChangeLog | 66 | ||||
-rw-r--r-- | libgcc/Makefile.in | 1 | ||||
-rw-r--r-- | libgcc/config.host | 33 | ||||
-rw-r--r-- | libgcc/config/aarch64/cpuinfo.c | 314 | ||||
-rw-r--r-- | libgcc/config/aarch64/t-aarch64 | 2 | ||||
-rw-r--r-- | libgcc/config/libbid/ChangeLog | 23 | ||||
-rw-r--r-- | libgcc/config/loongarch/libgcc-loongarch.ver | 28 | ||||
-rw-r--r-- | libgcc/config/loongarch/t-loongarch | 2 | ||||
-rw-r--r-- | libgcc/config/loongarch/t-softfp-tf | 1 | ||||
-rw-r--r-- | libgcc/config/pru/libgcc-eabi.ver | 6 | ||||
-rw-r--r-- | libgcc/config/pru/pru-softmpy.h | 42 | ||||
-rw-r--r-- | libgcc/config/pru/softmpyi.c | 37 | ||||
-rw-r--r-- | libgcc/config/pru/softmpyll.c | 37 | ||||
-rw-r--r-- | libgcc/config/pru/t-pru | 2 | ||||
-rw-r--r-- | libgcc/config/s390/libgcc-glibc.ver | 14 | ||||
-rw-r--r-- | libgcc/config/s390/sfp-exceptions.c | 61 | ||||
-rw-r--r-- | libgcc/config/s390/sfp-machine.h | 89 | ||||
-rw-r--r-- | libgcc/config/s390/t-softfp | 2 | ||||
-rwxr-xr-x | libgcc/configure | 19 | ||||
-rw-r--r-- | libgcc/configure.ac | 14 | ||||
-rw-r--r-- | libgcc/enable-execute-stack-mprotect.c | 1 |
21 files changed, 545 insertions, 249 deletions
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 055e7ca..23f32f1 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,69 @@ +2025-08-21 Dimitar Dimitrov <dimitar@dinux.eu> + + * config/pru/libgcc-eabi.ver: Add __pruabi_softmpyi and + __pruabi_softmpyll symbols. + * config/pru/t-pru: Add softmpy source files. + * config/pru/pru-softmpy.h: New file. + * config/pru/softmpyi.c: New file. + * config/pru/softmpyll.c: New file. + +2025-08-13 Yang Yujie <yangyujie@loongson.cn> + + PR target/117599 + * config/loongarch/t-softfp-tf: Enable _BitInt helper functions. + * config/loongarch/t-loongarch: Same. + * config/loongarch/libgcc-loongarch.ver: New file. + +2025-08-13 Yang Yujie <yangyujie@loongson.cn> + + * config.host: Remove unused code. Include LoongArch-specific + tmake_files after the OS-specific ones. + +2025-08-08 Christophe Lyon <christophe.lyon@linaro.org> + + PR libgcc/117600 + * Makefile.in (WERROR): New. + * config/aarch64/t-aarch64: Handle WERROR. + * configure: Regenerate. + * configure.ac: Add support for --enable-werror. + +2025-08-07 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * config/s390/libgcc-glibc.ver: Export _BitInt support + functions. + * config/s390/t-softfp (softfp_extras): Add fixtfbitint + floatbitinttf. + +2025-08-07 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org> + + * config.host: Include makefiles t-softfp for -m64. + * config/s390/sfp-exceptions.c: New file. + * config/s390/sfp-machine.h: New file. + * config/s390/t-softfp: New file. + +2025-08-06 Jakub Jelinek <jakub@redhat.com> + + PR libgcc/121397 + * enable-execute-stack-mprotect.c (check_enabling): Remove useless + forward declaration. + +2025-07-31 Wilco Dijkstra <wilco.dijkstra@arm.com> + + * config/aarch64/cpuinfo.c (__init_cpu_features_constructor): + Remove unused features, add support for CSSC and MOPS. + +2025-07-31 Wilco Dijkstra <wilco.dijkstra@arm.com> + + * config/aarch64/cpuinfo.c: Cleanup HWCAP defines. + +2025-07-31 Yury Khrustalev <yury.khrustalev@arm.com> + + * config/aarch64/cpuinfo.c (__ifunc_arg_t): Likewise. + (__init_cpu_features): obtain and assign values for the + fields _hwcap3 and _hwcap4. + (__init_cpu_features_constructor): check _size in the + arg argument. + 2025-07-17 Richard Sandiford <richard.sandiford@arm.com> Yury Khrustalev <yury.khrustalev@arm.com> diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in index f7b48dc..e258f94 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in @@ -87,6 +87,7 @@ CC = @CC@ CFLAGS = @CFLAGS@ RANLIB = @RANLIB@ LN_S = @LN_S@ +WERROR = @WERROR@ PWD_COMMAND = $${PWDCMD-pwd} diff --git a/libgcc/config.host b/libgcc/config.host index d36f0e3..82ea177 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -141,19 +141,6 @@ lm32*-*-*) ;; loongarch*-*) cpu_type=loongarch - tmake_file="loongarch/t-loongarch" - if test "${libgcc_cv_loongarch_hard_float}" = yes; then - tmake_file="${tmake_file} t-hardfp-sfdf t-hardfp" - else - tmake_file="${tmake_file} t-softfp-sfdf" - fi - if test "${ac_cv_sizeof_long_double}" = 16; then - tmake_file="${tmake_file} loongarch/t-softfp-tf" - fi - if test "${host_address}" = 64; then - tmake_file="${tmake_file} loongarch/t-loongarch64" - fi - tmake_file="${tmake_file} t-softfp" ;; m32r*-*-*) cpu_type=m32r @@ -1003,16 +990,22 @@ lm32-*-uclinux*) ;; loongarch*-linux*) extra_parts="$extra_parts crtfastmath.o" - tmake_file="${tmake_file} t-crtfm loongarch/t-crtstuff" - case ${host} in - *) - tmake_file="${tmake_file} t-slibgcc-libgcc" - ;; - esac md_unwind_header=loongarch/linux-unwind.h + tmake_file="${tmake_file} loongarch/t-loongarch t-softfp-sfdf loongarch/t-softfp-tf" + if test "${host_address}" = 64; then + tmake_file="${tmake_file} loongarch/t-loongarch64" + fi + tmake_file="${tmake_file} t-softfp" + tmake_file="${tmake_file} t-crtfm loongarch/t-crtstuff" + tmake_file="${tmake_file} t-slibgcc-libgcc" ;; loongarch*-elf*) extra_parts="$extra_parts crtfastmath.o" + tmake_file="${tmake_file} loongarch/t-loongarch t-softfp-sfdf loongarch/t-softfp-tf" + if test "${host_address}" = 64; then + tmake_file="${tmake_file} loongarch/t-loongarch64" + fi + tmake_file="${tmake_file} t-softfp" tmake_file="${tmake_file} t-crtfm loongarch/t-crtstuff" tmake_file="${tmake_file} t-slibgcc-libgcc" ;; @@ -1397,6 +1390,8 @@ s390x-*-linux*) tmake_file="${tmake_file} s390/t-crtstuff s390/t-linux t-stack s390/t-stack-s390" if test "${host_address}" = 32; then tmake_file="${tmake_file} s390/32/t-floattodi" + else + tmake_file="${tmake_file} s390/t-softfp t-softfp" fi md_unwind_header=s390/linux-unwind.h ;; diff --git a/libgcc/config/aarch64/cpuinfo.c b/libgcc/config/aarch64/cpuinfo.c index dda9dc6..f8c10037 100644 --- a/libgcc/config/aarch64/cpuinfo.c +++ b/libgcc/config/aarch64/cpuinfo.c @@ -27,18 +27,18 @@ #if __has_include(<sys/auxv.h>) #include <sys/auxv.h> -#if __has_include(<sys/ifunc.h>) -#include <sys/ifunc.h> -#else +/* The following struct is ABI-correct description of the 2nd argument for an + ifunc resolver as per SYSVABI spec (see link below). It is safe to extend + it with new fields. The ifunc resolver implementations must always check + the runtime size of the buffer using the value in the _size field. + https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst. */ typedef struct __ifunc_arg_t { unsigned long _size; unsigned long _hwcap; unsigned long _hwcap2; + unsigned long _hwcap3; + unsigned long _hwcap4; } __ifunc_arg_t; -#endif - -#if __has_include(<asm/hwcap.h>) -#include <asm/hwcap.h> /* Architecture features used in Function Multi Versioning. */ struct { @@ -46,196 +46,64 @@ struct { /* As features grows new fields could be added. */ } __aarch64_cpu_features __attribute__((visibility("hidden"), nocommon)); -#ifndef _IFUNC_ARG_HWCAP #define _IFUNC_ARG_HWCAP (1ULL << 62) -#endif -#ifndef AT_HWCAP #define AT_HWCAP 16 -#endif -#ifndef HWCAP_FP -#define HWCAP_FP (1 << 0) -#endif -#ifndef HWCAP_ASIMD -#define HWCAP_ASIMD (1 << 1) -#endif -#ifndef HWCAP_EVTSTRM -#define HWCAP_EVTSTRM (1 << 2) -#endif -#ifndef HWCAP_AES -#define HWCAP_AES (1 << 3) -#endif -#ifndef HWCAP_PMULL -#define HWCAP_PMULL (1 << 4) -#endif -#ifndef HWCAP_SHA1 -#define HWCAP_SHA1 (1 << 5) -#endif -#ifndef HWCAP_SHA2 -#define HWCAP_SHA2 (1 << 6) -#endif -#ifndef HWCAP_CRC32 -#define HWCAP_CRC32 (1 << 7) -#endif -#ifndef HWCAP_ATOMICS -#define HWCAP_ATOMICS (1 << 8) -#endif -#ifndef HWCAP_FPHP -#define HWCAP_FPHP (1 << 9) -#endif -#ifndef HWCAP_ASIMDHP -#define HWCAP_ASIMDHP (1 << 10) -#endif -#ifndef HWCAP_CPUID -#define HWCAP_CPUID (1 << 11) -#endif -#ifndef HWCAP_ASIMDRDM -#define HWCAP_ASIMDRDM (1 << 12) -#endif -#ifndef HWCAP_JSCVT -#define HWCAP_JSCVT (1 << 13) -#endif -#ifndef HWCAP_FCMA -#define HWCAP_FCMA (1 << 14) -#endif -#ifndef HWCAP_LRCPC -#define HWCAP_LRCPC (1 << 15) -#endif -#ifndef HWCAP_DCPOP -#define HWCAP_DCPOP (1 << 16) -#endif -#ifndef HWCAP_SHA3 -#define HWCAP_SHA3 (1 << 17) -#endif -#ifndef HWCAP_SM3 -#define HWCAP_SM3 (1 << 18) -#endif -#ifndef HWCAP_SM4 -#define HWCAP_SM4 (1 << 19) -#endif -#ifndef HWCAP_ASIMDDP -#define HWCAP_ASIMDDP (1 << 20) -#endif -#ifndef HWCAP_SHA512 -#define HWCAP_SHA512 (1 << 21) -#endif -#ifndef HWCAP_SVE -#define HWCAP_SVE (1 << 22) -#endif -#ifndef HWCAP_ASIMDFHM -#define HWCAP_ASIMDFHM (1 << 23) -#endif -#ifndef HWCAP_DIT -#define HWCAP_DIT (1 << 24) -#endif -#ifndef HWCAP_ILRCPC -#define HWCAP_ILRCPC (1 << 26) -#endif -#ifndef HWCAP_FLAGM -#define HWCAP_FLAGM (1 << 27) -#endif -#ifndef HWCAP_SSBS -#define HWCAP_SSBS (1 << 28) -#endif -#ifndef HWCAP_SB -#define HWCAP_SB (1 << 29) -#endif -#ifndef HWCAP_PACA -#define HWCAP_PACA (1 << 30) -#endif -#ifndef HWCAP_PACG -#define HWCAP_PACG (1UL << 31) -#endif - -#ifndef AT_HWCAP2 #define AT_HWCAP2 26 -#endif -#ifndef HWCAP2_DCPODP -#define HWCAP2_DCPODP (1 << 0) -#endif -#ifndef HWCAP2_SVE2 -#define HWCAP2_SVE2 (1 << 1) -#endif -#ifndef HWCAP2_SVEAES -#define HWCAP2_SVEAES (1 << 2) -#endif -#ifndef HWCAP2_SVEPMULL -#define HWCAP2_SVEPMULL (1 << 3) -#endif -#ifndef HWCAP2_SVEBITPERM -#define HWCAP2_SVEBITPERM (1 << 4) -#endif -#ifndef HWCAP2_SVESHA3 -#define HWCAP2_SVESHA3 (1 << 5) -#endif -#ifndef HWCAP2_SVESM4 -#define HWCAP2_SVESM4 (1 << 6) -#endif -#ifndef HWCAP2_FLAGM2 -#define HWCAP2_FLAGM2 (1 << 7) -#endif -#ifndef HWCAP2_FRINT -#define HWCAP2_FRINT (1 << 8) -#endif -#ifndef HWCAP2_SVEI8MM -#define HWCAP2_SVEI8MM (1 << 9) -#endif -#ifndef HWCAP2_SVEF32MM -#define HWCAP2_SVEF32MM (1 << 10) -#endif -#ifndef HWCAP2_SVEF64MM -#define HWCAP2_SVEF64MM (1 << 11) -#endif -#ifndef HWCAP2_SVEBF16 -#define HWCAP2_SVEBF16 (1 << 12) -#endif -#ifndef HWCAP2_I8MM -#define HWCAP2_I8MM (1 << 13) -#endif -#ifndef HWCAP2_BF16 -#define HWCAP2_BF16 (1 << 14) -#endif -#ifndef HWCAP2_DGH -#define HWCAP2_DGH (1 << 15) -#endif -#ifndef HWCAP2_RNG -#define HWCAP2_RNG (1 << 16) -#endif -#ifndef HWCAP2_BTI -#define HWCAP2_BTI (1 << 17) -#endif -#ifndef HWCAP2_MTE -#define HWCAP2_MTE (1 << 18) -#endif -#ifndef HWCAP2_RPRES -#define HWCAP2_RPRES (1 << 21) -#endif -#ifndef HWCAP2_MTE3 -#define HWCAP2_MTE3 (1 << 22) -#endif -#ifndef HWCAP2_SME -#define HWCAP2_SME (1 << 23) -#endif -#ifndef HWCAP2_SME_I16I64 -#define HWCAP2_SME_I16I64 (1 << 24) -#endif -#ifndef HWCAP2_SME_F64F64 -#define HWCAP2_SME_F64F64 (1 << 25) -#endif -#ifndef HWCAP2_WFXT -#define HWCAP2_WFXT (1UL << 31) -#endif -#ifndef HWCAP2_EBF16 -#define HWCAP2_EBF16 (1UL << 32) -#endif -#ifndef HWCAP2_SVE_EBF16 -#define HWCAP2_SVE_EBF16 (1UL << 33) -#endif -#ifndef HWCAP2_SME2 -#define HWCAP2_SME2 (1UL << 37) -#endif -#ifndef HWCAP2_LRCPC3 -#define HWCAP2_LRCPC3 (1UL << 46) -#endif +#define AT_HWCAP3 29 +#define AT_HWCAP4 30 + +#define HWCAP_FP (1 << 0) +#define HWCAP_ASIMD (1 << 1) +#define HWCAP_PMULL (1 << 4) +#define HWCAP_SHA2 (1 << 6) +#define HWCAP_CRC32 (1 << 7) +#define HWCAP_ATOMICS (1 << 8) +#define HWCAP_FPHP (1 << 9) +#define HWCAP_ASIMDHP (1 << 10) +#define HWCAP_ASIMDRDM (1 << 12) +#define HWCAP_JSCVT (1 << 13) +#define HWCAP_FCMA (1 << 14) +#define HWCAP_LRCPC (1 << 15) +#define HWCAP_DCPOP (1 << 16) +#define HWCAP_SHA3 (1 << 17) +#define HWCAP_SM3 (1 << 18) +#define HWCAP_SM4 (1 << 19) +#define HWCAP_ASIMDDP (1 << 20) +#define HWCAP_SVE (1 << 22) +#define HWCAP_ASIMDFHM (1 << 23) +#define HWCAP_DIT (1 << 24) +#define HWCAP_ILRCPC (1 << 26) +#define HWCAP_FLAGM (1 << 27) +#define HWCAP_SSBS (1 << 28) +#define HWCAP_SB (1 << 29) + +#define HWCAP2_DCPODP (1 << 0) +#define HWCAP2_SVE2 (1 << 1) +#define HWCAP2_SVEPMULL (1 << 3) +#define HWCAP2_SVEBITPERM (1 << 4) +#define HWCAP2_SVESHA3 (1 << 5) +#define HWCAP2_SVESM4 (1 << 6) +#define HWCAP2_FLAGM2 (1 << 7) +#define HWCAP2_FRINT (1 << 8) +#define HWCAP2_SVEF32MM (1 << 10) +#define HWCAP2_SVEF64MM (1 << 11) +#define HWCAP2_I8MM (1 << 13) +#define HWCAP2_BF16 (1 << 14) +#define HWCAP2_RNG (1 << 16) +#define HWCAP2_BTI (1 << 17) +#define HWCAP2_MTE (1 << 18) +#define HWCAP2_SME (1 << 23) +#define HWCAP2_SME_I16I64 (1 << 24) +#define HWCAP2_SME_F64F64 (1 << 25) +#define HWCAP2_WFXT (1UL << 31) +#define HWCAP2_CSSC (1UL << 34) +#define HWCAP2_SME2 (1UL << 37) +#define HWCAP2_MOPS (1UL << 43) +#define HWCAP2_LRCPC3 (1UL << 46) + +#define __IFUNC_ARG_SIZE_HWCAP2 (sizeof (unsigned long) * 3) +#define __IFUNC_ARG_SIZE_HWCAP3 (sizeof (unsigned long) * 4) +#define __IFUNC_ARG_SIZE_HWCAP4 (sizeof (unsigned long) * 5) static void __init_cpu_features_constructor (unsigned long hwcap, @@ -247,8 +115,14 @@ __init_cpu_features_constructor (unsigned long hwcap, #define extractBits(val, start, number) \ (val & ((1UL << number) - 1UL) << start) >> start unsigned long hwcap2 = 0; - if (hwcap & _IFUNC_ARG_HWCAP) + if ((hwcap & _IFUNC_ARG_HWCAP) && arg->_size >= __IFUNC_ARG_SIZE_HWCAP2) hwcap2 = arg->_hwcap2; + unsigned long hwcap3 __attribute__ ((unused)) = 0; + if ((hwcap & _IFUNC_ARG_HWCAP) && arg->_size >= __IFUNC_ARG_SIZE_HWCAP3) + hwcap3 = arg->_hwcap3; + unsigned long hwcap4 __attribute__ ((unused)) = 0; + if ((hwcap & _IFUNC_ARG_HWCAP) && arg->_size >= __IFUNC_ARG_SIZE_HWCAP4) + hwcap4 = arg->_hwcap4; if (hwcap & HWCAP_CRC32) setCPUFeature(FEAT_CRC); if (hwcap & HWCAP_PMULL) @@ -269,10 +143,6 @@ __init_cpu_features_constructor (unsigned long hwcap, setCPUFeature(FEAT_DIT); if (hwcap & HWCAP_ASIMDRDM) setCPUFeature(FEAT_RDM); - if (hwcap & HWCAP_AES) - setCPUFeature(FEAT_AES); - if (hwcap & HWCAP_SHA1) - setCPUFeature(FEAT_SHA1); if (hwcap & HWCAP_SHA2) setCPUFeature(FEAT_SHA2); if (hwcap & HWCAP_JSCVT) @@ -282,19 +152,9 @@ __init_cpu_features_constructor (unsigned long hwcap, if (hwcap & HWCAP_SB) setCPUFeature(FEAT_SB); if (hwcap & HWCAP_SSBS) - { - setCPUFeature(FEAT_SSBS); - setCPUFeature(FEAT_SSBS2); - } + setCPUFeature(FEAT_SSBS2); if (hwcap2 & HWCAP2_MTE) - { - setCPUFeature(FEAT_MEMTAG); - setCPUFeature(FEAT_MEMTAG2); - } - if (hwcap2 & HWCAP2_MTE3) - setCPUFeature(FEAT_MEMTAG3); - if (hwcap2 & HWCAP2_SVEAES) - setCPUFeature(FEAT_SVE_AES); + setCPUFeature(FEAT_MEMTAG2); if (hwcap2 & HWCAP2_SVEPMULL) setCPUFeature(FEAT_SVE_PMULL128); if (hwcap2 & HWCAP2_SVEBITPERM) @@ -311,24 +171,14 @@ __init_cpu_features_constructor (unsigned long hwcap, setCPUFeature(FEAT_RNG); if (hwcap2 & HWCAP2_I8MM) setCPUFeature(FEAT_I8MM); - if (hwcap2 & HWCAP2_EBF16) - setCPUFeature(FEAT_EBF16); - if (hwcap2 & HWCAP2_SVE_EBF16) - setCPUFeature(FEAT_SVE_EBF16); - if (hwcap2 & HWCAP2_DGH) - setCPUFeature(FEAT_DGH); if (hwcap2 & HWCAP2_FRINT) setCPUFeature(FEAT_FRINTTS); - if (hwcap2 & HWCAP2_SVEI8MM) - setCPUFeature(FEAT_SVE_I8MM); if (hwcap2 & HWCAP2_SVEF32MM) setCPUFeature(FEAT_SVE_F32MM); if (hwcap2 & HWCAP2_SVEF64MM) setCPUFeature(FEAT_SVE_F64MM); if (hwcap2 & HWCAP2_BTI) setCPUFeature(FEAT_BTI); - if (hwcap2 & HWCAP2_RPRES) - setCPUFeature(FEAT_RPRES); if (hwcap2 & HWCAP2_WFXT) setCPUFeature(FEAT_WFXT); if (hwcap2 & HWCAP2_SME) @@ -339,6 +189,10 @@ __init_cpu_features_constructor (unsigned long hwcap, setCPUFeature(FEAT_SME_I64); if (hwcap2 & HWCAP2_SME_F64F64) setCPUFeature(FEAT_SME_F64); + if (hwcap2 & HWCAP2_MOPS) + setCPUFeature(FEAT_MOPS); + if (hwcap2 & HWCAP2_CSSC) + setCPUFeature(FEAT_CSSC); if (hwcap & HWCAP_FP) { setCPUFeature(FEAT_FP); @@ -355,8 +209,6 @@ __init_cpu_features_constructor (unsigned long hwcap, setCPUFeature(FEAT_RCPC3); if (hwcap2 & HWCAP2_BF16) setCPUFeature(FEAT_BF16); - if (hwcap2 & HWCAP2_SVEBF16) - setCPUFeature(FEAT_SVE_BF16); if (hwcap & HWCAP_SVE) setCPUFeature(FEAT_SVE); if (hwcap2 & HWCAP2_SVE2) @@ -383,20 +235,26 @@ __init_cpu_features(void) { unsigned long hwcap; unsigned long hwcap2; + unsigned long hwcap3; + unsigned long hwcap4; /* CPU features already initialized. */ if (__atomic_load_n (&__aarch64_cpu_features.features, __ATOMIC_RELAXED)) return; - hwcap = getauxval(AT_HWCAP); - hwcap2 = getauxval(AT_HWCAP2); + hwcap = getauxval (AT_HWCAP); + hwcap2 = getauxval (AT_HWCAP2); + hwcap3 = getauxval (AT_HWCAP3); + hwcap4 = getauxval (AT_HWCAP4); + __ifunc_arg_t arg; - arg._size = sizeof(__ifunc_arg_t); + arg._size = sizeof (__ifunc_arg_t); arg._hwcap = hwcap; arg._hwcap2 = hwcap2; - __init_cpu_features_constructor(hwcap | _IFUNC_ARG_HWCAP, &arg); + arg._hwcap3 = hwcap3; + arg._hwcap4 = hwcap4; + __init_cpu_features_constructor (hwcap | _IFUNC_ARG_HWCAP, &arg); #undef extractBits #undef getCPUFeature #undef setCPUFeature } -#endif /* __has_include(<asm/hwcap.h>) */ #endif /* __has_include(<sys/auxv.h>) */ diff --git a/libgcc/config/aarch64/t-aarch64 b/libgcc/config/aarch64/t-aarch64 index d4c5922..c7d83c7 100644 --- a/libgcc/config/aarch64/t-aarch64 +++ b/libgcc/config/aarch64/t-aarch64 @@ -30,4 +30,4 @@ LIB2ADDEH += \ $(srcdir)/config/aarch64/__arm_za_disable.S SHLIB_MAPFILES += $(srcdir)/config/aarch64/libgcc-sme.ver -LIBGCC2_CFLAGS += -Werror -Wno-prio-ctor-dtor +LIBGCC2_CFLAGS += $(WERROR) -Wno-prio-ctor-dtor diff --git a/libgcc/config/libbid/ChangeLog b/libgcc/config/libbid/ChangeLog index fd82d6e..e672736 100644 --- a/libgcc/config/libbid/ChangeLog +++ b/libgcc/config/libbid/ChangeLog @@ -1,3 +1,26 @@ +2025-08-30 liuhongt <hongtao.liu@intel.com> + + Revert: + 2025-08-29 liuhongt <hongtao.liu@intel.com> + + PR target/120691 + * bid128_div.c: Fix _Decimal128 arithmetic error under + FE_UPWARD. + * bid128_rem.c: Ditto. + * bid128_sqrt.c: Ditto. + * bid64_div.c (bid64_div): Ditto. + * bid64_sqrt.c (bid64_sqrt): Ditto. + +2025-08-29 liuhongt <hongtao.liu@intel.com> + + PR target/120691 + * bid128_div.c: Fix _Decimal128 arithmetic error under + FE_UPWARD. + * bid128_rem.c: Ditto. + * bid128_sqrt.c: Ditto. + * bid64_div.c (bid64_div): Ditto. + * bid64_sqrt.c (bid64_sqrt): Ditto. + 2025-07-15 Andrew Pinski <quic_apinski@quicinc.com> * bid_binarydecimal.c (__mul_10x256_to_256): Mark c3 as being diff --git a/libgcc/config/loongarch/libgcc-loongarch.ver b/libgcc/config/loongarch/libgcc-loongarch.ver new file mode 100644 index 0000000..0a71f2e --- /dev/null +++ b/libgcc/config/loongarch/libgcc-loongarch.ver @@ -0,0 +1,28 @@ +# Copyright (C) 2025 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# <http://www.gnu.org/licenses/>. + +GCC_16.0.0 { + __mulbitint3 + __divmodbitint4 + __fixsfbitint + __fixdfbitint + __fixtfbitint + __floatbitintsf + __floatbitintdf + __floatbitinttf +} diff --git a/libgcc/config/loongarch/t-loongarch b/libgcc/config/loongarch/t-loongarch index 2a7dbf6..b9374fc 100644 --- a/libgcc/config/loongarch/t-loongarch +++ b/libgcc/config/loongarch/t-loongarch @@ -5,3 +5,5 @@ softfp_int_modes := si di softfp_extensions := softfp_truncations := softfp_exclude_libgcc2 := n + +SHLIB_MAPFILES += $(srcdir)/config/loongarch/libgcc-loongarch.ver diff --git a/libgcc/config/loongarch/t-softfp-tf b/libgcc/config/loongarch/t-softfp-tf index 306677b..be2b730 100644 --- a/libgcc/config/loongarch/t-softfp-tf +++ b/libgcc/config/loongarch/t-softfp-tf @@ -1,3 +1,4 @@ softfp_float_modes += tf softfp_extensions += sftf dftf softfp_truncations += tfsf tfdf +softfp_extras += floatbitinttf fixtfbitint diff --git a/libgcc/config/pru/libgcc-eabi.ver b/libgcc/config/pru/libgcc-eabi.ver index e8f7fe2..ded8e73 100644 --- a/libgcc/config/pru/libgcc-eabi.ver +++ b/libgcc/config/pru/libgcc-eabi.ver @@ -86,3 +86,9 @@ GCC_9.0.0 { __gnu_eqsf2 __gnu_eqdf2 } + +%inherit GCC_16.0.0 GCC_9.0.0 +GCC_16.0.0 { + __pruabi_softmpyi + __pruabi_softmpyll +} diff --git a/libgcc/config/pru/pru-softmpy.h b/libgcc/config/pru/pru-softmpy.h new file mode 100644 index 0000000..9f46e6c --- /dev/null +++ b/libgcc/config/pru/pru-softmpy.h @@ -0,0 +1,42 @@ +/* libgcc routines for PRU. + Copyright (C) 2025 Free Software Foundation, Inc. + Based on rl78/rl78-mul.h. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +UINT_TYPE C2(__pruabi_softmpy,NAME_MODE) (UINT_TYPE, UINT_TYPE); +UINT_TYPE +C2(__pruabi_softmpy,NAME_MODE) (UINT_TYPE a, UINT_TYPE b) +{ + UINT_TYPE rv = 0; + + unsigned char bit; + + for (bit=0; b && bit<sizeof(UINT_TYPE)*8; bit++) + { + if (b & 1) + rv += a; + a <<= 1; + b >>= 1; + } + return rv; +} diff --git a/libgcc/config/pru/softmpyi.c b/libgcc/config/pru/softmpyi.c new file mode 100644 index 0000000..fa9f0db --- /dev/null +++ b/libgcc/config/pru/softmpyi.c @@ -0,0 +1,37 @@ +/* libgcc routines for PRU + Copyright (C) 2025 Free Software Foundation, Inc. + Based on rl78/lib2mul.c + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef unsigned int uint32_type __attribute__ ((mode (SI))); + +#define C2B(a,b) a##b +#define C2(a,b) C2B(a,b) + +#undef UINT_TYPE +#undef NAME_MODE + +#define UINT_TYPE uint32_type +#define NAME_MODE i + +#include "pru-softmpy.h" diff --git a/libgcc/config/pru/softmpyll.c b/libgcc/config/pru/softmpyll.c new file mode 100644 index 0000000..8eedc25 --- /dev/null +++ b/libgcc/config/pru/softmpyll.c @@ -0,0 +1,37 @@ +/* libgcc routines for PRU + Copyright (C) 2025 Free Software Foundation, Inc. + Based on rl78/lib2mul.c + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published + by the Free Software Foundation; either version 3, or (at your + option) any later version. + + GCC is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +typedef unsigned int uint64_type __attribute__ ((mode (DI))); + +#define C2B(a,b) a##b +#define C2(a,b) C2B(a,b) + +#undef UINT_TYPE +#undef NAME_MODE + +#define UINT_TYPE uint64_type +#define NAME_MODE ll + +#include "pru-softmpy.h" diff --git a/libgcc/config/pru/t-pru b/libgcc/config/pru/t-pru index e844e79..7554411 100644 --- a/libgcc/config/pru/t-pru +++ b/libgcc/config/pru/t-pru @@ -28,6 +28,8 @@ LIB2ADD += \ $(srcdir)/config/pru/lib2divSI.c \ $(srcdir)/config/pru/lib2bitcountHI.c \ $(srcdir)/config/pru/mpyll.S \ + $(srcdir)/config/pru/softmpyll.c \ + $(srcdir)/config/pru/softmpyi.c \ $(srcdir)/config/pru/gef.c \ $(srcdir)/config/pru/gtf.c \ $(srcdir)/config/pru/lef.c \ diff --git a/libgcc/config/s390/libgcc-glibc.ver b/libgcc/config/s390/libgcc-glibc.ver index 86c55a0..00375b3 100644 --- a/libgcc/config/s390/libgcc-glibc.ver +++ b/libgcc/config/s390/libgcc-glibc.ver @@ -114,3 +114,17 @@ GCC_4.1.0 { __floatditf %endif } + +%ifdef __s390x__ +%inherit GCC_16.0.0 GCC_4.1.0 +GCC_16.0.0 { + __mulbitint3 + __divmodbitint4 + __fixsfbitint + __fixdfbitint + __fixtfbitint + __floatbitintsf + __floatbitintdf + __floatbitinttf +} +%endif diff --git a/libgcc/config/s390/sfp-exceptions.c b/libgcc/config/s390/sfp-exceptions.c new file mode 100644 index 0000000..a2fc5dd --- /dev/null +++ b/libgcc/config/s390/sfp-exceptions.c @@ -0,0 +1,61 @@ +/* Copyright (C) 2001-2025 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#include "sfp-machine.h" + +#define __math_force_eval_div(x, y) \ + do { asm ("" : "+f" (x)); asm volatile ("" : : "f" (x / y)); } while (0) + +void +__sfp_handle_exceptions (int _fex) +{ + if (_fex & FP_EX_INVALID) + { + float x = 0.0f; + __math_force_eval_div (x, x); + } + if (_fex & FP_EX_DIVZERO) + { + float x = 1.0f; + float y = 0.0f; + __math_force_eval_div (x, y); + } + if (_fex & FP_EX_OVERFLOW) + { + float x = __FLT_MAX__; + asm ("" : "+f" (x)); + asm volatile ("" : : "f" (x + x)); + } + if (_fex & FP_EX_UNDERFLOW) + { + float x = __FLT_MIN__; + asm ("" : "+f" (x)); + asm volatile ("" : : "f" (x * x)); + } + if (_fex & FP_EX_INEXACT) + { + float x = 1.0f; + float y = 3.0f; + __math_force_eval_div (x, y); + } +} diff --git a/libgcc/config/s390/sfp-machine.h b/libgcc/config/s390/sfp-machine.h new file mode 100644 index 0000000..960bad7 --- /dev/null +++ b/libgcc/config/s390/sfp-machine.h @@ -0,0 +1,89 @@ +/* Copyright (C) 2001-2025 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + <http://www.gnu.org/licenses/>. */ + +#if ! __s390x__ +# error "soft-fp implemented for s390x only" +#endif + +#define _FP_W_TYPE_SIZE 64 +#define _FP_W_TYPE unsigned long long +#define _FP_WS_TYPE signed long long +#define _FP_I_TYPE long long + +typedef int TItype __attribute__ ((mode (TI))); +typedef unsigned int UTItype __attribute__ ((mode (TI))); +#define TI_BITS (__CHAR_BIT__ * (int) sizeof (TItype)) + +#define _FP_NANFRAC_H ((_FP_QNANBIT_H << 1) - 1) +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 + +#define _FP_NANSIGN_H 0 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 +#define _FP_QNANNEGATEDP 0 + +#define FP_EX_INVALID 0x01 +#define FP_EX_DIVZERO 0x02 +#define FP_EX_OVERFLOW 0x04 +#define FP_EX_UNDERFLOW 0x08 +#define FP_EX_INEXACT 0x10 +#define FP_EX_ALL \ + (FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW \ + | FP_EX_UNDERFLOW | FP_EX_INEXACT) + +void __sfp_handle_exceptions (int); + +#define FP_HANDLE_EXCEPTIONS \ + do { \ + if (__builtin_expect (_fex, 0)) \ + __sfp_handle_exceptions (_fex); \ + } while (0) + +#define _FP_TININESS_AFTER_ROUNDING 0 + +#define FP_RND_NEAREST 0x0 +#define FP_RND_ZERO 0x1 +#define FP_RND_PINF 0x2 +#define FP_RND_MINF 0x3 +#define FP_RND_MASK 0x3 + +#define _FP_DECL_EX \ + unsigned int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST + +#define FP_INIT_ROUNDMODE \ + do { \ + __asm__ __volatile__ ("stfpc %0" \ + : "=m" (_fpcr)); \ + } while (0) + +#define FP_ROUNDMODE (_fpcr & FP_RND_MASK) + +#define __LITTLE_ENDIAN 1234 +#define __BIG_ENDIAN 4321 + +#define __BYTE_ORDER __BIG_ENDIAN diff --git a/libgcc/config/s390/t-softfp b/libgcc/config/s390/t-softfp new file mode 100644 index 0000000..724b15e --- /dev/null +++ b/libgcc/config/s390/t-softfp @@ -0,0 +1,2 @@ +LIB2ADD += $(srcdir)/config/s390/sfp-exceptions.c +softfp_extras := fixtfbitint floatbitinttf diff --git a/libgcc/configure b/libgcc/configure index 1841833..d5e80d2 100755 --- a/libgcc/configure +++ b/libgcc/configure @@ -586,6 +586,7 @@ ac_unique_file="static-object.mk" ac_includes_default='/* none */' ac_subst_vars='LTLIBOBJS LIBOBJS +WERROR md_unwind_header md_unwind_def_header unwind_header @@ -720,6 +721,7 @@ enable_tm_clone_registry with_glibc_version enable_tls with_gcc_major_version_only +enable_werror ' ac_precious_vars='build_alias host_alias @@ -1362,6 +1364,7 @@ Optional Features: installations without PT_GNU_EH_FRAME support --disable-tm-clone-registry disable TM clone registry --enable-tls Use thread-local storage [default=yes] + --enable-werror build with -Werror for selected targets Optional Packages: --with-PACKAGE[=ARG] use PACKAGE [ARG=yes] @@ -5789,6 +5792,22 @@ fi +# Check whether --enable-werror was given. +if test "${enable_werror+set}" = set; then : + enableval=$enable_werror; +case ${enable_werror} in + no) WERROR="" ;; + *) WERROR="-Werror" ;; +esac + +else + +WERROR="-Werror" + +fi + + + # We need multilib support. ac_config_files="$ac_config_files Makefile" diff --git a/libgcc/configure.ac b/libgcc/configure.ac index 85e4f1b..65cd3c6 100644 --- a/libgcc/configure.ac +++ b/libgcc/configure.ac @@ -733,6 +733,20 @@ AC_SUBST(md_unwind_header) AC_SUBST(sfp_machine_header) AC_SUBST(thread_header) +AC_ARG_ENABLE(werror, +[AS_HELP_STRING([--enable-werror], + [build with -Werror for selected targets])], +[ +case ${enable_werror} in + no) WERROR="" ;; + *) WERROR="-Werror" ;; +esac +], +[ +WERROR="-Werror" +]) +AC_SUBST(WERROR) + # We need multilib support. AC_CONFIG_FILES([Makefile]) AC_CONFIG_COMMANDS([default], diff --git a/libgcc/enable-execute-stack-mprotect.c b/libgcc/enable-execute-stack-mprotect.c index 08a0d72..7971efb 100644 --- a/libgcc/enable-execute-stack-mprotect.c +++ b/libgcc/enable-execute-stack-mprotect.c @@ -30,7 +30,6 @@ static int need_enable_exec_stack; -static void check_enabling (void) __attribute__ ((unused)); extern void __enable_execute_stack (void *); #if defined __sun__ && defined __svr4__ |