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| author | Andrew Stubbs <ams@codesourcery.com> | 2023-04-18 12:03:43 +0100 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2023-04-21 12:22:14 +0100 |
| commit | 7deab8f87364ac981b2ee58108db7df48de185cc (patch) | |
| tree | bebec0a22eef45c1f0c4e3017ba16baa357b2f92 /gcc | |
| parent | c4116975a5d396f3503b86c0c8cbfe6fffcb146b (diff) | |
| download | gcc-7deab8f87364ac981b2ee58108db7df48de185cc.zip gcc-7deab8f87364ac981b2ee58108db7df48de185cc.tar.gz gcc-7deab8f87364ac981b2ee58108db7df48de185cc.tar.bz2 | |
amdgcn: update target-supports.exp
The backend can now vectorize more things.
gcc/testsuite/ChangeLog:
* lib/target-supports.exp
(check_effective_target_vect_call_copysignf): Add amdgcn.
(check_effective_target_vect_call_sqrtf): Add amdgcn.
(check_effective_target_vect_call_ceilf): Add amdgcn.
(check_effective_target_vect_call_floor): Add amdgcn.
(check_effective_target_vect_logical_reduc): Add amdgcn.
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog.omp | 12 | ||||
| -rw-r--r-- | gcc/testsuite/lib/target-supports.exp | 15 |
2 files changed, 22 insertions, 5 deletions
diff --git a/gcc/testsuite/ChangeLog.omp b/gcc/testsuite/ChangeLog.omp index 16fe6f4..1a1bd6a 100644 --- a/gcc/testsuite/ChangeLog.omp +++ b/gcc/testsuite/ChangeLog.omp @@ -1,3 +1,15 @@ +2023-04-21 Andrew Stubbs <ams@codesourcery.com> + + Backport from mainline: + Andrew Stubbs <ams@codesourcery.com> + + * lib/target-supports.exp + (check_effective_target_vect_call_copysignf): Add amdgcn. + (check_effective_target_vect_call_sqrtf): Add amdgcn. + (check_effective_target_vect_call_ceilf): Add amdgcn. + (check_effective_target_vect_call_floor): Add amdgcn. + (check_effective_target_vect_logical_reduc): Add amdgcn. + 2023-04-20 Andrew Stubbs <ams@codesourcery.com> Backport from mainline: diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index d64818a0..d262f58 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8370,7 +8370,8 @@ proc check_effective_target_vect_call_copysignf { } { return [check_cached_effective_target_indexed vect_call_copysignf { expr { [istarget i?86-*-*] || [istarget x86_64-*-*] || [istarget powerpc*-*-*] - || [istarget aarch64*-*-*] }}] + || [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports hardware square root instructions. @@ -8406,7 +8407,8 @@ proc check_effective_target_vect_call_sqrtf { } { || [istarget i?86-*-*] || [istarget x86_64-*-*] || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) || ([istarget s390*-*-*] - && [check_effective_target_s390_vx]) }}] + && [check_effective_target_s390_vx]) + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector lrint calls. @@ -8451,14 +8453,16 @@ proc check_effective_target_vect_call_ceil { } { proc check_effective_target_vect_call_ceilf { } { return [check_cached_effective_target_indexed vect_call_ceilf { - expr { [istarget aarch64*-*-*] }}] + expr { [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector floor calls. proc check_effective_target_vect_call_floor { } { return [check_cached_effective_target_indexed vect_call_floor { - expr { [istarget aarch64*-*-*] }}] + expr { [istarget aarch64*-*-*] + || [istarget amdgcn-*-*] }}] } # Return 1 if the target supports vector floorf calls. @@ -8514,7 +8518,8 @@ proc check_effective_target_vect_call_roundf { } { # Return 1 if the target supports AND, OR and XOR reduction. proc check_effective_target_vect_logical_reduc { } { - return [check_effective_target_aarch64_sve] + return [expr { [check_effective_target_aarch64_sve] + || [istarget amdgcn-*-*] }] } # Return 1 if the target supports the fold_extract_last optab. |