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| author | Patrick O'Neill <patrick@rivosinc.com> | 2024-08-01 20:27:52 -0700 |
|---|---|---|
| committer | Patrick O'Neill <patrick@rivosinc.com> | 2024-08-02 08:54:51 -0700 |
| commit | 7ecd6610528a301e349df273b624513ef3827321 (patch) | |
| tree | 8b7a7b468ceb2947bf590a1653292003e2172bb0 /gcc | |
| parent | 995ac87a053c22364bcdc0bc041fd6e5b3087bc5 (diff) | |
| download | gcc-7ecd6610528a301e349df273b624513ef3827321.zip gcc-7ecd6610528a301e349df273b624513ef3827321.tar.gz gcc-7ecd6610528a301e349df273b624513ef3827321.tar.bz2 | |
RISC-V: Improve length attributes for atomic insn sequences
gcc/ChangeLog:
* config/riscv/sync-rvwmo.md: Add conditional length attributes.
* config/riscv/sync-ztso.md: Ditto.
* config/riscv/sync.md: Fix incorrect insn length attributes and
reformat existing conditional checks.
Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/config/riscv/sync-rvwmo.md | 10 | ||||
| -rw-r--r-- | gcc/config/riscv/sync-ztso.md | 9 | ||||
| -rw-r--r-- | gcc/config/riscv/sync.md | 10 |
3 files changed, 21 insertions, 8 deletions
diff --git a/gcc/config/riscv/sync-rvwmo.md b/gcc/config/riscv/sync-rvwmo.md index 5db94c8..e26f53c 100644 --- a/gcc/config/riscv/sync-rvwmo.md +++ b/gcc/config/riscv/sync-rvwmo.md @@ -68,7 +68,10 @@ return "<load>\t%0,%1"; } [(set_attr "type" "multi") - (set (attr "length") (const_int 12))]) + (set (attr "length") + (symbol_ref "(is_mm_seq_cst (memmodel_from_int (INTVAL (operands[2]))) ? 12 + : is_mm_acquire (memmodel_from_int (INTVAL (operands[2]))) ? 8 + : 4)"))]) ;; Implement atomic stores with conservative fences. ;; This allows us to be compatible with the ISA manual Table A.6 and Table A.7. @@ -94,4 +97,7 @@ return "<store>\t%z1,%0"; } [(set_attr "type" "multi") - (set (attr "length") (const_int 12))]) + (set (attr "length") + (symbol_ref "(is_mm_seq_cst (memmodel_from_int (INTVAL (operands[2]))) ? 12 + : is_mm_release (memmodel_from_int (INTVAL (operands[2]))) ? 8 + : 4)"))]) diff --git a/gcc/config/riscv/sync-ztso.md b/gcc/config/riscv/sync-ztso.md index f99a21b..7121b97 100644 --- a/gcc/config/riscv/sync-ztso.md +++ b/gcc/config/riscv/sync-ztso.md @@ -58,7 +58,10 @@ return "<load>\t%0,%1"; } [(set_attr "type" "multi") - (set (attr "length") (const_int 12))]) + (set (attr "length") + (symbol_ref "(is_mm_seq_cst (memmodel_from_int (INTVAL (operands[2]))) ? 8 + : 4)"))]) + (define_insn "atomic_store_ztso<mode>" [(set (match_operand:ANYI 0 "memory_operand" "=A") @@ -78,4 +81,6 @@ return "<store>\t%z1,%0"; } [(set_attr "type" "multi") - (set (attr "length") (const_int 8))]) + (set (attr "length") + (symbol_ref "(is_mm_seq_cst (memmodel_from_int (INTVAL (operands[2]))) ? 8 + : 4)"))]) diff --git a/gcc/config/riscv/sync.md b/gcc/config/riscv/sync.md index 0c493fe..aa0c204 100644 --- a/gcc/config/riscv/sync.md +++ b/gcc/config/riscv/sync.md @@ -199,7 +199,7 @@ "bnez\t%4, 1b"; } [(set_attr "type" "atomic") - (set (attr "length") (const_int 20))]) + (set (attr "length") (const_int 16))]) (define_insn "subword_atomic_fetch_strong_<atomic_optab>" [(set (match_operand:SI 0 "register_operand" "=&r") ;; old value at mem @@ -416,7 +416,7 @@ "mv\t%0, %4"; } [(set_attr "type" "atomic") - (set (attr "length") (const_int 20))]) + (set (attr "length") (const_int 16))]) (define_expand "atomic_exchange<mode>" [(match_operand:SHORT 0 "register_operand") ;; old value at mem @@ -560,7 +560,8 @@ } [(set_attr "type" "atomic") (set (attr "length") - (symbol_ref "is_mm_seq_cst(memmodel_from_int(INTVAL (operands[5]))) ? 8 : 4"))]) + (symbol_ref "(is_mm_seq_cst (memmodel_from_int (INTVAL (operands[5]))) ? 8 + : 4)"))]) (define_expand "atomic_compare_and_swap<mode>" [(match_operand:SI 0 "register_operand" "") ;; bool output @@ -646,7 +647,8 @@ } [(set_attr "type" "atomic") (set (attr "length") - (symbol_ref "is_mm_seq_cst(memmodel_from_int(INTVAL (operands[5]))) ? 8 : 4"))]) + (symbol_ref "(is_mm_seq_cst (memmodel_from_int (INTVAL (operands[5]))) ? 8 + : 4)"))]) (define_expand "atomic_compare_and_swap<mode>" [(match_operand:SI 0 "register_operand") ;; bool output |