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| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2016-06-14 11:24:51 +0000 |
|---|---|---|
| committer | Andre Vieira <avieira@gcc.gnu.org> | 2016-06-14 11:24:51 +0000 |
| commit | 3970e5458eb7a3e3c50f7e65d4116abf04d5e5ed (patch) | |
| tree | 3d3f7d5161a1f1b71d352d9f88fe030ae915c155 /gcc | |
| parent | 04976c6e075f10b80376f82a88f9450957c21cc5 (diff) | |
| download | gcc-3970e5458eb7a3e3c50f7e65d4116abf04d5e5ed.zip gcc-3970e5458eb7a3e3c50f7e65d4116abf04d5e5ed.tar.gz gcc-3970e5458eb7a3e3c50f7e65d4116abf04d5e5ed.tar.bz2 | |
zero_bits_compound-1.c: Support aarch64.
2016-06-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
gcc/testsuite/ChangeLog:
* gcc.dg/zero_bits_compound-1.c: Support aarch64.
* gcc.dg/zero_bits_compound-1.c: Likewise.
From-SVN: r237430
Diffstat (limited to 'gcc')
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/zero_bits_compound-1.c | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/zero_bits_compound-2.c | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index dfe4fb7..248064d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-06-14 Andre Vieira <andre.simoesdiasvieira@arm.com> + + * gcc.dg/zero_bits_compound-1.c: Support aarch64. + * gcc.dg/zero_bits_compound-1.c: Likewise. + 2016-06-14 Richard Biener <rguenther@suse.de> PR tree-optimization/71522 diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c index d78dc43..650da60 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-1.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-1.c @@ -4,7 +4,7 @@ /* Note: This test requires that char, int and long have different sizes and the target has a way to do 32 -> 64 bit zero extension other than AND. */ -/* { dg-do compile { target x86_64-*-* s390*-*-* } } */ +/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */ diff --git a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c index 80fd363..f282b94 100644 --- a/gcc/testsuite/gcc.dg/zero_bits_compound-2.c +++ b/gcc/testsuite/gcc.dg/zero_bits_compound-2.c @@ -1,7 +1,7 @@ /* Test whether an AND mask or'ed with the know zero bits that equals a mode mask is a candidate for zero extendion. */ -/* { dg-do compile { target x86_64-*-* s390*-*-* } } */ +/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */ /* { dg-require-effective-target lp64 } */ /* { dg-options "-O3 -dP" } */ |