diff options
| author | Juzhe-Zhong <juzhe.zhong@rivai.ai> | 2023-05-29 12:21:48 +0800 |
|---|---|---|
| committer | Pan Li <pan2.li@intel.com> | 2023-05-29 12:21:48 +0800 |
| commit | f8af48d8755018272cdb0cf2f250cf278829d7be (patch) | |
| tree | 0e30da50b0a2b43fd6f8af98d60cea51fb407606 | |
| parent | c0df96b3cda5738afbba3a65bb054183c5cd5530 (diff) | |
| download | gcc-f8af48d8755018272cdb0cf2f250cf278829d7be.zip gcc-f8af48d8755018272cdb0cf2f250cf278829d7be.tar.gz gcc-f8af48d8755018272cdb0cf2f250cf278829d7be.tar.bz2 | |
RISC-V: Fix ternary instruction attribute bug
Fix bug of vector.md which generate incorrect information to
VSETVL PASS when testing FMA auto vectorization ternop-3.c.
Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/vector.md: Fix vimuladd instruction bug.
| -rw-r--r-- | gcc/config/riscv/vector.md | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md index 15f66ef..cd696da 100644 --- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -388,7 +388,7 @@ (symbol_ref "INTVAL (operands[7])")) (eq_attr "type" "vldux,vldox,vialu,vshift,viminmax,vimul,vidiv,vsalu,\ - viwalu,viwmul,vnshift,vimuladd,vaalu,vsmul,vsshift,\ + viwalu,viwmul,vnshift,vaalu,vsmul,vsshift,\ vnclip,vicmp,vfalu,vfmul,vfminmax,vfdiv,vfwalu,vfwmul,\ vfsgnj,vfcmp,vfmuladd,vslideup,vslidedown,vislide1up,\ vislide1down,vfslide1up,vfslide1down,vgather,viwmuladd,vfwmuladd,\ |