From 93e6fe04ccb4008f14e3584bb1e86b2d04c9234c Mon Sep 17 00:00:00 2001
From: Oleg Endo <olegendo@gcc.gnu.org>
Date: Sun, 10 Apr 2016 11:00:01 +0900
Subject: Fix primary reason why the SH simulation hasn't been working on 64
 bit hosts.

sim/sh/
	* interp.c (dmul): Split into dmul_s and dmul_u.  Use explicit integer
	width types and simplify implementation.
	* gencode.c (dmuls.l, dmulu.l): Use new functions dmul_s and dmul_u.
---
 sim/sh/gencode.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'sim/sh/gencode.c')

diff --git a/sim/sh/gencode.c b/sim/sh/gencode.c
index e3978ea..2f1a3f5 100644
--- a/sim/sh/gencode.c
+++ b/sim/sh/gencode.c
@@ -405,11 +405,11 @@ static op tab[] =
   },
 
   { "", "nm", "dmuls.l <REG_M>,<REG_N>", "0011nnnnmmmm1101",
-    "dmul (1/*signed*/, R[n], R[m]);",
+    "dmul_s (R[n], R[m]);",
   },
 
   { "", "nm", "dmulu.l <REG_M>,<REG_N>", "0011nnnnmmmm0101",
-    "dmul (0/*unsigned*/, R[n], R[m]);",
+    "dmul_u (R[n], R[m]);",
   },
 
   { "n", "n", "dt <REG_N>", "0100nnnn00010000",
-- 
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