aboutsummaryrefslogtreecommitdiff
path: root/sim
AgeCommit message (Collapse)AuthorFilesLines
2022-12-23sim: avr: move arch-specific settings to internal headerMike Frysinger3-18/+42
There's no need for these settings to be in sim-main.h which is shared with common/ sim code, so move it all out to a new header which only this port will include.
2022-12-23sim: lm32/m32r: drop redundant opcode/cgen.h includeMike Frysinger2-2/+0
The xxx-desc.h header file already includes this, and it's how the other cgen ports are getting it, so drop it from these two.
2022-12-23sim: ppc: drop unused types from sim-main.hMike Frysinger1-7/+0
The common sim headers should define these for us already, so there's no need for the ppc header to set them up.
2022-12-23sim: cgen: move symcat.h include to where it's usedMike Frysinger10-5/+9
Move this out of the global sim-main.h and to the few files that actually use functions from it. Only the cgen ports were pulling this, so this makes cgen & non-cgen behave more the same.
2022-12-23sim: cgen: move cgen-types.h include to cgen-defs.hMike Frysinger8-7/+2
The cgen-types.h header sets up types that are needed by cgen-defs.h, so move the include out of sim-main.h and to that header. It might be needed in other specific modules, but for now let's kick it out of sim-main.h to make some progress. Things still build with just this.
2022-12-23Revert "sim: mn10300: drop unused sim-main.c"Mike Frysinger1-0/+9
This reverts commit 681a422b855e4b20086554b170dae051361f00c7. I missed that this was included via common/sim-inline.c. I thought I had grepped the top of the tree, but I must have only done mn10300. Add a comment to make it clear where/how this file is used.
2022-12-22sim: mn10300: drop unused sim-main.cMike Frysinger1-4/+0
Nothing compiles or references this, so punt it.
2022-12-22sim: endian: move bfd.h from header to sourceMike Frysinger2-2/+2
The bfd APIs are used only by sim-n-endian.h which is only included by sim-endian.c, so move the bfd.h include there and out of sim-endian.h which is included by many other modules.
2022-12-22sim: move bfd.h include out of sim-main.hMike Frysinger20-13/+16
Not all arches include this in sim-main.h, and the ones that do don't actually use bfd defines in the sim-main.h header. Prune it to make sim-main.h simpler so we can kill it off entirely in the future. We add the include to the files that utilize e.g. bfd_vma though.
2022-12-22sim: mcore: replace custom "word" type with int32_tMike Frysinger2-33/+30
This is a 32-bit architecture with 32-bit registers, so replace the custom "word" long int typedef with an explicit int32_t. This is a correctness fix since long will be 64-bits on most 64-bit hosts.
2022-12-22sim: moxie: replace custom "word" type with int32_tMike Frysinger1-13/+11
This is a 32-bit architecture with 32-bit registers, so replace the custom "word" int typedef with an explicit int32_t. Practically speaking, this produces the same code, but it should hopefully make it easier to merge common code in the future.
2022-12-22sim: cr16/d10v/mcore/moxie: clean up unused word & uword typesMike Frysinger4-10/+0
Nothing actually uses these, so punt them. Some of the ports are using local "word" types, but we'll clean those up in a follow up.
2022-12-22sim: mips: trim redundant igen settingsMike Frysinger2-18/+0
These variables are setting the same value as the defaults. Trim this redundant logic to make it easier to see the real differences so we can try to keep unifying cases.
2022-12-22sim: mips: merge mips64* with existing multi-run buildMike Frysinger2-10/+4
Change the default (unhandled) mips64* targets to use the existing mips64 multi-run build. It already handles the formats, we just have to list the mips8000 bfd for it.
2022-12-22sim: mips: merge mips64vr5000 with existing multi-run buildMike Frysinger2-8/+2
The existing mips64vr-* multi-run build already handles mips5000 targets, so reuse that for mips64vr5* targets too. This moves more logic from build-time to runtime so we can have a single binary that supports many targets.
2022-12-22sim: mips: switch from SIM_ADDR to address_wordMike Frysinger2-31/+13
The latter type matches the address size configured for this sim. Also take the opportunity to simplify printf logic by leveraging PRI* macros.
2022-12-22sim: v850: switch from SIM_ADDR to address_wordMike Frysinger2-4/+4
The latter type matches the address size configured for this sim.
2022-12-22sim: switch sim_{read,write} APIs to 64-bit all the time [PR sim/7504]Mike Frysinger13-58/+60
We've been using SIM_ADDR which has always been 32-bit. This means the upper 32-bit address range in 64-bit sims is inaccessible. Use 64-bit addresses all the time since we want the APIs to be stable regardless of the active arch backend (which can be 32 or 64-bit). The length is also 64-bit because it's completely feasible to have a program that is larger than 4 GiB in size/image/runtime. Forcing the caller to manually chunk those accesses up into 4 GiB at a time doesn't seem useful to anyone. Bug: https://sourceware.org/PR7504
2022-12-22sim: use bfd_vma when reading start addr from bfd infoMike Frysinger11-12/+12
Since SIM_ADDR is always 32-bit, it might truncate the address with 64-bit ELFs. Since we load that addr from the bfd, use the bfd_vma type which matches the bfd_get_start_address API.
2022-12-22sim: m32r: include sim-hw.h for sim_hw_parseMike Frysinger1-0/+1
2022-12-22sim: mips: merge mips64vr4300 with existing multi-run buildMike Frysinger2-8/+2
The existing mips64vr-* multi-run build already handles mips4300 targets, so reuse that for mips64vr43* targets too. This moves more logic from build-time to runtime so we can have a single binary that supports many targets.
2022-12-21sim: mips: match target on cpu settingsMike Frysinger2-26/+26
We don't need to enforce larger target settings when the only thing the sim should care about is the CPU target. So reduce most of the target matches to only check the CPU.
2022-12-21sim: mips: move fpu bitsize defines to top-level configureMike Frysinger8-71/+44
This drops support for the --enable-sim-float configure option, but it's not clear anyone ever actually used that. Eventually we'll want this to be a runtime option anyways.
2022-12-21sim: mips: move bitsize defines to top-level configureMike Frysinger8-99/+48
Since the msb value is always defined as the wordsize-1, stop hardcoding that value directly, and use a CPP value instead.
2022-12-21sim: mips: move subtarget defines to top-level configureMike Frysinger8-43/+68
We want to kill off mips/configure entirely. Move this small part out now to get started.
2022-12-21sim: mips: always resolve active bfd mach dynamicallyMike Frysinger3-106/+3
Don't assume that the default bfd that we configured for is the one that is always active when running a program. We already have access to the real runtime value, so use it directly. This simplifies the code quite a bit, and will make it easier to support multiple mach's in a single binary.
2022-12-21sim: hw-config.h: move generation to top-levelMike Frysinger3-30/+54
In order to compile arch objects from the top-level, we need to generate the hw-config.h header, so move that logic up to the top level first.
2022-12-21sim: build: hoist lists of hw devices upMike Frysinger16-127/+190
We need these in the top-level to generate libsim.a, but also in the subdirs to generate hw-config.h. Move it to the local.mk, and pass it down when running recursive make. This avoids duplication, and makes it available to both. We can simplify this once we move the various steps up to the top-level too.
2022-12-21sim: build: hoist lists of common objects upMike Frysinger4-131/+167
In order to create libsim.a in the common dir, we need the list of objects for each target. To avoid duplicating the list with the recursive make in each port, pass it down as a variable. This is a temporary hack until the top-level creates libsim.a for ports.
2022-12-21sim: fully merge sim_cpu_base into sim_cpuMike Frysinger1-26/+19
Now that all ports have migrated to the new framework, drop support for the old sim_cpu_base layout. There's a lot of noise here, so it's been split into a dedicated commit.
2022-12-21sim: enable common sim_cpu usage everywhereMike Frysinger29-66/+1
All ports should be migrated now. Drop the SIM_HAVE_COMMON_SIM_CPU knob and require it be used everywhere now.
2022-12-21sim: or1k: invert sim_cpu storageMike Frysinger5-30/+43
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: m32r: invert sim_cpu storageMike Frysinger5-14/+10
The cpu*.h changes are in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: lm32: invert sim_cpu storageMike Frysinger3-12/+7
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: iq2000: invert sim_cpu storageMike Frysinger3-11/+7
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: frv: invert sim_cpu storageMike Frysinger3-23/+18
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: cris: invert sim_cpu storageMike Frysinger6-239/+244
The cpu*.h changes are in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: bpf: invert sim_cpu storageMike Frysinger3-7/+13
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
2022-12-21sim: cgen: prep for inverting sim_cpu storageMike Frysinger2-0/+15
Some common cgen code changes to allow cgen ports to invert their sim_cpu storage one-by-one.
2022-12-21sim: riscv: invert sim_cpu storageMike Frysinger3-191/+258
2022-12-21sim: pru: invert sim_cpu storageMike Frysinger3-8/+31
2022-12-21sim: example-synacor: invert sim_cpu storageMike Frysinger3-37/+47
2022-12-21sim: h8300: invert sim_cpu storageMike Frysinger2-34/+36
2022-12-21sim: m68hc11: invert sim_cpu storageMike Frysinger10-354/+446
2022-12-21sim: mips: invert sim_cpu storageMike Frysinger2-73/+90
2022-12-21sim: v850: invert sim_cpu storageMike Frysinger3-20/+23
2022-12-21sim: mcore: invert sim_cpu storageMike Frysinger2-27/+41
2022-12-21sim: aarch64: invert sim_cpu storageMike Frysinger5-108/+152
2022-12-21sim: microblaze: invert sim_cpu storageMike Frysinger3-8/+8
2022-12-21sim: avr: invert sim_cpu storageMike Frysinger2-99/+108