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Following 69cab370cf66 ("gas: adjust handling of quotes for .irpc") the
closing quote was mistakenly treated as the first quoted character.
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When VexVVVV handling was re-worked, .insn broke: When an opcode
extension is in use, VexVVVV_DST needs using now, as ModR/M.reg is
already occupied, matching what c8866e3ec5e2 ("x86: Drop using
extension_opcode to encode vvvv register") did.
While adding (bad) POP2 forms, also slightly adjust existing ones:
No need to use XMM registers, and no need to specify %r8 when really
%rax is meant twice (EVEX.vvvv not really being the culprit there, or
else EVEX.V' would also have needed mentioning).
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A number of targets pad out the data section, and there are targets
that have 2 or 4 octets per byte. And some even that don't have '#'
as a line comment char. tic6x-elf fails the test with "Error: too
many positional arguments".
* testsuite/gas/macros/arg1.s: Pad out data section. Use C style
comments.
* testsuite/gas/macros/arg1.d: Adjust to suit. Don't run on
multi-octet per byte targes. xfail tic6x.
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1. Add a macro test for expression argument with inner white spaces and
a white space before argument added by C preprocessor.
2. Add a x86-64 specific macro test.
PR gas/32073
* testsuite/gas/i386/x86-64-macro-1.d: New file.
* testsuite/gas/i386/x86-64-macro-1.s: Likewise.
* testsuite/gas/i386/x86-64.exp: Run x86-64-macro-1.
* testsuite/gas/macros/arg1.d: New file.
* testsuite/gas/macros/arg1.s: Likewise.
* testsuite/gas/macros/macros.exp: Run arg1.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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This reverts commit 6ae8a30d44f016cafb46a75843b5109316eb1996.
This fixes PR gas/32073.
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This reverts commit 7dd0dfbde7ee31167a3b2e192a575493d26b7b0a.
This is a prerequisite for the PR gas/32073 fix.
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While sadly 5262831592fb doesn't say anything on why these would have
been needed, the latest with the removal of most of the opcode vs
operands distinction in the scrubber these shouldn't be needed anymore.
The implementation was a little questionable anyway, in moving back to
states expecting labels, when clearly labels shouldn't really be
following predicates (in practice, due to another bug, at least ia64
permits such).
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According to the description of the state machine, the expectation
appears to be that (leaving aside labels) any insn mnemonic or
directive would be followed by a comma separated list of operands. That
may have been true very long ago, but the latest with the advent of more
elaborate macros this isn't rhe case anymore. Neither macro parameters
in macro definitions nor macro arguments in macro invocations are
required to be separated by commas. Hence whitespace serves a crucial
role there. Plus even without "real" macros issues exist, in e.g.
.irp n, ...
insn\n\(suffix) operand1, operand2
.endr
Whitespace following the closing parenthesis would have been removed
(ahead of even processing the .irp), as the "opcode" was deemed to have
ended earlier already.
Therefore, squash the distinction between "opcode" and operands, i.e.
fold state 10 back into state 3. Also drop most of the distinction
between "symbol chars" and "relatively normal" ones. Not entirely
unexpectedly this results in the need to skip whitespace in a few more
places in arch-specific code (and quite likely more changes are needed
for insn forms not covered by the testsuite).
As a result the D10V special case is no longer necessary.
In config/tc-sparc.c also move a comment to be next to the code being
commented.
In opcodes/cgen-asm.in some further cleanup is done, following the local
var adjustments.
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In a subsequent change the scrubber is going to be changed to retain
further whitespace. Test case expectations generally would better not
depend on the specific whitespace treatment by the scrubber, unless of
course a test is specifically about it. Adjust relevant test cases to
permit blanks where those will subsequently appear.
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In a subsequent change the scrubber is going to be changed to retain
further whitespace. Test case expectations generally would better not
depend on the specific whitespace treatment by the scrubber, unless of
course a test is specifically about it. Adjust relevant test cases to
permit blanks where those will subsequently appear.
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In a subsequent change the scrubber is going to be changed to retain
further whitespace. Test case expectations generally would better not
depend on the specific whitespace treatment by the scrubber, unless of
course a test is specifically about it. Adjust relevant test cases to
permit blanks where those will subsequently appear.
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Other than LEX_IS_* settings, such #define-s don't belong into the
common source file.
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Directives end at "line" (really: statement) separators, not just at
new-line chars.
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While apparently intended to be only externally controlled (e.g. via
specifying CFLAGS at make invocation), we should still keep scrubber and
lexer in sync in this regard. There's one place which imo was previously
wrong already, but would go further wrong and hence is being adjusted
right here: An .mri directive can be terminated by any kind of "line"
(really: statement) separators.
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For the handling of ':' elsewhere in the scrubber to be correct with
regard to labels, the state after parsing a string found at the start of
a line must match that after finding a symbol character at the start of
a line. (Things are largely okay when there's whitespace ahead of the
label: Whitespace after the colon then is retained rather than dropped
for typical targets like x86, but read.c will know to deal with that.)
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The .option arch/rvc/norvc/push/pop directives can only take effect for a
small/large specific code region, so they are not file-level architecture
setting. They should only affect the mapping symbols only rather than the
file-level elf architecture attribute. Otherwise, the elf architecture
attribute will appear to missing some extensions when -flto merges files
with different .option architecture settings.
gas/
PR 32014
* config/tc-riscv.c (file_arch_str): New const char *, rather than the
arch_str in the riscv_rps_as.subset_list, it's file-level so only be
affected by .attribute arch directive.
(riscv_reset_subsets_list_arch_str): Renamed to riscv_set_arch_str, and
also can handle both file_arch_str and arch_str in subset_list, just
give the pointer address as the input.
(riscv_set_arch): Called by -march and .attribute arch, so set both
file_arch_str and arch_str in subset_list.
(s_riscv_option): Updated .option arch/rvc/norvc/push/pop that only
set the arch_str in subset_list.
(riscv_write_out_attrs): Output elf architecture attribute according to
file_arch_str. Freed file_arch_str.
* doc/c-riscv.texi: Added destrbution that .option directives shouldn't
affect the elf attribute settings.
* testsuite/gas/riscv/option-arch.s: From option-arch-01/02/03 merged.
* testsuite/gas/riscv/option-arch-dis.d: Likewise, for dis-assembler.
* testsuite/gas/riscv/option-arch-attr.d: Likewise, to check readelf -A.
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The first operand is a general register, not an fp register;
the third operand is encoded into RS2, not RS3;
the second operand must match the destination operand.
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I can't see how that could ever have come into play.
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The only time 'v' was overridden, allowing for an optional value, was
when OBJ_VMS support still existed (until a little less than 20 years
ago). Drop the respective leftovers.
With that OPTION_VERBOSE also becomes redundant and hence is being
dropped.
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OBJ_VMS support was dropped almost 20 years ago (e330299ed5ee). Drop
respective code from tc-vax.c as well.
While there, make adjustments for OBJ_ELF as well: -K was dropped over
20 years ago (530556a951f5), yet left in md_shortopts. OPTION_PIC isn't
really necessary either; 'k' can be used instead. And then the ELF
options available weren't displayed by md_show_usage().
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Printing optc with %c makes sense only when optc is actually a
character. Add logic to also deal with unrecognized long options,
rejected by md_parse_option() rather than get_opt_long_only(). Also
quote the reproduced strings, such that possible included whitespace
can be recognized.
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Replace the scattered and repeated uses of verbose expressions with
variables. E.g.,
ginsn_get_src_reg (src1) -> src1_reg
ginsn_get_src_type (src1) -> src1_type
etc.
This hopefully makes the logic bit more maintainable. While at it,
include minor adjustments to make few checks in gen_scfi_ops () more
precise:
- When getting imm value from src operand, ensure the src type is
GINSN_SRC_IMM,
- When getting reg from src operand, ensure the src type is checked
too (GINSN_SRC_REG or GINSN_SRC_INDIRECT as appropriate).
On the other hand, the changes in verify_heuristic_traceable_reg_fp ()
and verify_heuristic_traceable_stack_manipulation () are purely
mechanical.
gas/
* scfi.c (verify_heuristic_traceable_reg_fp): Add new local
vars and reuse them.
(verify_heuristic_traceable_stack_manipulation): Likewise.
(gen_scfi_ops): Likewise. Additionally, make some conditionals
more precise.
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The `zext.h` is zero-extend halfword instruction that belongs to Zbb.
Currently `zext.h` falls back to 2 shifts if Zbb is not enabled. However, the
encoding and operation is a special case of `pack/packw rd, rs1, rs2`, which
belongs to Zbkb. The instructions pack the low halves of rs1 and rs2 into rd.
When rs2 is zero (x0), they behave like zero-extend instruction, and the
encoding are exactly the same as zext.h.
Thus we can map `zext.h` to `pack` or `packw` (rv64) if Zbkb is enabled,
instead of 2 shifts. This reduces one instruction.
This patch does this by making `zext.h` also available for Zbkb.
opcodes/
* riscv-opc.c (riscv_opcodes): Update `zext.h` entries to use
`ZBB_OR_ZBKB` instruction class.
gas/
* testsuite/gas/riscv/zext-to-pack.s: Add test for mapping zext to
pack/packw encoding.
* testsuite/gas/riscv/zext-to-pack-encoding.d: Likewise.
* testsuite/gas/riscv/zext-to-packw-encoding.d: Likewise.
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Spec: https://docs.openhwgroup.org/projects/cv32e40p-user-manual/en/latest/instruction_set_extensions.html
Contributors:
Mary Bennett <mary.bennett682@gmail.com>
Nandni Jamnadas <nandni.jamnadas@embecosm.com>
Pietra Ferreira <pietra.ferreira@embecosm.com>
Charlie Keaney
Jessica Mills
Craig Blackmore <craig.blackmore@embecosm.com>
Simon Cook <simon.cook@embecosm.com>
Jeremy Bennett <jeremy.bennett@embecosm.com>
Helene Chelin <helene.chelin@embecosm.com>
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Add `xcvbitmanip`
instruction class.
(riscv_multi_subset_supports_ext): Likewise.
gas/ChangeLog:
* config/tc-riscv.c (validate_riscv_insn): Add custom operands `Xc6` and `Xc7`.
(riscv_ip): Likewise.
* doc/c-riscv.texi: Note XCVbitmanip as an additional ISA extension
for CORE-V.
* testsuite/gas/riscv/march-help.l: Add xcvbitmanip.
* testsuite/gas/riscv/x-cv-bitmanip-fail.d: New Test.
* testsuite/gas/riscv/x-cv-bitmanip-fail.l: New Test.
* testsuite/gas/riscv/x-cv-bitmanip-fail.s: New Test.
* testsuite/gas/riscv/x-cv-bitmanip.d: New Test.
* testsuite/gas/riscv/x-cv-bitmanip.s: New Test.
include/opcode/ChangeLog:
* riscv-opc.h: Add corresponding MATCH and MASK macros for
XCVbitmanip.
* riscv.h: Add corresponding EXTRACT and ENCODE macros for
XCVbitmanip.
(enum riscv_insn_class): Add the XCVbitmanip instruction class.
opcodes/ChangeLog:
* riscv-dis.c (print_insn_args): Add custom operands `Xc6` and `Xc7`.
* riscv-opc.c: Add XCvBitmanip instructions.
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This implements the Zcmop (Compressed Zimop) extension, as of version 1.0.
View detailed information in:
<https://github.com/riscv/riscv-isa-manual/blob/main/src/zimop.adoc>
The Zcmop extension requires the Zca extension.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Handle Zcmop.
(riscv_multi_subset_supports_ext): Ditto.
gas/ChangeLog:
* NEWS: Updated.
* testsuite/gas/riscv/march-help.l: Ditto.
* testsuite/gas/riscv/zcmop.d: New test.
* testsuite/gas/riscv/zcmop.s: New test.
include/ChangeLog:
* opcode/riscv-opc.h (DECLARE_INSN): New declarations for Zcmop.
(MATCH_C_MOP_1, MATCH_C_MOP_3, MATCH_C_MOP_5, MATCH_C_MOP_7,
MATCH_C_MOP_9, MATCH_C_MOP_11, MATCH_C_MOP_13, MATCH_C_MOP_15): Define.
(MASK_C_MOP_1, MASK_C_MOP_3, MASK_C_MOP_5, MASK_C_MOP_7,
MASK_C_MOP_9, MASK_C_MOP_11, MASK_C_MOP_13, MASK_C_MOP_15): Ditto.
* opcode/riscv.h (enum riscv_insn_class): Add INSN_CLASS_ZCMOP.
opcodes/ChangeLog:
* riscv-opc.c: Add Zcmop instructions.
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This implements the Zimop (May-Be-Operations) extension, as of version 1.0.
View detailed information in:
<https://github.com/riscv/riscv-isa-manual/blob/main/src/zimop.adoc>
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Handle Zimop
(riscv_multi_subset_supports_ext): Ditto.
gas/ChangeLog:
* NEWS: Updated.
* testsuite/gas/riscv/march-help.l: Ditto.
* testsuite/gas/riscv/zimop.d: New test.
* testsuite/gas/riscv/zimop.s: New test.
include/ChangeLog:
* opcode/riscv-opc.h (DECLARE_INSN): New declarations for Zimop.
(MATCH_MOP_R_0, MATCH_MOP_R_1, MATCH_MOP_R_2, MATCH_MOP_R_3,
MATCH_MOP_R_4, MATCH_MOP_R_5, MATCH_MOP_R_6, MATCH_MOP_R_7,
MATCH_MOP_R_8, MATCH_MOP_R_9, MATCH_MOP_R_10, MATCH_MOP_R_11,
MATCH_MOP_R_12, MATCH_MOP_R_13, MATCH_MOP_R_14, MATCH_MOP_R_15,
MATCH_MOP_R_16, MATCH_MOP_R_17, MATCH_MOP_R_18, MATCH_MOP_R_19,
MATCH_MOP_R_20, MATCH_MOP_R_21, MATCH_MOP_R_22, MATCH_MOP_R_23,
MATCH_MOP_R_24, MATCH_MOP_R_25, MATCH_MOP_R_26, MATCH_MOP_R_27,
MATCH_MOP_R_28, MATCH_MOP_R_29, MATCH_MOP_R_30, MATCH_MOP_R_31,
MATCH_MOP_RR_0, MATCH_MOP_RR_1, MATCH_MOP_RR_2, MATCH_MOP_RR_3,
MATCH_MOP_RR_4, MATCH_MOP_RR_5, MATCH_MOP_RR_6, MATCH_MOP_RR_7): Define.
(MASK_MOP_R_0, MASK_MOP_R_1, MASK_MOP_R_2, MASK_MOP_R_3, MASK_MOP_R_4,
MASK_MOP_R_5, MASK_MOP_R_6, MASK_MOP_R_7, MASK_MOP_R_8, MASK_MOP_R_9,
MASK_MOP_R_10, MASK_MOP_R_11, MASK_MOP_R_12, MASK_MOP_R_13,
MASK_MOP_R_14, MASK_MOP_R_15, MASK_MOP_R_16, MASK_MOP_R_17,
MASK_MOP_R_18, MASK_MOP_R_19, MASK_MOP_R_20, MASK_MOP_R_21,
MASK_MOP_R_22, MASK_MOP_R_23, MASK_MOP_R_24, MASK_MOP_R_25,
MASK_MOP_R_26, MASK_MOP_R_27, MASK_MOP_R_28, MASK_MOP_R_29,
MASK_MOP_R_30, MASK_MOP_R_31, MASK_MOP_RR_0, MASK_MOP_RR_1,
MASK_MOP_RR_2, MASK_MOP_RR_3, MASK_MOP_RR_4, MASK_MOP_RR_5,
MASK_MOP_RR_6, MASK_MOP_RR_7): Ditto.
* opcode/riscv.h (enum riscv_insn_class): Add INSN_CLASS_ZIMOP.
opcodes/ChangeLog:
* riscv-opc.c: Add Zimop instructions.
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Maintaining line numbers correctly both inside the region and past it
requires special care. The SB produced there is somewhat different from
that produced for e.g. macro expansions, and hence also needs treating
differently: In particular we aren't doing anything resembling macro
expansion here.
The new testcase may be a little misplaced in macros/, but that's where
all the other #APP / #NO_APP ones are.
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For one '#' may not be in line_comment_chars[] in the first place. Look
for just it when it is (these "directives" are akin to C preprocessor
directives after all), but accept any other line comment character
otherwise (in read.c further requiring a match on the counterpart
"directive").
Then, when in the middle of a file, the constructs should be all on
their own on a line. There needs to be a newline ahead of them and
after them.
Finally '\n' may not be the only end-of-line character. Accept any (but
not end-of-statement ones) in read.c, while making sure in input-file.c
there is one in the first place - merely any kind of whitespace isn't
good enough.
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It's not valid to recognize it after mere line separators (often
semicolon) or after labels, let alone after tc_unrecognized_line()
perhaps having parsed off parts of a line. It shouldn't even be
preceded by whitespace, aiui.
However, keep ignoring line comments as before, for backwards
compatibility.
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The override is necessary only when a target needs other than an array
of const char.
For cris drop redundant sibling declarations at the same time.
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Internal naming of functions / data as well as commentary mixes lines
and statements. It is presumably this confusion which has led to the
wrong use of ignore_rest_of_line() when dealing with line comments in
read_a_source_file(). We shall not (silently) produce different output
depending on whether -f is passed (for suitable input).
Introduce two new helper macros, intended to be used in favor of open-
coded accesses to is_end_of_line[]. To emphasize the difference, convert
ignore_rest_of_line() right away, including adjustments to its comments.
Since most targets have # in line_comment_chars[], add a target-
independent test for that, plus an x86-only one also checking for non-#
to work as intended.
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Keep the two symmetrical looking. Makes sense to perform the sanity
checks similarly too.
gas/
* ginsn.c (ginsn_src_print): Buffer up result of snprintf and
add sanity checks on the value.
(ginsn_dst_print): Use switch case instead.
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For ginsns with less than 2 source operands or no destination operands,
the current textual dump contains a superfluous comma, like the relevant
testcases show.
Adjust the code a bit to not emit the lone trailing comma. Also, adjust
the aarch64 and x86_64 testcases.
gas/
* ginsn.c (ginsn_src_print): Do not use a trailing comma when
printing the src of ginsn.
(ginsn_print): Check the strlen and prefix a comma before the
src string.
gas/testsuite/
* gas/scfi/aarch64/ginsn-cofi-1.l: Adjust the expected textual
dump of the ginsn.
* gas/scfi/x86_64/ginsn-cofi-1.l: Likewise.
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Some flavors of indirect call and jmp instructions were not being
handled earlier, leading to a GAS error (#1):
(#1) "Error: SCFI: unhandled op 0xff may cause incorrect CFI"
Not handling jmp/call (direct or indirect) ops is an error (as shown
above) because SCFI needs an accurate CFG to synthesize CFI correctly.
Recall that the presence of indirect jmp/call, however, does make the
CFG ineligible for SCFI. In other words, generating the ginsns for them
now, will eventually cause SCFI to bail out later with an error (#2)
anyway:
(#2) "Error: untraceable control flow for func 'XXX'"
The first error (#1) gives the impression of missing functionality in
GAS. So, it seems cleaner to synthesize a GINSN_TYPE_JUMP /
GINSN_TYPE_CALL now in the backend, and let SCFI machinery complain with
the error as expected.
The handling for these indirect jmp/call instructions is similar, so
reuse the code by carving out a function for the same.
Adjust the testcase to include the now handled jmp/call instructions as
well.
gas/
* config/tc-i386-ginsn.c (x86_ginsn_indirect_branch): New
function.
(x86_ginsn_new): Refactor out functionality to above.
gas/testsuite/
* gas/scfi/x86_64/ginsn-cofi-1.l: Adjust the output.
* gas/scfi/x86_64/ginsn-cofi-1.s: Add further varieties of
jmp/call opcodes.
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This had been badly inserted between md_assemble() and its helpers
anyway. Follow what was done for Arm64 and move the code to its own
file, #include-d as appropriate.
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Old doc tools warn about there not being a . or , following; satisfy
those tools by shortening the line and adding a full stop.
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Add the MT ASE instruction operand types and encodings to the microMIPS
opcode table and enable the assembly of these instructions in GAS from
MIPSr2 onwards. Update the binutils and GAS testsuites accordingly.
References:
"MIPS Architecture for Programmers, Volume IV-f: The MIPS MT Module for
the microMIPS32 Architecture", MIPS Technologies, Inc., Document Number:
MD00768, Revision 1.12, July 16, 2013
Co-Authored-By: Maciej W. Rozycki <macro@redhat.com>
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It's entirely unclear why size_t was used there; my only guess is copy-
and-paste from another of the functions.
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Instead re-use code handling LEX_IS_TWOCHAR_COMMENT_1ST, thus ensuring
that we wouldn't get bogus state transitions: For example, when we're in
states 0 or 1, a comment should be no different from whitespace
encountered in those states. Plus for e.g. x86 this results in such
comments now truly being converted to a blank, as mandated by
documentation. Both aspects apparently were a result of blindly (and
wrongly) moving to state 3 _before_ consuming the "ungot" blank.
Also amend a related comment elsewhere.
In the new testcase the .irp is to make visible in the listing all the
whitespace that the scrubber inserts / leaves in place.
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... and prediction suffix comma. Other than documented /**/ comments
currently aren't really converted to a single space, at least not for
x86 in its most common configurations. That'll be fixed subsequently, at
which point blanks may appear where so far none were expected.
Furthermore not permitting blanks around these separators wasn't quite
logical anyway - such constructs are composite ones, and hence
components ought to have been permitted to be separated by whitespace
from the very beginning. Furthermore note how, due to the scrubber being
overly aggressive in removing whitespace, some similar construct with a
prefix were already accepted.
Note how certain other checks in parse_insn() can be simplified as a
result.
While there for the prediction suffix also make checks case-insensitive
and check for a proper trailing separator.
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..., as those leave EFLAGS untouched anyway. That's a shorter encoding,
available as long as no eGPR is in use anywhere.
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Verify that MT ASE instructions assemble and disassemble correctly
across the compatible architectures.
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We print MFTR and MTTR instructions' thread context register operand in
disassembly using the ABI name the register number would correspond to
should the targeted register be a general-purpose register.
However in most cases it is wrong, because general-purpose registers are
only referred when the 'u' and 'sel' operands are 1 and 0 respectively.
And even in these cases the MFGPR and MTGPR aliases take precedence over
the corresponding generic instruction encodings, so you won't see the
valid case to normally trigger.
Conversely decoding the thread context register operand numerically is
always valid, so switch to using it. Adjust test coverage accordingly.
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In a subsequent change the scrubber is going to be changed to retain
further whitespace. Test case expectations generally would better not
depend on the specific whitespace treatment by the scrubber, unless of
course a test is specifically about it. Adjust relevant test cases to
permit blanks where those will subsequently appear.
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Whitespace in macro arguments either needs quoting / parenthesizing to
reliably not be mistaken for an argument separator, or respective macro
parameters need to be marked as covering all remaining arguments. The
latter appears more appropriate (and far less intrusive) here.
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