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2022-11-04binutils: Run PR binutils/26160 testH.J. Lu2-41/+94
Update expected PR binutils/26160 test output for readelf out change and run PR binutils/26160 test. PR binutils/26160 * testsuite/binutils-all/pr26160.r: Updated. * testsuite/binutils-all/readelf.exp: Run PR binutils/26160 test.
2022-11-01opcodes/arm: add disassembler styling for armAndrew Burgess1-2/+2
This commit adds disassembler styling for the ARM architecture. The ARM disassembler is driven by several instruction tables, e.g. cde_opcodes, coprocessor_opcodes, neon_opcodes, etc The type for elements in each table can vary, but they all have one thing in common, a 'const char *assembler' field. This field contains a string that describes the assembler syntax of the instruction. Embedded within that assembler syntax are various escape characters, prefixed with a '%'. Here's an example of a very simple instruction from the arm_opcodes table: "pld\t%a" The '%a' indicates a particular type of operand, the function print_insn_arm processes the arm_opcodes table, and includes a switch statement that handles the '%a' operand, and takes care of printing the correct value for that instruction operand. It is worth noting that there are many print_* functions, each function handles a single *_opcodes table, and includes its own switch statement for operand handling. As a result, every *_opcodes table uses a different mapping for the operand escape sequences. This means that '%a' might print an address for one *_opcodes table, but in a different *_opcodes table '%a' might print a register operand. Notice as well that in our example above, the instruction mnemonic 'pld' is embedded within the assembler string. Some instructions also include comments within the assembler string, for example, also from the arm_opcodes table: "nop\t\t\t@ (mov r0, r0)" here, everything after the '@' is a comment that is displayed at the end of the instruction disassembly. The next complexity is that the meaning of some escape sequences is not necessarily fixed. Consider these two examples from arm_opcodes: "ldrex%c\tr%12-15d, [%16-19R]" "setpan\t#%9-9d" Here, the '%d' escape is used with a bitfield modifier, '%12-15d' in the first instruction, and '%9-9d' in the second instruction, but, both of these are the '%d' escape. However, in the first instruction, the '%d' is used to print a register number, notice the 'r' immediately before the '%d'. In the second instruction the '%d' is used to print an immediate, notice the '#' just before the '%d'. We have two problems here, first, the '%d' needs to know if it should use register style or immediate style, and secondly, the 'r' and '#' characters also need to be styled appropriately. The final thing we must consider is that some escape codes result in more than just a single operand being printed, for example, the '%q' operand as used in arm_opcodes ends up calling arm_decode_shift, which can print a register name, a shift type, and a shift amount, this could end up using register, sub-mnemonic, and immediate styles, as well as the text style for things like ',' between the different parts. I propose a three layer approach to adding styling: (1) Basic state machine: When we start printing an instruction we should maintain the idea of a 'base_style'. Every character from the assembler string will be printed using the base_style. The base_style will start as mnemonic, as each instruction starts with an instruction mnemonic. When we encounter the first '\t' character, the base_style will change to text. When we encounter the first '@' the base_style will change to comment_start. This simple state machine ensures that for simple instructions the basic parts, except for the operands themselves, will be printed in the correct style. (2) Simple operand styling: For operands that only have a single meaning, or which expand to multiple parts, all of which have a consistent meaning, then I will simply update the operand printing code to print the operand with the correct style. This will cover a large number of the operands, and is the most consistent with how styling has been added to previous architectures. (3) New styling syntax in assembler strings: For cases like the '%d' that I describe above, I propose adding a new extension to the assembler syntax. This extension will allow me to temporarily change the base_style. Operands like '%d', will then print using the base_style rather than using a fixed style. Here are the two examples from above that use '%d', updated with the new syntax extension: "ldrex%c\t%{R:r%12-15d%}, [%16-19R]" "setpan\t%{I:#%9-9d%}" The syntax has the general form '%{X:....%}' where the 'X' character changes to indicate a different style. In the first instruction I use '%{R:...%}' to change base_style to the register style, and in the second '%{I:...%}' changes base_style to immediate style. Notice that the 'r' and '#' characters are included within the new style group, this ensures that these characters are printed with the correct style rather than as text. The function decode_base_style maps from character to style. I've included a character for each style for completeness, though only a small number of styles are currently used. I have updated arm-dis.c to the above scheme, and checked all of the tests in gas/testsuite/gas/arm/, and the styling looks reasonable. There are no regressions on the ARM gas/binutils/ld tests that I can see, so I don't believe I've changed the output layout at all. There were two binutils tests for which I needed to force the disassembler styling off. I can't guarantee that I've not missed some untested corners of the disassembler, or that I might have just missed some incorrectly styled output when reviewing the test results, but I don't believe I've introduced any changes that could break the disassembler - the worst should be some aspect is not styled correctly.
2022-10-19Fix addr2line test for ppc64 elfv1 and mingwAlan Modra1-27/+39
* testsuite/binutils-all/addr2line.exp: Tidy. For powerpc64 arrange to pass --synthetic to nm, and extract .main and .fn symbol address for addr2line test. Handle default executable extension on cygwin/mingw compilers.
2022-10-19Binutils: Adding new testcase for addr2line.rupesh potharla1-0/+61
* binutils/testsuite/config/default.exp: Set ADDR2LINE and ADDR2LINEFLAGS. * binutils/testsuite/binutils-all/addr2line.exp: New file.
2022-09-26binutils, gdb: support zstd compressed debug sectionsFangrui Song1-0/+44
PR29397 PR29563: Add new configure option --with-zstd which defaults to auto. If pkgconfig/libzstd.pc is found, define HAVE_ZSTD and support zstd compressed debug sections for most tools. * bfd: for addr2line, objdump --dwarf, gdb, etc * gas: support --compress-debug-sections=zstd * ld: support ELFCOMPRESS_ZSTD input and --compress-debug-sections=zstd * objcopy: support ELFCOMPRESS_ZSTD input for --decompress-debug-sections and --compress-debug-sections=zstd * gdb: support ELFCOMPRESS_ZSTD input. The bfd change references zstd symbols, so gdb has to link against -lzstd in this patch. If zstd is not supported, ELFCOMPRESS_ZSTD input triggers an error. We can avoid HAVE_ZSTD if binutils-gdb imports zstd/ like zlib/, but this is too heavyweight, so don't do it for now. ``` % ld/ld-new a.o ld/ld-new: a.o: section .debug_abbrev is compressed with zstd, but BFD is not built with zstd support ... % ld/ld-new a.o --compress-debug-sections=zstd ld/ld-new: --compress-debug-sections=zstd: ld is not built with zstd support % binutils/objcopy --compress-debug-sections=zstd a.o b.o binutils/objcopy: --compress-debug-sections=zstd: binutils is not built with zstd support % binutils/objcopy b.o --decompress-debug-sections binutils/objcopy: zstd.o: section .debug_abbrev is compressed with zstd, but BFD is not built with zstd support ... ```
2022-09-26binutils/testsuite: skip gentestdlls related tests if missingClément Chigot1-0/+6
When launching the testsuite through runtest outside the build tree, gentestdlls might not be available, this binary being created by make check. Simply untested the related tests instead of crashing. binutils/ChangeLog: * testsuite/binutils-all/objdump.exp: Skip dotnet tests if gentestdlls is not available.
2022-09-14Binutils: Readelf testcase failing with clangRupesh Potharla1-3/+4
* testsuite/binutils-all/readelf.exp (readelf_wi_test): Extend regexps to allow for output genreated by the Clang compiler.
2022-08-13readelf: print 0x0 as 0, and remove trailing spacesAlan Modra21-197/+197
This changes readelf output a little, removing the 0x prefix on hex output when the value is 0, except in cases where a fixed field width is shown. %#010x is not a good replacement for 0x%08x.
2022-08-10bfd: Add support for LoongArch64 EFI (efi-*-loongarch64).Youling Tang3-0/+78
This adds support for efi-loongarch64 by virtue of adding a new PEI target pei-loongarch64. This is not a full target and only exists to support EFI at this time. This means that this target does not support relocation processing and is mostly a container format. This format has been added to elf based loongarch64 targets such that efi images can be made natively on Linux. However this target is not valid for use with gas but only with objcopy. We should't limit addresses to 32-bits for 64-bit vma, otherwise there will be "RVA truncated" error when using objcopy on loongarch64. With these changes the resulting file is recognized as an efi image. Any magic number is based on the Microsoft PE specification [1]. The test results are as follows: $ make check-binutils RUNTESTFLAGS='loongarch64.exp' PASS: Check if efi app format is recognized $ objdump -h -f tmpdir/loongarch64copy.o tmpdir/loongarch64copy.o: file format pei-loongarch64 architecture: Loongarch64, flags 0x00000132: EXEC_P, HAS_SYMS, HAS_LOCALS, D_PAGED start address 0x0000000000000000 Sections: Idx Name Size VMA LMA File off Algn 0 .text 0000003c 00000000200000b0 00000000200000b0 00000200 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE [1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format bfd: * .gitignore (pe-loongarch64igen.c): New. * Makefile.am (pei-loongarch64.lo, pe-loongarch64igen.lo, pei-loongarch64.c, pe-loongarch64igen.c): Add support. * Makefile.in: Likewise. * bfd.c (bfd_get_sign_extend_vma): Add pei-loongarch64. * coff-loongarch64.c: New file. * coffcode.h (coff_set_arch_mach_hook, coff_set_flags, coff_write_object_contents) Add loongarch64 (loongarch64_pei_vec) support. * config.bfd: Likewise. * configure: Likewise. * configure.ac: Likewise. * libpei.h (GET_OPTHDR_IMAGE_BASE, PUT_OPTHDR_IMAGE_BASE, GET_OPTHDR_SIZE_OF_STACK_RESERVE, PUT_OPTHDR_SIZE_OF_STACK_RESERVE, GET_OPTHDR_SIZE_OF_STACK_COMMIT, PUT_OPTHDR_SIZE_OF_STACK_COMMIT, GET_OPTHDR_SIZE_OF_HEAP_RESERVE, PUT_OPTHDR_SIZE_OF_HEAP_RESERVE, GET_OPTHDR_SIZE_OF_HEAP_COMMIT, PUT_OPTHDR_SIZE_OF_HEAP_COMMIT, GET_PDATA_ENTRY, _bfd_peLoongArch64_bfd_copy_private_bfd_data_common, _bfd_peLoongArch64_bfd_copy_private_section_data, _bfd_peLoongArch64_get_symbol_info, _bfd_peLoongArch64_only_swap_filehdr_out, _bfd_peLoongArch64_print_private_bfd_data_common, _bfd_peLoongArch64i_final_link_postscript, _bfd_peLoongArch64i_only_swap_filehdr_out, _bfd_peLoongArch64i_swap_aouthdr_in, _bfd_peLoongArch64i_swap_aouthdr_out, _bfd_peLoongArch64i_swap_aux_in, _bfd_peLoongArch64i_swap_aux_out, _bfd_peLoongArch64i_swap_lineno_in, _bfd_peLoongArch64i_swap_lineno_out, _bfd_peLoongArch64i_swap_scnhdr_out, _bfd_peLoongArch64i_swap_sym_in, _bfd_peLoongArch64i_swap_sym_out, _bfd_peLoongArch64i_swap_debugdir_in, _bfd_peLoongArch64i_swap_debugdir_out, _bfd_peLoongArch64i_write_codeview_record, _bfd_peLoongArch64i_slurp_codeview_record, _bfd_peLoongArch64_print_ce_compressed_pdata): New. * peXXigen.c (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out, _bfd_XXi_swap_scnhdr_out, pe_print_pdata, _bfd_XX_print_private_bfd_data_common, _bfd_XX_bfd_copy_private_section_data, _bfd_XXi_final_link_postscript): Support COFF_WITH_peLoongArch64, * pei-loongarch64.c: New file. * peicode.h (coff_swap_scnhdr_in, pe_ILF_build_a_bfd, pe_ILF_object_p): Support COFF_WITH_peLoongArch64. (jtab): Add dummy entry that traps. * targets.c (loongarch64_pei_vec): New. binutils * testsuite/binutils-all/loongarch64/loongarch64.exp: New file. * testsuite/binutils-all/loongarch64/pei-loongarch64.d: New test. * testsuite/binutils-all/loongarch64/pei-loongarch64.s: New test. include * coff/loongarch64.h: New file. * coff/pe.h (IMAGE_FILE_MACHINE_LOONGARCH64): New. Signed-off-by: Youling Tang <tangyouling@loongson.cn>
2022-08-09Default to enabling colored disassembly if output is to a terminal.Nick Clifton2-2/+2
PR 29457 * objdump.c (disassembler_color): Change type to an enum. (disassembler_extended_color): Remove. (usage): Update. (objdump_color_for_assembler_style): Update. (main): Update initialisation of disassembler_color. If not initialised via a command line option, set based upon terminal output. * doc/binutils.texi: Update description of disassmbler-color option. * testsuite/binutils-all/arc/objdump.exp: Add --disassembler-color=off option when disassembling. * testsuite/binutils-all/arm/objdump.exp: Likewise.
2022-07-22PR15951, binutils testsuite builds status wrapper unconditionallyAlan Modra1-1/+6
PR 15951 * testsuite/binutils-all/objcopy.exp: Build testglue.o when needs_status_wrapper.
2022-06-30Fix implementation of readelf's -wE and -wN options,Nick Clifton1-2/+2
* dwarf.c (dwarf_select_sections_by_name): If the entry's value is zero then clear the corresponding variable. (dwarf_select_sections_by_letters): Likewise. * testsuite/binutils-all/debuginfo.exp: Expect -WE and -wE debuginfod tests to fail.
2022-06-28Fix the display of the idnex values for DW_FORM_loclistx and ↵Nick Clifton1-41/+41
DW_FORM_rnglistx. Correct the display of .debug.loclists sections. PR 29267 * dwarf.c (display_debug_rnglists): New function, broken out of.. (display_debug_ranges): ... here. (read_and_display_attr_value): Correct calculation of index displayed for DW_FORM_loclistx and DW_FORM_rnglistx. * testsuite/binutils-all/x86-64/pr26808.dump: Update expected output.
2022-06-27Stop bogus warnings about DWARF indexed string offsets being too big.Nick Clifton1-3/+3
* dwarf.c (fetch_indexed_string): Do not use length of first table in string section as the length of every table in the section. * testsuite/binutils-all/pr26112.r: Update expected output.
2022-05-26Re: Add bionutils support for DWARF v5's DW_OP_addrxNatarajan, Kavitha2-0/+169
Testsuite files belonging to commit 3ac9da49378c.
2022-05-25Add bionutils support for DWARF v5's DW_OP_addrx.Natarajan, Kavitha2-2/+63
2022-05-20Stop readekf and objdump from aggressively following links.Nick Clifton3-6/+8
* dwarf.c (dwarf_select_sections_by_names): Return zero if no sections were selected. (dwarf_select_sections_by_letters): Likewise. * dwarf.h: (dwarf_select_sections_by_names): Update prototype. (dwarf_select_sections_by_letters): Update prototype. * objdump.c (might_need_separate_debug_info): New function. (dump_bfd): Call new function before attempting to load separate debug info files. (main): Do not enable dwarf section dumping for -WK or -WN. * readelf.c (parse_args): Do not enable dwarf section dumping for -wK or -wN. (might_need_separate_debug_info): New function. (process_object): Call new function before attempting to load separate debug info files. * testsuite/binutils-all/debuginfo.exp: Expect -WE and -wE debuginfod tests to pass. * testsuite/binutils-all/objdump.Wk: Add extra regexps. * testsuite/binutils-all/readelf.k: Add extra regexps.
2022-05-18Add a --no-weak option to nm.Nick Clifton2-1/+44
PR 29135 * nm.c (non_weak): New variable. (filter_symbols): When non-weak is true, ignore weak symbols. (long_options): Add --no-weak. (usage): Mention --no-weak. (main): Handle -W/--no-weak. * doc/binutils.texi: Document new feature. * NEWS: Mention the new feature. * testsuite/binutils-all/nm.exp: Add test of new feature. * testsuite/binutils-all/no-weak.s: New test source file.
2022-04-06Add code to display the contents of .debug_loclists sections which contain ↵Nick Clifton2-42/+42
offset entry tables. PR 28981 * dwarf.c (fetch_indexed_value): Rename to fecth_indexed_addr and return the address, rather than a string. (fetch_indexed_value): New function - returns a value indexed by a DW_FORM_loclistx or DW_FORM_rnglistx form. (read_and_display_attr_value): Add support for DW_FORM_loclistx and DW_FORM_rnglistx. (process_debug_info): Load the loclists and rnglists sections. (display_loclists_list): Add support for DW_LLE_base_addressx, DW_LLE_startx_endx, DW_LLE_startx_length and DW_LLE_default_location. (display_offset_entry_loclists): New function. Displays a .debug_loclists section that contains offset entry tables. (display_debug_loc): Call the new function. (display_debug_rnglists_list): Add support for DW_RLE_base_addressx, DW_RLE_startx_endx and DW_RLE_startx_length. (display_debug_ranges): Display the contents of the section's header. * dwarf.h (struct debug_info): Add loclists_base field. * testsuite/binutils-all/dw5.W: Update expected output. * testsuite/binutils-all/x86-64/pr26808.dump: Likewise.
2022-03-16objcopy --weaken-symbol: apply to STB_GNU_UNIQUE symbolsFangrui Song2-0/+12
PR binutils/28926 * objcopy.c (filter_symbols): Apply weaken to STB_GNU_UNIQUE symbols * NEWS: Mention feature. * testsuite/binutils-all/objcopy.exp (objcopy_test_symbol_manipulation): New test. * testsuite/binutils-all/weaken-gnu-unique.s: New.
2022-03-10Add option to objdump/readelf to disable access to debuginfod servers.Nick Clifton1-1/+13
* dwarf.c (use_debuginfod): New variable. Set to 1. (load_separate_debug_info): Only call debuginfod_fetch_separate_debug_info is use_debuginfod is true. (dwarf_select_sections_by_names): Add do-not-use-debuginfod and use-debuginfod options. (dwarf_select_sections_by_letters): Add D and E options. * dwarf.h (use_debuginfod): New extern. * objdump.c (usage): Mention the new options. * readelf.c (usage): Likewise. * doc/binutils.texi: Document the new options. * doc/debug-options.texi: Describe the new options. * NEWS: Mention the new feature. * testsuite/binutils-all/debuginfod.exp: Add tests of the new options.
2022-03-06MIPS/opcodes: Fix alias annotation for branch instructionsMaciej W. Rozycki11-0/+181
Correct issues with INSN2_ALIAS annotation for branch instructions: - regular MIPS BEQZ/L and BNEZ/L assembly instructions are idioms for BEQ/L and BNE/L respectively with the `rs' operand equal to $0, - microMIPS 32-bit BEQZ and BNEZ assembly instructions are idioms for BEQ and BNE respectively with the `rt' operand equal to $0, - regular MIPS BAL assembly instruction is an idiom for architecture levels of up to the MIPSr5 ISA and a machine instruction on its own from the MIPSr6 ISA up. Add missing annotation to BEQZ/L and BNEZ/L accordingly then and add a new entry for BAL for the MIPSr6 ISA, correcting a disassembly bug: $ mips-linux-gnu-objdump -m mips:isa64r6 -M no-aliases -d bal.o bal.o: file format elf32-tradlittlemips Disassembly of section .text: 00000000 <foo>: 0: 04110000 0x4110000 ... $ Add test cases accordingly. Parts for regular MIPS BEQZ/L and BNEZ/L instructions from Sagar Patel. 2022-03-06 Maciej W. Rozycki <macro@orcam.me.uk> binutils/ * testsuite/binutils-all/mips/mips1-branch-alias.d: New test. * testsuite/binutils-all/mips/mips1-branch-noalias.d: New test. * testsuite/binutils-all/mips/mips2-branch-alias.d: New test. * testsuite/binutils-all/mips/mips2-branch-noalias.d: New test. * testsuite/binutils-all/mips/mips32r6-branch-alias.d: New test. * testsuite/binutils-all/mips/mips32r6-branch-noalias.d: New test. * testsuite/binutils-all/mips/micromips-branch-alias.d: New test. * testsuite/binutils-all/mips/micromips-branch-noalias.d: New test. * testsuite/binutils-all/mips/mips-branch-alias.s: New test source. * testsuite/binutils-all/mips/micromips-branch-alias.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests. 2022-03-06 Sagar Patel <sagarmp@cs.unc.edu> Maciej W. Rozycki <macro@orcam.me.uk> opcodes/ * mips-opc.c (mips_builtin_opcodes): Fix INSN2_ALIAS annotation for "bal", "beqz", "beqzl", "bnez" and "bnezl" instructions. * micromips-opc.c (micromips_opcodes): Likewise for "beqz" and "bnez" instructions.
2022-02-09Test --only-keep-debug on ELF relocatablesPeilin Ye1-0/+57
Add a test for commit 7c4643efe7be, which fixed --only-keep-debug for ELF relocatables. * testsuite/binutils-all/objcopy.exp (keep_debug_symbols_for_elf_relocatable): New test.
2022-01-12objdump, readelf: Emit "CU:" format only when wide output is requestedHans-Peter Nilsson2-2/+2
As pre-approved by Alan in https://sourceware.org/pipermail/binutils/2021-September/118019.html and I believe people have run into getting testsuite failures for test-environments with "long" directory names, at least once more since that time. Enough. I grepped the gas, binutils and ld testsuites for "CU:" to catch target-specific occurrences, but I noticed none. I chose to remove "CU:" on the objdump tests instead of changing options to get the wide format, so as to keep the name of the test consistent with actual options; but added it to the readelf options for the gas test as I believe the "CU:" format is preferable. Tested for cris-elf and native x86_64-pc-linux-gnu. binutils: * dwarf.c (display_debug_lines_decoded): Don't check the string length of the directory, instead emit the "CU: dir/name" format only if wide output is requested. * testsuite/binutils-all/dw5.W, testsuite/binutils-all/objdump.WL: Adjust accordingly. gas: * testsuite/gas/elf/dwarf-5-loc0.d: Add -W to readelf options.
2022-01-11ar: Add --thin for creating thin archivesFangrui Song1-0/+17
In many ar implementations (FreeBSD, elfutils, etc), -T has the X/Open System Interface specified semantics. Therefore -T for thin archives is not recommended for portability. -T is deprecated without diagnostics. PR binutils/28759 * ar.c (long_options): Add --thin. (usage) Add --thin. Deprecate -T without diagnostics. * doc/binutils.texi: Add doc. * NEWS: Mention --thin. * binutils/testsuite/binutils-all/ar.exp: Add tests.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra41-41/+41
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-12-16When loading separate debug info files, also attempt to locate a file based ↵Nick Clifton1-3/+3
upon the build-id. PR 28697 * dwarf.c (load_build_id_debug_file): New function. (try_build_id_prefix): New function. (check_for_and_load_links): Call load_build_id_debug_file. (debug_displays): Add entry for .note.gnu.build-id. * dwarf.h (enum dwarf_section_display_enum): Add note_gnu_build_id. * testsuite/binutils-all/debuginfod.exp (test_fetch_debuglink): Fix regexp for loads via debuglink section.
2021-11-23AArch64: Add support for AArch64 EFI (efi-*-aarch64).Tamar Christina2-0/+58
This adds support for efi-*-aarch64 by virtue of adding a new PEI target pei-aarch64-little. This is not a full target and only exists to support EFI at this time. This means that this target does not support relocation processing and is mostly a container format. This format has been added to elf based aarch64 targets such that efi images can be made natively on Linux. However this target is not valid for use with gas but only with objcopy. With these changes the resulting file is recognized as an efi image by third party tools: > pecli info hello.efi Metadata ================================================================================ MD5: 598c32a778b0f0deebe977fef8578c4e SHA1: 4580121edd5cb4dc40f51b28f171fd15250df84c SHA256: 3154bd7cf42433d1c957f6bf55a17ad8c57ed41b29df2d485703349fd6ff1d5c Imphash: Size: 47561 bytes Type: PE32+ executable (EFI application) (stripped to external PDB), for MS Windows Compile Time: 1970-01-01 00:00:00 (UTC - 0x0 ) Entry point: 0x2000 (section .text) Sections ================================================================================ Name RWX VirtSize VirtAddr RawAddr RawSize Entropy md5 .text R-X 0x5bb0 0x2000 0x400 0x5c00 6.39 551fbc264256a3f387de8a891500ae0d .reloc R-- 0xc 0x8000 0x6000 0x200 0.02 0c45f6d812d079821c1d54c09ab89e1d .data RW- 0x1d88 0x9000 0x6200 0x1e00 4.18 5d1137c09f01289dc62bf754f7290db3 .dynamic RW- 0xf0 0xb000 0x8000 0x200 0.34 5c94ed3206f05a277e6f04fbf131f131 .rela R-- 0xe58 0xc000 0x8200 0x1000 1.87 8b5c6bc30f3acb7ca7bf2e6789d68519 .dynsym R-- 0x138 0xd000 0x9200 0x200 0.96 bdcf5101da51aadc663ca8859f88138c Imports ================================================================================ Any magic number is based on the Microsoft PE specification [1]. [1] https://docs.microsoft.com/en-us/windows/win32/debug/pe-format bfd/ChangeLog: 2021-10-21 Tamar Christina <tamar.christina@arm.com> PR binutils/26206 * .gitignore (pe-aarch64igen.c): New. * Makefile.am (pei-aarch64.lo, pe-aarch64igen.lo, pei-aarch64.c, pe-aarch64igen.c): Add support. * Makefile.in: Likewise. * bfd.c (bfd_get_sign_extend_vma): Add pei-aarch64-little. * coff-aarch64.c: New file. * coffcode.h (coff_set_arch_mach_hook, coff_set_flags, coff_write_object_contents) Add aarch64 (aarch64_pei_vec) support. * config.bfd: Likewise. * configure: Likewise. * configure.ac: Likewise. * libpei.h (GET_OPTHDR_IMAGE_BASE, PUT_OPTHDR_IMAGE_BASE, GET_OPTHDR_SIZE_OF_STACK_RESERVE, PUT_OPTHDR_SIZE_OF_STACK_RESERVE, GET_OPTHDR_SIZE_OF_STACK_COMMIT, PUT_OPTHDR_SIZE_OF_STACK_COMMIT, GET_OPTHDR_SIZE_OF_HEAP_RESERVE, PUT_OPTHDR_SIZE_OF_HEAP_RESERVE, GET_OPTHDR_SIZE_OF_HEAP_COMMIT, PUT_OPTHDR_SIZE_OF_HEAP_COMMIT, GET_PDATA_ENTRY, _bfd_peAArch64_bfd_copy_private_bfd_data_common, _bfd_peAArch64_bfd_copy_private_section_data, _bfd_peAArch64_get_symbol_info, _bfd_peAArch64_only_swap_filehdr_out, _bfd_peAArch64_print_private_bfd_data_common, _bfd_peAArch64i_final_link_postscript, _bfd_peAArch64i_only_swap_filehdr_out, _bfd_peAArch64i_swap_aouthdr_in, _bfd_peAArch64i_swap_aouthdr_out, _bfd_peAArch64i_swap_aux_in, _bfd_peAArch64i_swap_aux_out, _bfd_peAArch64i_swap_lineno_in, _bfd_peAArch64i_swap_lineno_out, _bfd_peAArch64i_swap_scnhdr_out, _bfd_peAArch64i_swap_sym_in, _bfd_peAArch64i_swap_sym_out, _bfd_peAArch64i_swap_debugdir_in, _bfd_peAArch64i_swap_debugdir_out, _bfd_peAArch64i_write_codeview_record, _bfd_peAArch64i_slurp_codeview_record, _bfd_peAArch64_print_ce_compressed_pdata): New. * peXXigen.c (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out, pe_print_pdata, _bfd_XX_print_private_bfd_data_common, _bfd_XX_bfd_copy_private_section_data, _bfd_XXi_final_link_postscript): Support COFF_WITH_peAArch64, * pei-aarch64.c: New file. * peicode.h (coff_swap_scnhdr_in, pe_ILF_build_a_bfd, pe_ILF_object_p): Support COFF_WITH_peAArch64. (jtab): Add dummy entry that traps. * targets.c (aarch64_pei_vec): New. binutils/ChangeLog: 2021-10-21 Tamar Christina <tamar.christina@arm.com> PR binutils/26206 * NEWS: Add new support. * objcopy.c (convert_efi_target): Add efi-*-aarch64 support. * testsuite/binutils-all/aarch64/pei-aarch64-little.d: New test. * testsuite/binutils-all/aarch64/pei-aarch64-little.s: New test. include/ChangeLog: 2021-10-21 Tamar Christina <tamar.christina@arm.com> PR binutils/26206 * coff/aarch64.h: New file. * coff/pe.h (IMAGE_FILE_MACHINE_ARM64): New.
2021-11-23binutils debuginfod testAlan Modra1-1/+2
A missing "return" resulted in this non-ELF fail: x86_64-w64-mingw32 +FAIL: debuginfod (create separate debug info file) Also, the debuginfod I have installed does not appear to handle non-native ELF objects, so only run the test when native. * testsuite/binutils-all/debuginfod.exp: Don't run test unless native ELF.
2021-11-17elfedit: Add --output-abiversion option to update ABIVERSIONH.J. Lu2-0/+16
* NEWS: Mention --output-abiversion. * elfedit.c (input_elf_abiversion): New. (output_elf_abiversion): Likewise. (update_elf_header): Update EI_ABIVERSION. (command_line_switch): Add OPTION_INPUT_ABIVERSION and OPTION_OUTPUT_ABIVERSION. (options): Add --input-abiversion and --output-abiversion. (usage): Likewise. (main): Handle --input-abiversion and --output-abiversion. * doc/binutils.texi: Document --input-abiversion and --output-abiversion. * testsuite/binutils-all/elfedit.exp: Run elfedit-6. * testsuite/binutils-all/elfedit-6.d: New file.
2021-10-24LoongArch binutils supportliuzhensong1-0/+1
2021-10-22 Chenghua Xu <xuchenghua@loongson.cn> Zhensong Liu <liuzhensong@loongson.cn> Weinan Liu <liuweinan@loongson.cn> binutils/ * NEWS: Mention LoongArch support. * readelf.c: Add LoongArch. * testsuite/binutils-all/objdump.exp: Add LoongArch.
2021-09-20riscv: print .2byte or .4byte before an unknown instruction encodingAndrew Burgess3-0/+67
When the RISC-V disassembler encounters an unknown instruction, it currently just prints the value of the bytes, like this: Dump of assembler code for function custom_insn: 0x00010132 <+0>: addi sp,sp,-16 0x00010134 <+2>: sw s0,12(sp) 0x00010136 <+4>: addi s0,sp,16 0x00010138 <+6>: 0x52018b 0x0001013c <+10>: 0x9c45 My proposal, in this patch, is to change the behaviour to this: Dump of assembler code for function custom_insn: 0x00010132 <+0>: addi sp,sp,-16 0x00010134 <+2>: sw s0,12(sp) 0x00010136 <+4>: addi s0,sp,16 0x00010138 <+6>: .4byte 0x52018b 0x0001013c <+10>: .2byte 0x9c45 Adding the .4byte and .2byte opcodes. The benefit that I see here is that in the patched version of the tools, the disassembler output can be fed back into the assembler and it should assemble to the same binary format. Before the patch, the disassembler output is invalid assembly. I've started a RISC-V specific test file under binutils so that I can add a test for this change. binutils/ChangeLog: * testsuite/binutils-all/riscv/riscv.exp: New file. * testsuite/binutils-all/riscv/unknown.d: New file. * testsuite/binutils-all/riscv/unknown.s: New file. opcodes/ChangeLog: * riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode before an unknown instruction, '%d' is replaced with the instruction length.
2021-08-30RISC-V: PR27916, Support mapping symbols.Nelson Chu6-10/+16
Similar to ARM/AARCH64, we add mapping symbols in the symbol table, to mark the start addresses of data and instructions. The $d means data, and the $x means instruction. Then the disassembler uses these symbols to decide whether we should dump data or instruction. Consider the mapping-04 test case, $ cat tmp.s .text .option norelax .option norvc .fill 2, 4, 0x1001 .byte 1 .word 0 .balign 8 add a0, a0, a0 .fill 5, 2, 0x2002 add a1, a1, a1 .data .word 0x1 # No need to add mapping symbols. .word 0x2 $ riscv64-unknown-elf-as tmp.s -o tmp.o $ riscv64-unknown-elf-objdump -d tmp.o Disassembly of section .text: 0000000000000000 <.text>: 0: 00001001 .word 0x00001001 # Marked $d, .fill directive. 4: 00001001 .word 0x00001001 8: 00000001 .word 0x00000001 # .byte + part of .word. c: 00 .byte 0x00 # remaining .word. d: 00 .byte 0x00 # Marked $d, odd byte of alignment. e: 0001 nop # Marked $x, nops for alignment. 10: 00a50533 add a0,a0,a0 14: 20022002 .word 0x20022002 # Marked $d, .fill directive. 18: 20022002 .word 0x20022002 1c: 2002 .short 0x2002 1e: 00b585b3 add a1,a1,a1 # Marked $x. 22: 0001 nop # Section tail alignment. 24: 00000013 nop * Use $d and $x to mark the distribution of data and instructions. Alignments of code are recognized as instructions, since we usually fill nops for them. * If the alignment have odd bytes, then we cannot just fill the nops into the spaces. We always fill an odd byte 0x00 at the start of the spaces. Therefore, add a $d mapping symbol for the odd byte, to tell disassembler that it isn't an instruction. The behavior is same as Arm and Aarch64. The elf/linux toolchain regressions all passed. Besides, I also disable the mapping symbols internally, but use the new objudmp, the regressions passed, too. Therefore, the new objudmp should dump the objects corretly, even if they don't have any mapping symbols. bfd/ pr 27916 * cpu-riscv.c (riscv_elf_is_mapping_symbols): Define mapping symbols. * cpu-riscv.h: extern riscv_elf_is_mapping_symbols. * elfnn-riscv.c (riscv_maybe_function_sym): Do not choose mapping symbols as a function name. (riscv_elf_is_target_special_symbol): Add mapping symbols. binutils/ pr 27916 * testsuite/binutils-all/readelf.s: Updated. * testsuite/binutils-all/readelf.s-64: Likewise. * testsuite/binutils-all/readelf.s-64-unused: Likewise. * testsuite/binutils-all/readelf.ss: Likewise. * testsuite/binutils-all/readelf.ss-64: Likewise. * testsuite/binutils-all/readelf.ss-64-unused: Likewise. gas/ pr 27916 * config/tc-riscv.c (make_mapping_symbol): Create a new mapping symbol. (riscv_mapping_state): Decide whether to create mapping symbol for frag_now. Only add the mapping symbols to text sections. (riscv_add_odd_padding_symbol): Add the mapping symbols for the riscv_handle_align, which have odd bytes spaces. (riscv_check_mapping_symbols): Remove any excess mapping symbols. (md_assemble): Marked as MAP_INSN. (riscv_frag_align_code): Marked as MAP_INSN. (riscv_init_frag): Add mapping symbols for frag, it usually called by frag_var. Marked as MAP_DATA for rs_align and rs_fill, and marked as MAP_INSN for rs_align_code. (s_riscv_insn): Marked as MAP_INSN. (riscv_adjust_symtab): Call riscv_check_mapping_symbols. * config/tc-riscv.h (md_cons_align): Defined to riscv_mapping_state with MAP_DATA. (TC_SEGMENT_INFO_TYPE): Record mapping state for each segment. (TC_FRAG_TYPE): Record the first and last mapping symbols for the fragments. The first mapping symbol must be placed at the start of the fragment. (TC_FRAG_INIT): Defined to riscv_init_frag. * testsuite/gas/riscv/mapping-01.s: New testcase. * testsuite/gas/riscv/mapping-01a.d: Likewise. * testsuite/gas/riscv/mapping-01b.d: Likewise. * testsuite/gas/riscv/mapping-02.s: Likewise. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-02b.d: Likewise. * testsuite/gas/riscv/mapping-03.s: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-03b.d: Likewise. * testsuite/gas/riscv/mapping-04.s: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-04b.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04b.d: Likewise. * testsuite/gas/riscv/no-relax-align.d: Updated. * testsuite/gas/riscv/no-relax-align-2.d: Likewise. include/ pr 27916 * opcode/riscv.h (enum riscv_seg_mstate): Added. opcodes/ pr 27916 * riscv-dis.c (last_map_symbol, last_stop_offset, last_map_state): Added to dump sections with mapping symbols. (riscv_get_map_state): Get the mapping state from the symbol. (riscv_search_mapping_symbol): Check the sorted symbol table, and then find the suitable mapping symbol. (riscv_data_length): Decide which data size we should print. (riscv_disassemble_data): Dump the data contents. (print_insn_riscv): Handle the mapping symbols. (riscv_symbol_is_valid): Marked mapping symbols as invalid.
2021-08-24objdump -S test fail on mingwAlan Modra2-12/+21
FAIL: objdump -S FAIL: objdump --source-comment is seen on mingw for the simple reason that gcc adds a .exe suffix on the output file if not already present. Fix that, and tidy some objcopy tests. * testsuite/lib/binutils-common.exp (exeext): New proc. * testsuite/binutils-all/objcopy.exp (exe, test_prog): Use it here. (objcopy_remove_relocations_from_executable): Catch objcopy errors. Only run on ELF targets. * testsuite/binutils-all/objdump.exp (exe): Set variable. (test_build_id_debuglink, test_objdump_S): Use exe file suffix.
2021-08-11Deprecate a.out support for NetBSD targets.John Ericson1-1/+1
As discussed previously, a.out support is now quite deprecated, and in some cases removed, in both Binutils itself and NetBSD, so this legacy default makes little sense. `netbsdelf*` and `netbsdaout*` still work allowing the user to be explicit about there choice. Additionally, the configure script warns about the change as Nick Clifton requested. One possible concern was the status of NetBSD on NS32K, where only a.out was supported. But per [1] NetBSD has removed support, and if it were to come back, it would be with ELF. The binutils implementation is therefore marked obsolete, per the instructions in the last message. With that patch and this one applied, I have confirmed the following: --target=i686-unknown-netbsd --target=i686-unknown-netbsdelf builds completely --target=i686-unknown-netbsdaout properly fails because target is deprecated. --target=vax-unknown-netbsdaout builds completely except for gas, where the target is deprecated. [1]: https://mail-index.netbsd.org/tech-toolchain/2021/07/19/msg004025.html --- bfd/config.bfd | 43 +++++++++++++-------- bfd/configure.ac | 5 +-- binutils/testsuite/binutils-all/nm.exp | 2 +- binutils/testsuite/lib/binutils-common.exp | 7 +--- config/picflag.m4 | 4 +- gas/configure.tgt | 9 +++-- gas/testsuite/gas/arm/blx-bl-convert.d | 2 +- gas/testsuite/gas/arm/blx-local-thumb.d | 2 +- gas/testsuite/gas/sh/basic.exp | 2 +- gdb/configure.host | 34 +++++++---------- gdb/configure.tgt | 2 +- gdb/testsuite/gdb.asm/asm-source.exp | 6 +-- intl/configure | 2 +- ld/configure.tgt | 44 +++++++++++----------- ld/testsuite/ld-arm/arm-elf.exp | 4 +- ld/testsuite/ld-elf/elf.exp | 2 +- ld/testsuite/ld-elf/shared.exp | 4 +- libiberty/configure | 4 +-
2021-07-13RISC-V: Enable elf attributes when default configure option isn't set.Nelson Chu6-1/+9
Since gcc commit, 3c70b3ca1ef58f302bf8c16d9e7c7bb8626408bf, we now enable elf attributes for all riscv targets by default in gcc. Therefore, I think binutils should have the same behavior, in case users are writing assembly files. If --enable-default-riscv-attribute isn't set, then we enable the elf attributes for all riscv targets by default. ChangLog: binutils/ * testsuite/binutils-all/readelf.s: Add comments for riscv. * testsuite/binutils-all/readelf.s-64: Likewise. * testsuite/binutils-all/readelf.s-64-unused: Likewise. * testsuite/binutils-all/readelf.ss: Likewise. * testsuite/binutils-all/readelf.ss-64: Likewise. * testsuite/binutils-all/readelf.ss-64-unused: Likewise. gas/ * configure.ac: If --enable-default-riscv-attribute isn't set, then we enable the elf attributes for all riscv targets by default. * configure: Regenerated.
2021-07-01Partially fix debuginfod tests in binutils testsuite.Nick Clifton1-5/+5
PR 28029 * testsuite/binutils-all/debuginfod.exp: Replace -wK with -wk.
2021-07-01readelf: Reset file position to beginning for thin archive membersAndrei Homescu2-0/+50
* readelf.c (process_archive): Reset file position to the beginning when calling process_object for thin archive members. * testsuite/binutils-all/readelf.exp: Add test. * testsuite/binutils-all/readelf.h.thin: New file.
2021-06-15readelf: report DF_1_PIE as "Position-Independent Executable"Alan Modra1-1/+1
I finally found time to teach readelf to identify PIEs in the file header display and program header display. So in place of "DYN (Shared object file)" which isn't completely true, show "DYN (Position-Independent Executable file)". It requires a little bit of untangling code in readelf due to process_program_headers setting up dynamic_addr and dynamic_size, needed to scan .dynamic for the DT_FLAGS_1 entry, and process_program_headers itself wanting to display the file type in some cases. At first I modified process_program_header using a "probe" parameter similar to get_section_headers in order to inhibit output, but decided it was cleaner to separate out locate_dynamic_sections. binutils/ * readelf.c (locate_dynamic_section, is_pie): New functions. (get_file_type): Replace e_type parameter with filedata. Call is_pie for ET_DYN. Update all callers. (process_program_headers): Use local variables dynamic_addr and dynamic_size, updating filedata on exit from function. Set dynamic_size of 1 to indicate no dynamic section or segment. Update tests of dynamic_size throughout. * testsuite/binutils-all/x86-64/pr27708.dump: Update expected output. ld/ * testsuite/ld-pie/vaddr-0.d: Update expected output. gdb/ * testsuite/lib/gdb.exp (exec_is_pie): Match new PIE readelf output.
2021-05-29MIPS/opcodes: Do not use CP0 register names for control registersMaciej W. Rozycki2-2/+2
The CP0 control register set has never been defined, however encodings for the CFC0 and CTC0 instructions remained available for implementers up until the MIPS32 ISA declared them invalid and causing the Reserved Instruction exception[1]. Therefore we handle them for both assembly and disassembly, however in the latter case the names of CP0 registers from the regular set are incorrectly printed if named registers are requested. This is because we do not define separate operand classes for coprocessor regular and control registers respectively, which means the disassembler has no way to tell the two cases apart. Consequently nonsensical disassembly is produced like: cfc0 v0,c0_random Later the MIPSr5 ISA reused the encodings for XPA ASE MFHC0 and MTHC0 instructions[2] although it failed to document them in the relevant opcode table until MIPSr6 only. Correct the issue then by defining a new register class, OP_REG_CONTROL, and corresponding operand codes, `g' and `y' for the two positions in the machine instruction a control register operand can take. Adjust the test cases affected accordingly. While at it swap the regular MIPS opcode table "cfc0" and "ctc0" entries with each other so that they come in the alphabetical order. References: [1] "MIPS32 Architecture For Programmers, Volume II: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 1.00, August 29, 2002, Table A-9 "MIPS32 COP0 Encoding of rs Field", p. 242 [2] "MIPS Architecture For Programmers, Volume II-A: The MIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00086, Revision 5.04, December 11, 2013, Section 3.2 "Alphabetical List of Instructions", pp. 195, 216 include/ * opcode/mips.h: Document `g' and `y' operand codes. (mips_reg_operand_type): Add OP_REG_CONTROL enumeration constant. gas/ * tc-mips.c (convert_reg_type) <OP_REG_CONTROL>: New case. (macro) <M_TRUNCWS, M_TRUNCWD>: Use the `g' rather than `G' operand code. opcodes/ * mips-dis.c (print_reg) <OP_REG_COPRO>: Move control register handling code over to... <OP_REG_CONTROL>: ... this new case. * mips-opc.c (decode_mips_operand) <'g', 'y'>: New cases. (mips_builtin_opcodes): Update "cfc1", "ctc1", "cttc1", "cttc2", "cfc0", "ctc0", "cfc2", "ctc2", "cfc3", and "ctc3" entries replacing the `G' operand code with `g'. Update "cftc1" and "cftc2" entries replacing the `E' operand code with `y'. * micromips-opc.c (decode_micromips_operand) <'g'>: New case. (micromips_opcodes): Update "cfc1", "cfc2", "ctc1", and "ctc2" entries replacing the `G' operand code with `g'. binutils/ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: Correct CFC0 operand disassembly. * testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise.
2021-05-29MIPS/binutils/testsuite: Fix XPA and Virtualization ASE casesMaciej W. Rozycki4-4/+4
Fix commit 9785fc2a4d22 ("MIPS: Fix XPA base and Virtualization ASE instruction handling") and explicitly use the `mips:3000' machine for disassembly across the XPA base and XPA Virtualization ASE test cases, providing actual coverage for the `virt' and `xpa' disassembler options and removing failures for targets that default to those ASEs enabled: mipsisa32r2-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r2-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r2-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r2-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r2-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r2-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r2el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r2el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r2el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r2el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r2el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r2el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r3-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r3-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r3-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r3-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r3-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r3-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r3el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r3el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r3el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r3el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r3el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r3el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r5-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r5-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r5-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r5-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r5-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r5-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r5el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r5el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r5el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r5el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r5el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r5el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r6-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r6-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r6-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r6-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r6-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r6-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r6el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r6el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r6el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa32r6el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa32r6el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa32r6el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r2-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r2-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r2-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r2-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r2-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r2-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r2el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r2el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r2el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r2el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r2el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r2el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r3-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r3-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r3-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r3-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r3-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r3-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r3el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r3el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r3el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r3el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r3el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r3el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r5-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r5-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r5-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r5-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r5-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r5-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r5el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r5el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r5el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r5el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r5el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r5el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r6-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r6-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r6-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r6-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r6-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r6-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r6el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r6el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r6el-elf -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 mipsisa64r6el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 1 mipsisa64r6el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 2 mipsisa64r6el-linux -FAIL: MIPS XPA and Virtualization ASE instruction disassembly 3 This is because the test cases rely on these ASEs being disabled for disassembly by default and expect instructions belonging to these ASEs not to be shown unless explicitly enabled. The `mips-xpa-virt-4' test case passes regardless, but we want it to verify the explicit options do work, so use the `mips:3000' machine to set the defaults there as well. binutils/ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: Use `mips:3000' machine for disassembly. * testsuite/binutils-all/mips/mips-xpa-virt-2.d: Likewise. * testsuite/binutils-all/mips/mips-xpa-virt-3.d: Likewise. * testsuite/binutils-all/mips/mips-xpa-virt-4.d: Likewise.
2021-04-21Adjust readelf's output so that section symbols without a name as shown with ↵Nick Clifton6-25/+25
their section name. binutils* readelf.c (print_dynamic_symbol): Print the section name for section symbols without a name of their own. * testsuite/binutils-all/mips/global-local-symtab-sort-n64t.d: Adjust expected output to allow for named section symbols. * testsuite/binutils-all/mips/global-local-symtab-sort-o32t.d: Likewise. * testsuite/binutils-all/readelf.s-64: Likewise. * testsuite/binutils-all/readelf.ss-64-unused: Likewise. * testsuite/binutils-all/readelf.ss-tmips: Likewise. * testsuite/binutils-all/readelf.ss-unused: Likewise. ld * testsuite/ld-aarch64/variant_pcs-now.d: Adjust expected output to allow for named section symbols. * testsuite/ld-aarch64/variant_pcs-r.d: Likewise. * testsuite/ld-aarch64/variant_pcs-shared.d: Likewise. * testsuite/ld-alpha/tlsbin.rd: Likewise. * testsuite/ld-alpha/tlsbinr.rd: Likewise. * testsuite/ld-alpha/tlspic.rd: Likewise. * testsuite/ld-arm/rodata-merge-map.sym: Likewise. * testsuite/ld-arm/script-type.sym: Likewise. * testsuite/ld-cris/libdso-2.d: Likewise. * testsuite/ld-cris/pr16044.d: Likewise. * testsuite/ld-elf/sec64k.exp: Likewise. * testsuite/ld-ia64/tlsbin.rd: Likewise. * testsuite/ld-ia64/tlspic.rd: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-n64t.d: Likewise. * testsuite/ld-mips-elf/global-local-symtab-sort-o32t.d: Likewise. * testsuite/ld-mmix/bspec1.d: Likewise. * testsuite/ld-mmix/bspec2.d: Likewise. * testsuite/ld-mmix/local1.d: Likewise. * testsuite/ld-mmix/local3.d: Likewise. * testsuite/ld-mmix/local5.d: Likewise. * testsuite/ld-mmix/local7.d: Likewise. * testsuite/ld-mmix/undef-3.d: Likewise. * testsuite/ld-powerpc/tlsso.r: Likewise. * testsuite/ld-powerpc/tlsso32.r: Likewise. * testsuite/ld-powerpc/tlstocso.r: Likewise. * testsuite/ld-s390/tlsbin.rd: Likewise. * testsuite/ld-s390/tlsbin_64.rd: Likewise. * testsuite/ld-s390/tlspic.rd: Likewise. * testsuite/ld-s390/tlspic_64.rd: Likewise. * testsuite/ld-sparc/gotop32.rd: Likewise. * testsuite/ld-sparc/gotop64.rd: Likewise. * testsuite/ld-sparc/tlssunbin32.rd: Likewise. * testsuite/ld-sparc/tlssunbin64.rd: Likewise. * testsuite/ld-sparc/tlssunnopic32.rd: Likewise. * testsuite/ld-sparc/tlssunnopic64.rd: Likewise. * testsuite/ld-sparc/tlssunpic32.rd: Likewise. * testsuite/ld-sparc/tlssunpic64.rd: Likewise. * testsuite/ld-tic6x/common.d: Likewise. * testsuite/ld-tic6x/shlib-1.rd: Likewise. * testsuite/ld-tic6x/shlib-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1b.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1r.rd: Likewise. * testsuite/ld-tic6x/shlib-app-1rb.rd: Likewise. * testsuite/ld-tic6x/shlib-noindex.rd: Likewise. * testsuite/ld-tic6x/static-app-1.rd: Likewise. * testsuite/ld-tic6x/static-app-1b.rd: Likewise. * testsuite/ld-tic6x/static-app-1r.rd: Likewise. * testsuite/ld-tic6x/static-app-1rb.rd: Likewise. gas * testsuite/gas/aarch64/dwarf.d: Adjust expected output to allow for named section symbols. * testsuite/gas/arm/thumbver.d: Likewise. * testsuite/gas/bfin/loop_temps.d: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/elf/section2.e-arm: Likewise. * testsuite/gas/elf/section2.e-csky: Likewise. * testsuite/gas/elf/section2.e-m32r: Likewise. * testsuite/gas/elf/section2.e-mips: Likewise. * testsuite/gas/elf/section2.e-msp430: Likewise. * testsuite/gas/elf/section2.e-riscv: Likewise. * testsuite/gas/elf/section2.e-rl78: Likewise. * testsuite/gas/elf/section2.e-rx: Likewise. * testsuite/gas/elf/section2.e-score: Likewise. * testsuite/gas/elf/section2.e-tic6x: Likewise. * testsuite/gas/elf/section2.e-unused: Likewise. * testsuite/gas/elf/section2.e-v850: Likewise. * testsuite/gas/elf/section2.e-xtensa: Likewise. * testsuite/gas/ia64/alias-ilp32.d: Likewise. * testsuite/gas/ia64/alias.d: Likewise. * testsuite/gas/ia64/global.d: Likewise. * testsuite/gas/microblaze/relax_size.elf: Likewise. * testsuite/gas/microblaze/relax_size2.elf: Likewise. * testsuite/gas/mips/global-local-symtab-sort-n64t.d: Likewise. * testsuite/gas/mips/global-local-symtab-sort-o32t.d: Likewise. * testsuite/gas/mmix/bspec-1.d: Likewise. * testsuite/gas/mmix/byte-1.d: Likewise. * testsuite/gas/mmix/comment-1.d: Likewise. * testsuite/gas/mmix/loc-1.d: Likewise. * testsuite/gas/mmix/loc-2.d: Likewise. * testsuite/gas/mmix/loc-3.d: Likewise. * testsuite/gas/mmix/loc-4.d: Likewise. * testsuite/gas/mmix/loc-5.d: Likewise. * testsuite/gas/tic6x/scomm-directive-4.d: Likewise.
2021-04-15PR27725, better objcopy -p timesAlan Modra1-0/+12
Nanosecond rather than second resolution. PR 27725 * configure.ac: Check for sys/time.h and utimensat. Use standard checks for mkstemp and mkdtemp. Whitespace. Check for nanosecond members of struct stat. * rename.c: Prefer sys/time.h for utimes over utime.h for utime. (STAT_TIMESPEC, STAT_TIMESPEC_NS): Define (get_stat_atime_ns, get_stat_mtime_ns): New inline functions. (get_stat_atime, get_stat_mtime): Likewise. (set_times): Choose first available of utimensat, utimes, utime. Use above inline functions to set timespec and timeval values. * configure: Regenerate. * config.in: Regenerate. * testsuite/binutils-all/objcopy.exp (objcopy_test): Add test of file timestamp when --preserve-dates is used.
2021-04-14elf: Set p_memsz to p_filesz for loadable PT_NOTE segmentH.J. Lu3-0/+71
Since p_memsz of the loadable PT_NOTE segment should be the same as p_filesz, set p_memsz on the loadable PT_NOTE segment when updating p_filesz. bfd/ PR binutils/27708 * elf.c (assign_file_positions_for_non_load_sections): Set p_memsz to p_filesz for the loadable PT_NOTE segment. binutils/ PR binutils/27708 * testsuite/binutils-all/x86-64/pr27708.dump: New file. * testsuite/binutils-all/x86-64/pr27708.exe.bz2: Likewise. * testsuite/binutils-all/x86-64/x86-64.exp: Run binutils/27708 test.
2021-03-04Gate the displaying of non-debug sections in separate debuginfo files.Nick Clifton6-18/+15
PR 27478 * objdump.c (process_links): New variable. (usage): Add --process-links. (long_options): Likewise. (dump_bfd): Stop processing once the bfd has been loaded unless this is the main file or process_links has been enabled. (main): Handle the process-links option. * readelf.c (process_links): New variable. (struct filedata): Add is_separate field. (options): Add --process-links. (usage): Likewise. (parse_args): Likewise. (process_file_header): Include the filename when dumping information for separate debuginfo files. (process_program_headers): Likewise. (process_section_headers): Likewise. (process_section_groups): Likewise. (process_relocs): Likewise. (process_dynamic_section): Likewise. (process_version_sections): Likewise. (display_lto_symtab): Likewise. (process_symbol_table): Likewise. (process_syminfo): Likewise. (initialise_dumps_by_name): Likewise. (process_section_contents): Likewise. (process_notes_at): Likewise. (process_notes): Likewise. (open_file): Add is_separate parameter. Use to initialise the is_separate field in the filedata structure. (open_deug): Update call to open_file. (process_object): Add processing of the contents of separate debuginfo files, gated by the process_links variable. (process_archive): Update call to open_file. (process_file): Initialise the is_separate field in the filedata structure. * dwarf.c (load_separate_debug_info_file): Only report the loading of a separate file if debug links are being dumped. * objcopy.c (keep_section_symbols): New variable. (enum command_line_switch): Add OPTION_KEEP_SYMBOLS. (strip_options): Add keep-section-symbols. (copy_options): Likewise. (copy_usage): Likewise. (strip_usage): Likewise. (copy_object): Keep section symbols if requested by command line option. (strip_main): Handle --keep-section-symbols. (copy_main): Likewise. * doc/binutils.texi: Document the new options. * NEWS: Mention the new features. * testsuite/binutils-all/compress.exp (test_gnu_debuglink): Update options passed to objdump. Use diff rather than cmp to compare the dumped data. * testsuite/binutils-all/objdump.WK2: Update regexp. * testsuite/binutils-all/objdump.WK3: Update regexp. * testsuite/binutils-all/objdump.exp: Use --process-links instead of --dwarf=follow-links. * testsuite/binutils-all/readelf.exp (readelf_test): Include readelf's output in the log when the test fails. Add the -P option to the -wKis test. * testsuite/binutils-all/readelf.wKis: Update expected output.
2021-03-01Warn for missing separate debug files only if neededH.J. Lu1-0/+15
We shouldn't warn missing separate debug files when debug info isn't needed. PR binutils/27486 * dwarf.c (load_separate_debug_info): Issue warning only if do_debug_links is set. * testsuite/binutils-all/compress.exp: Run objdump and readelf with missing debug file.
2021-02-19pr26548 testAlan Modra1-1/+1
I forgot that .sleb128 handles bignums, so this test should run fine for 32-bit targets on 32-bit hosts. * testsuite/binutils-all/readelf.exp (pr26548): Run for 32-bit too.
2021-02-17read_leb128 overflow checkingAlan Modra4-22/+95
There is a tiny error left in dwarf.c:read_leb128 after Nick fixed the signed overflow problem in code I wrote. It's to do with sleb128 values that have unnecessary excess bytes. For example, -1 is represented as 0x7f, the most efficient encoding, but also as 0xff,0x7f or 0xff,0xff,0x7f and so on. None of these sequences overflow any size signed value, but read_leb128 will report an overflow given enough excess bytes. This patch fixes that problem, and since the proper test for signed values with excess bytes can easily be adapted to also test a sleb byte with just some bits that overflow the result, I changed the code to not use signed right shifts. (The C standard ISO/IEC 9899:1999 6.5.7 says signed right shifts of negative values have an implementation defined value. A long time ago I even used a C compiler for a certain microprocessor that always did unsigned right shifts. Mind you, it is very unlikely to be compiling binutils with such a compiler.) bfd/ * wasm-module.c: Guard include of limits.h. (CHAR_BIT): Provide backup define. (wasm_read_leb128): Use CHAR_BIT to size "result" in bits. Correct signed overflow checking. opcodes/ * wasm32-dis.c: Include limits.h. (CHAR_BIT): Provide backup define. (wasm_read_leb128): Use CHAR_BIT to size "result" in bits. Correct signed overflow checking. binutils/ * dwarf.c: Include limits.h. (CHAR_BIT): Provide backup define. (read_leb128): Use CHAR_BIT to size "result" in bits. Correct signed overflow checking. * testsuite/binutils-all/pr26548.s, * testsuite/binutils-all/pr26548.d, * testsuite/binutils-all/pr26548e.d: New tests. * testsuite/binutils-all/readelf.exp: Run them. (readelf_test): Drop unused "xfails" parameter. Update all uses.
2021-02-15nds32_elf_get_relocated_section_contentsAlan Modra2-5/+1
nds32_elf_get_relocated_section_contents uses nds32_get_section_contents to read sections contents, but nds32_get_section_contents has the wrong behaviour as it calls bfd_malloc_and_get_section. That function always mallocs its output buffer, whereas get_relocated_section_contents must support an already allocated buffer. bfd/ * elf32-nds32.c (nds32_get_section_contents): Replace bfd_malloc_and_get_section with bfd_get_full_section_contents. (nds32_elf_relax_delete_blanks): Init contents. (nds32_elf_relax_section, nds32_relax_fp_as_gp): Likewise. binutils/ * testsuite/binutils-all/compress.exp: Remove nds32 xfails. * testsuite/binutils-all/objdump.exp: Likewise.
2021-02-12Change the readelf and objdump programs so that they will automatically ↵Nick Clifton3-7/+7
follow links to separate debug info files. * configure.ac (follow-debug-links): Add option to enable or disable the following of debug links by default. Set the default for the option to be 'follow'. * dwarf.c (do_follow_links): Initialise with DEFAULT_FOR_FOLLOW_LINKS. (dwarf_select_sections_by_names): Add no-follow-links option. (dwarf_select_sections_by_letter): Add 'N' option. * objdump.c (usage): Add conditional text describing the follow links option. (slurp_symtab): Ensure that there is a NULL entry at the end of the symbol table. (slurp_dynamic_symtab): Likewise. (dump_bfd): When extending the symbol table, ensure that there is still a NULL entry at the end. * readelf.c (usage): Add conditional text describing the follow links option. * doc/binutils.texi: Update documentation for objcopy and readelf. * doc/debug.options.texi: Update documentation of the follow-links option. * config.in: Regenerate. * configure: Regenerate. * testsuite/binutils-all/compress.exp: Add the -WN option to objdump command lines that are not expecting to follow links. * testsuite/binutils-all/readelf.exp: Add the --debug-dump=no-follow-links option to tests that are not expecting to follow debug links. gas * testsuite/gas/mach-o/sections-1.d: Stop automatic debug link following. * testsuite/gas/xgate/insns-dwarf2.d: Likewise. ld * testsuite/ld-elf/sec64k.exp: Stop readelf from automatically following debug links.
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