diff options
Diffstat (limited to 'gdb/ia64-tdep.c')
| -rw-r--r-- | gdb/ia64-tdep.c | 1271 |
1 files changed, 622 insertions, 649 deletions
diff --git a/gdb/ia64-tdep.c b/gdb/ia64-tdep.c index f446c41..ff6e57e 100644 --- a/gdb/ia64-tdep.c +++ b/gdb/ia64-tdep.c @@ -31,7 +31,7 @@ #include "target-float.h" #include "value.h" #include "objfiles.h" -#include "elf/common.h" /* for DT_PLTGOT value */ +#include "elf/common.h" /* for DT_PLTGOT value */ #include "elf-bfd.h" #include "dis-asm.h" #include "infcall.h" @@ -40,7 +40,7 @@ #include "cp-abi.h" #ifdef HAVE_LIBUNWIND_IA64_H -#include "elf/ia64.h" /* for PT_IA_64_UNWIND value */ +#include "elf/ia64.h" /* for PT_IA_64_UNWIND value */ #include "ia64-libunwind-tdep.h" /* Note: KERNEL_START is supposed to be an address which is not going @@ -61,12 +61,13 @@ #define KERNEL_START 0xc000000000000000ULL static size_t ktab_size = 0; + struct ia64_table_entry - { - uint64_t start_offset; - uint64_t end_offset; - uint64_t info_offset; - }; +{ + uint64_t start_offset; + uint64_t end_offset; + uint64_t info_offset; +}; static struct ia64_table_entry *ktab = NULL; static gdb::optional<gdb::byte_vector> ktab_buf; @@ -77,14 +78,14 @@ static gdb::optional<gdb::byte_vector> ktab_buf; enum ia64_instruction_type { - A, /* Integer ALU ; I-unit or M-unit */ - I, /* Non-ALU integer; I-unit */ - M, /* Memory ; M-unit */ - F, /* Floating-point ; F-unit */ - B, /* Branch ; B-unit */ - L, /* Extended (L+X) ; I-unit */ - X, /* Extended (L+X) ; I-unit */ - undefined /* undefined or reserved */ + A, /* Integer ALU ; I-unit or M-unit */ + I, /* Non-ALU integer; I-unit */ + M, /* Memory ; M-unit */ + F, /* Floating-point ; F-unit */ + B, /* Branch ; B-unit */ + L, /* Extended (L+X) ; I-unit */ + X, /* Extended (L+X) ; I-unit */ + undefined /* undefined or reserved */ }; /* We represent IA-64 PC addresses as the value of the instruction @@ -111,7 +112,7 @@ enum ia64_instruction_type /* See the saved memory layout comment for ia64_memory_insert_breakpoint. */ #if BREAKPOINT_MAX < BUNDLE_LEN - 2 -# error "BREAKPOINT_MAX < BUNDLE_LEN - 2" +#error "BREAKPOINT_MAX < BUNDLE_LEN - 2" #endif static gdbarch_init_ftype ia64_gdbarch_init; @@ -135,136 +136,159 @@ static int sp_regnum = IA64_GR12_REGNUM; pseudo-registers because they may not be accessible via the ptrace register get/set interfaces. */ -enum pseudo_regs { FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, - VBOF_REGNUM = IA64_NAT127_REGNUM + 1, V32_REGNUM, - V127_REGNUM = V32_REGNUM + 95, - VP0_REGNUM, VP16_REGNUM = VP0_REGNUM + 16, - VP63_REGNUM = VP0_REGNUM + 63, LAST_PSEUDO_REGNUM }; +enum pseudo_regs +{ + FIRST_PSEUDO_REGNUM = NUM_IA64_RAW_REGS, + VBOF_REGNUM = IA64_NAT127_REGNUM + 1, + V32_REGNUM, + V127_REGNUM = V32_REGNUM + 95, + VP0_REGNUM, + VP16_REGNUM = VP0_REGNUM + 16, + VP63_REGNUM = VP0_REGNUM + 63, + LAST_PSEUDO_REGNUM +}; /* Array of register names; There should be ia64_num_regs strings in the initializer. */ -static const char * const ia64_register_names[] = -{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", - "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", - "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", - "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - - "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", - "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", - "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", - "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", - "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", - "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", - "f48", "f49", "f50", "f51", "f52", "f53", "f54", "f55", - "f56", "f57", "f58", "f59", "f60", "f61", "f62", "f63", - "f64", "f65", "f66", "f67", "f68", "f69", "f70", "f71", - "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", - "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", - "f88", "f89", "f90", "f91", "f92", "f93", "f94", "f95", - "f96", "f97", "f98", "f99", "f100", "f101", "f102", "f103", - "f104", "f105", "f106", "f107", "f108", "f109", "f110", "f111", - "f112", "f113", "f114", "f115", "f116", "f117", "f118", "f119", - "f120", "f121", "f122", "f123", "f124", "f125", "f126", "f127", - - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", - - "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", - - "vfp", "vrap", - - "pr", "ip", "psr", "cfm", - - "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", "kr7", - "", "", "", "", "", "", "", "", - "rsc", "bsp", "bspstore", "rnat", - "", "fcr", "", "", - "eflag", "csd", "ssd", "cflg", "fsr", "fir", "fdr", "", - "ccv", "", "", "", "unat", "", "", "", - "fpsr", "", "", "", "itc", - "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", - "pfs", "lc", "ec", - "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", - "", "", "", "", "", "", "", "", "", "", +static const char *const ia64_register_names[] = { + "r0", "r1", "r2", "r3", "r4", "r5", "r6", + "r7", "r8", "r9", "r10", "r11", "r12", "r13", + "r14", "r15", "r16", "r17", "r18", "r19", "r20", + "r21", "r22", "r23", "r24", "r25", "r26", "r27", + "r28", "r29", "r30", "r31", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", + + "f0", "f1", "f2", "f3", "f4", "f5", "f6", + "f7", "f8", "f9", "f10", "f11", "f12", "f13", + "f14", "f15", "f16", "f17", "f18", "f19", "f20", + "f21", "f22", "f23", "f24", "f25", "f26", "f27", + "f28", "f29", "f30", "f31", "f32", "f33", "f34", + "f35", "f36", "f37", "f38", "f39", "f40", "f41", + "f42", "f43", "f44", "f45", "f46", "f47", "f48", + "f49", "f50", "f51", "f52", "f53", "f54", "f55", + "f56", "f57", "f58", "f59", "f60", "f61", "f62", + "f63", "f64", "f65", "f66", "f67", "f68", "f69", + "f70", "f71", "f72", "f73", "f74", "f75", "f76", + "f77", "f78", "f79", "f80", "f81", "f82", "f83", + "f84", "f85", "f86", "f87", "f88", "f89", "f90", + "f91", "f92", "f93", "f94", "f95", "f96", "f97", + "f98", "f99", "f100", "f101", "f102", "f103", "f104", + "f105", "f106", "f107", "f108", "f109", "f110", "f111", + "f112", "f113", "f114", "f115", "f116", "f117", "f118", + "f119", "f120", "f121", "f122", "f123", "f124", "f125", + "f126", "f127", + + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", - "nat0", "nat1", "nat2", "nat3", "nat4", "nat5", "nat6", "nat7", - "nat8", "nat9", "nat10", "nat11", "nat12", "nat13", "nat14", "nat15", - "nat16", "nat17", "nat18", "nat19", "nat20", "nat21", "nat22", "nat23", - "nat24", "nat25", "nat26", "nat27", "nat28", "nat29", "nat30", "nat31", - "nat32", "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39", - "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", "nat47", - "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", "nat54", "nat55", - "nat56", "nat57", "nat58", "nat59", "nat60", "nat61", "nat62", "nat63", - "nat64", "nat65", "nat66", "nat67", "nat68", "nat69", "nat70", "nat71", - "nat72", "nat73", "nat74", "nat75", "nat76", "nat77", "nat78", "nat79", - "nat80", "nat81", "nat82", "nat83", "nat84", "nat85", "nat86", "nat87", - "nat88", "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95", - "nat96", "nat97", "nat98", "nat99", "nat100","nat101","nat102","nat103", - "nat104","nat105","nat106","nat107","nat108","nat109","nat110","nat111", - "nat112","nat113","nat114","nat115","nat116","nat117","nat118","nat119", - "nat120","nat121","nat122","nat123","nat124","nat125","nat126","nat127", + + "b0", "b1", "b2", "b3", "b4", "b5", "b6", + "b7", + + "vfp", "vrap", + + "pr", "ip", "psr", "cfm", + + "kr0", "kr1", "kr2", "kr3", "kr4", "kr5", "kr6", + "kr7", "", "", "", "", "", "", + "", "", "rsc", "bsp", "bspstore", "rnat", "", + "fcr", "", "", "eflag", "csd", "ssd", "cflg", + "fsr", "fir", "fdr", "", "ccv", "", "", + "", "unat", "", "", "", "fpsr", "", + "", "", "itc", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "pfs", "lc", "ec", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "", "", "", "", "", + "", "", "nat0", "nat1", "nat2", "nat3", "nat4", + "nat5", "nat6", "nat7", "nat8", "nat9", "nat10", "nat11", + "nat12", "nat13", "nat14", "nat15", "nat16", "nat17", "nat18", + "nat19", "nat20", "nat21", "nat22", "nat23", "nat24", "nat25", + "nat26", "nat27", "nat28", "nat29", "nat30", "nat31", "nat32", + "nat33", "nat34", "nat35", "nat36", "nat37", "nat38", "nat39", + "nat40", "nat41", "nat42", "nat43", "nat44", "nat45", "nat46", + "nat47", "nat48", "nat49", "nat50", "nat51", "nat52", "nat53", + "nat54", "nat55", "nat56", "nat57", "nat58", "nat59", "nat60", + "nat61", "nat62", "nat63", "nat64", "nat65", "nat66", "nat67", + "nat68", "nat69", "nat70", "nat71", "nat72", "nat73", "nat74", + "nat75", "nat76", "nat77", "nat78", "nat79", "nat80", "nat81", + "nat82", "nat83", "nat84", "nat85", "nat86", "nat87", "nat88", + "nat89", "nat90", "nat91", "nat92", "nat93", "nat94", "nat95", + "nat96", "nat97", "nat98", "nat99", "nat100", "nat101", "nat102", + "nat103", "nat104", "nat105", "nat106", "nat107", "nat108", "nat109", + "nat110", "nat111", "nat112", "nat113", "nat114", "nat115", "nat116", + "nat117", "nat118", "nat119", "nat120", "nat121", "nat122", "nat123", + "nat124", "nat125", "nat126", "nat127", "bof", - - "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", - "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", - "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", - "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63", - "r64", "r65", "r66", "r67", "r68", "r69", "r70", "r71", - "r72", "r73", "r74", "r75", "r76", "r77", "r78", "r79", - "r80", "r81", "r82", "r83", "r84", "r85", "r86", "r87", - "r88", "r89", "r90", "r91", "r92", "r93", "r94", "r95", - "r96", "r97", "r98", "r99", "r100", "r101", "r102", "r103", - "r104", "r105", "r106", "r107", "r108", "r109", "r110", "r111", - "r112", "r113", "r114", "r115", "r116", "r117", "r118", "r119", - "r120", "r121", "r122", "r123", "r124", "r125", "r126", "r127", - - "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", - "p8", "p9", "p10", "p11", "p12", "p13", "p14", "p15", - "p16", "p17", "p18", "p19", "p20", "p21", "p22", "p23", - "p24", "p25", "p26", "p27", "p28", "p29", "p30", "p31", - "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", - "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", - "p48", "p49", "p50", "p51", "p52", "p53", "p54", "p55", - "p56", "p57", "p58", "p59", "p60", "p61", "p62", "p63", + + "r32", "r33", "r34", "r35", "r36", "r37", "r38", + "r39", "r40", "r41", "r42", "r43", "r44", "r45", + "r46", "r47", "r48", "r49", "r50", "r51", "r52", + "r53", "r54", "r55", "r56", "r57", "r58", "r59", + "r60", "r61", "r62", "r63", "r64", "r65", "r66", + "r67", "r68", "r69", "r70", "r71", "r72", "r73", + "r74", "r75", "r76", "r77", "r78", "r79", "r80", + "r81", "r82", "r83", "r84", "r85", "r86", "r87", + "r88", "r89", "r90", "r91", "r92", "r93", "r94", + "r95", "r96", "r97", "r98", "r99", "r100", "r101", + "r102", "r103", "r104", "r105", "r106", "r107", "r108", + "r109", "r110", "r111", "r112", "r113", "r114", "r115", + "r116", "r117", "r118", "r119", "r120", "r121", "r122", + "r123", "r124", "r125", "r126", "r127", + + "p0", "p1", "p2", "p3", "p4", "p5", "p6", + "p7", "p8", "p9", "p10", "p11", "p12", "p13", + "p14", "p15", "p16", "p17", "p18", "p19", "p20", + "p21", "p22", "p23", "p24", "p25", "p26", "p27", + "p28", "p29", "p30", "p31", "p32", "p33", "p34", + "p35", "p36", "p37", "p38", "p39", "p40", "p41", + "p42", "p43", "p44", "p45", "p46", "p47", "p48", + "p49", "p50", "p51", "p52", "p53", "p54", "p55", + "p56", "p57", "p58", "p59", "p60", "p61", "p62", + "p63", }; struct ia64_frame_cache { - CORE_ADDR base; /* frame pointer base for frame */ - CORE_ADDR pc; /* function start pc for frame */ - CORE_ADDR saved_sp; /* stack pointer for frame */ - CORE_ADDR bsp; /* points at r32 for the current frame */ - CORE_ADDR cfm; /* cfm value for current frame */ - CORE_ADDR prev_cfm; /* cfm value for previous frame */ - int frameless; - int sof; /* Size of frame (decoded from cfm value). */ - int sol; /* Size of locals (decoded from cfm value). */ - int sor; /* Number of rotating registers (decoded from + CORE_ADDR base; /* frame pointer base for frame */ + CORE_ADDR pc; /* function start pc for frame */ + CORE_ADDR saved_sp; /* stack pointer for frame */ + CORE_ADDR bsp; /* points at r32 for the current frame */ + CORE_ADDR cfm; /* cfm value for current frame */ + CORE_ADDR prev_cfm; /* cfm value for previous frame */ + int frameless; + int sof; /* Size of frame (decoded from cfm value). */ + int sol; /* Size of locals (decoded from cfm value). */ + int sor; /* Number of rotating registers (decoded from cfm value). */ CORE_ADDR after_prologue; /* Address of first instruction after the last @@ -274,13 +298,12 @@ struct ia64_frame_cache int mem_stack_frame_size; /* Size of the memory stack frame (may be zero), or -1 if it has not been determined yet. */ - int fp_reg; /* Register number (if any) used a frame pointer + int fp_reg; /* Register number (if any) used a frame pointer for this frame. 0 if no register is being used as the frame pointer. */ - + /* Saved registers. */ CORE_ADDR saved_regs[NUM_IA64_RAW_REGS]; - }; static int @@ -289,23 +312,37 @@ floatformat_valid (const struct floatformat *fmt, const void *from) return 1; } -static const struct floatformat floatformat_ia64_ext_little = -{ - floatformat_little, 82, 0, 1, 17, 65535, 0x1ffff, 18, 64, - floatformat_intbit_yes, "floatformat_ia64_ext_little", floatformat_valid, NULL -}; - -static const struct floatformat floatformat_ia64_ext_big = -{ - floatformat_big, 82, 46, 47, 17, 65535, 0x1ffff, 64, 64, - floatformat_intbit_yes, "floatformat_ia64_ext_big", floatformat_valid -}; - -static const struct floatformat *floatformats_ia64_ext[2] = -{ - &floatformat_ia64_ext_big, - &floatformat_ia64_ext_little -}; +static const struct floatformat floatformat_ia64_ext_little + = { floatformat_little, + 82, + 0, + 1, + 17, + 65535, + 0x1ffff, + 18, + 64, + floatformat_intbit_yes, + "floatformat_ia64_ext_little", + floatformat_valid, + NULL }; + +static const struct floatformat floatformat_ia64_ext_big + = { floatformat_big, + 82, + 46, + 47, + 17, + 65535, + 0x1ffff, + 64, + 64, + floatformat_intbit_yes, + "floatformat_ia64_ext_big", + floatformat_valid }; + +static const struct floatformat *floatformats_ia64_ext[2] + = { &floatformat_ia64_ext_big, &floatformat_ia64_ext_little }; static struct type * ia64_ext_type (struct gdbarch *gdbarch) @@ -339,7 +376,7 @@ ia64_register_reggroup_p (struct gdbarch *gdbarch, int regnum, if (group == general_reggroup) return (!vector_p && !float_p); if (group == save_reggroup || group == restore_reggroup) - return raw_p; + return raw_p; return 0; } @@ -366,7 +403,6 @@ ia64_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) return reg; } - /* Extract ``len'' bits from an instruction bundle starting at bit ``from''. */ @@ -388,7 +424,7 @@ extract_bit_field (const gdb_byte *bundle, int from, int len) result = c >> (from % 8); lshift = 8 - (from % 8); - for (i = from_byte+1; i < to_byte; i++) + for (i = from_byte + 1; i < to_byte; i++) { result |= ((long long) b[i]) << lshift; lshift += 8; @@ -435,7 +471,7 @@ replace_bit_field (gdb_byte *bundle, long long val, int from, int len) b[from_byte] = c; val >>= 8 - from % 8; - for (i = from_byte+1; i < to_byte; i++) + for (i = from_byte + 1; i < to_byte; i++) { c = val & 0xff; val >>= 8; @@ -459,7 +495,7 @@ replace_bit_field (gdb_byte *bundle, long long val, int from, int len) static long long slotN_contents (gdb_byte *bundle, int slotnum) { - return extract_bit_field (bundle, 5+41*slotnum, 41); + return extract_bit_field (bundle, 5 + 41 * slotnum, 41); } /* Store an instruction in an instruction bundle. */ @@ -467,43 +503,42 @@ slotN_contents (gdb_byte *bundle, int slotnum) static void replace_slotN_contents (gdb_byte *bundle, long long instr, int slotnum) { - replace_bit_field (bundle, instr, 5+41*slotnum, 41); -} - -static const enum ia64_instruction_type template_encoding_table[32][3] = -{ - { M, I, I }, /* 00 */ - { M, I, I }, /* 01 */ - { M, I, I }, /* 02 */ - { M, I, I }, /* 03 */ - { M, L, X }, /* 04 */ - { M, L, X }, /* 05 */ - { undefined, undefined, undefined }, /* 06 */ - { undefined, undefined, undefined }, /* 07 */ - { M, M, I }, /* 08 */ - { M, M, I }, /* 09 */ - { M, M, I }, /* 0A */ - { M, M, I }, /* 0B */ - { M, F, I }, /* 0C */ - { M, F, I }, /* 0D */ - { M, M, F }, /* 0E */ - { M, M, F }, /* 0F */ - { M, I, B }, /* 10 */ - { M, I, B }, /* 11 */ - { M, B, B }, /* 12 */ - { M, B, B }, /* 13 */ - { undefined, undefined, undefined }, /* 14 */ - { undefined, undefined, undefined }, /* 15 */ - { B, B, B }, /* 16 */ - { B, B, B }, /* 17 */ - { M, M, B }, /* 18 */ - { M, M, B }, /* 19 */ - { undefined, undefined, undefined }, /* 1A */ - { undefined, undefined, undefined }, /* 1B */ - { M, F, B }, /* 1C */ - { M, F, B }, /* 1D */ - { undefined, undefined, undefined }, /* 1E */ - { undefined, undefined, undefined }, /* 1F */ + replace_bit_field (bundle, instr, 5 + 41 * slotnum, 41); +} + +static const enum ia64_instruction_type template_encoding_table[32][3] = { + { M, I, I }, /* 00 */ + { M, I, I }, /* 01 */ + { M, I, I }, /* 02 */ + { M, I, I }, /* 03 */ + { M, L, X }, /* 04 */ + { M, L, X }, /* 05 */ + { undefined, undefined, undefined }, /* 06 */ + { undefined, undefined, undefined }, /* 07 */ + { M, M, I }, /* 08 */ + { M, M, I }, /* 09 */ + { M, M, I }, /* 0A */ + { M, M, I }, /* 0B */ + { M, F, I }, /* 0C */ + { M, F, I }, /* 0D */ + { M, M, F }, /* 0E */ + { M, M, F }, /* 0F */ + { M, I, B }, /* 10 */ + { M, I, B }, /* 11 */ + { M, B, B }, /* 12 */ + { M, B, B }, /* 13 */ + { undefined, undefined, undefined }, /* 14 */ + { undefined, undefined, undefined }, /* 15 */ + { B, B, B }, /* 16 */ + { B, B, B }, /* 17 */ + { M, M, B }, /* 18 */ + { M, M, B }, /* 19 */ + { undefined, undefined, undefined }, /* 1A */ + { undefined, undefined, undefined }, /* 1B */ + { M, F, B }, /* 1C */ + { M, F, B }, /* 1D */ + { undefined, undefined, undefined }, /* 1E */ + { undefined, undefined, undefined }, /* 1F */ }; /* Fetch and (partially) decode an instruction at ADDR and return the @@ -532,8 +567,8 @@ fetch_instruction (CORE_ADDR addr, ia64_instruction_type *it, long long *instr) at the assembly language level. */ if (slotnum > 2) { - warning (_("Can't fetch instructions for slot numbers greater than 2.\n" - "Using slot 0 instead")); + warning (_ ("Can't fetch instructions for slot numbers greater than 2.\n" + "Using slot 0 instead")); slotnum = 0; } @@ -546,7 +581,7 @@ fetch_instruction (CORE_ADDR addr, ia64_instruction_type *it, long long *instr) *instr = slotN_contents (bundle, slotnum); templ = extract_bit_field (bundle, 0, 5); - *it = template_encoding_table[(int)templ][slotnum]; + *it = template_encoding_table[(int) templ][slotnum]; if (slotnum == 2 || (slotnum == 1 && *it == L)) addr += 16; @@ -647,7 +682,7 @@ ia64_memory_insert_breakpoint (struct gdbarch *gdbarch, int templ; if (slotnum > 2) - error (_("Can't insert breakpoint for slot numbers greater than 2.")); + error (_ ("Can't insert breakpoint for slot numbers greater than 2.")); addr &= ~0x0f; @@ -678,7 +713,7 @@ ia64_memory_insert_breakpoint (struct gdbarch *gdbarch, address, as this is the second half of an instruction that lives in slot 1 of that bundle. */ gdb_assert (slotnum == 2); - error (_("Can't insert breakpoint for non-existing slot X")); + error (_ ("Can't insert breakpoint for non-existing slot X")); } if (template_encoding_table[templ][slotnum] == L) { @@ -713,7 +748,7 @@ ia64_memory_insert_breakpoint (struct gdbarch *gdbarch, a single instance by update_global_location_list. */ instr_breakpoint = slotN_contents (bundle, slotnum); if (instr_breakpoint == IA64_BREAKPOINT) - internal_error (_("Address %s already contains a breakpoint."), + internal_error (_ ("Address %s already contains a breakpoint."), paddress (gdbarch, bp_tgt->placed_address)); replace_slotN_contents (bundle, IA64_BREAKPOINT, slotnum); @@ -760,8 +795,8 @@ ia64_memory_remove_breakpoint (struct gdbarch *gdbarch, for us attempting to remove one there, except if the program's code somehow got modified in memory. */ gdb_assert (slotnum == 2); - warning (_("Cannot remove breakpoint at address %s from non-existing " - "X-type slot, memory has changed underneath"), + warning (_ ("Cannot remove breakpoint at address %s from non-existing " + "X-type slot, memory has changed underneath"), paddress (gdbarch, bp_tgt->placed_address)); return -1; } @@ -779,8 +814,8 @@ ia64_memory_remove_breakpoint (struct gdbarch *gdbarch, instr_breakpoint = slotN_contents (bundle_mem, slotnum); if (instr_breakpoint != IA64_BREAKPOINT) { - warning (_("Cannot remove breakpoint at address %s, " - "no break instruction at such address."), + warning (_ ("Cannot remove breakpoint at address %s, " + "no break instruction at such address."), paddress (gdbarch, bp_tgt->placed_address)); return -1; } @@ -816,8 +851,8 @@ ia64_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr) make a match for permanent breakpoints. */ static const gdb_byte * -ia64_breakpoint_from_pc (struct gdbarch *gdbarch, - CORE_ADDR *pcptr, int *lenptr) +ia64_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr, + int *lenptr) { CORE_ADDR addr = *pcptr; static gdb_byte bundle[BUNDLE_LEN]; @@ -827,7 +862,7 @@ ia64_breakpoint_from_pc (struct gdbarch *gdbarch, int templ; if (slotnum > 2) - error (_("Can't insert breakpoint for slot numbers greater than 2.")); + error (_ ("Can't insert breakpoint for slot numbers greater than 2.")); addr &= ~0x0f; @@ -857,7 +892,7 @@ ia64_breakpoint_from_pc (struct gdbarch *gdbarch, if (template_encoding_table[templ][slotnum] == X) { gdb_assert (slotnum == 2); - error (_("Can't insert breakpoint for non-existing slot X")); + error (_ ("Can't insert breakpoint for non-existing slot X")); } if (template_encoding_table[templ][slotnum] == L) { @@ -896,7 +931,7 @@ ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc) regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr_value); psr_value &= ~(3LL << 41); - psr_value |= (ULONGEST)(slot_num & 0x3) << 41; + psr_value |= (ULONGEST) (slot_num & 0x3) << 41; new_pc &= ~0xfLL; @@ -909,7 +944,7 @@ ia64_write_pc (struct regcache *regcache, CORE_ADDR new_pc) /* Returns the address of the slot that's NSLOTS slots away from the address ADDR. NSLOTS may be positive or negative. */ static CORE_ADDR -rse_address_add(CORE_ADDR addr, int nslots) +rse_address_add (CORE_ADDR addr, int nslots) { CORE_ADDR new_addr; int mandatory_nat_slots = nslots / 63; @@ -917,18 +952,19 @@ rse_address_add(CORE_ADDR addr, int nslots) new_addr = addr + 8 * (nslots + mandatory_nat_slots); - if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9)) + if ((new_addr >> 9) != ((addr + 8 * 64 * mandatory_nat_slots) >> 9)) new_addr += 8 * direction; - if (IS_NaT_COLLECTION_ADDR(new_addr)) + if (IS_NaT_COLLECTION_ADDR (new_addr)) new_addr += 8 * direction; return new_addr; } static enum register_status -ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, - int regnum, gdb_byte *buf) +ia64_pseudo_register_read (struct gdbarch *gdbarch, + readable_regcache *regcache, int regnum, + gdb_byte *buf) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); enum register_status status; @@ -962,11 +998,11 @@ ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, subtract the size of frame from it to get start of register frame. */ bsp = rse_address_add (bsp, -(cfm & 0x7f)); - - if ((cfm & 0x7f) > regnum - V32_REGNUM) + + if ((cfm & 0x7f) > regnum - V32_REGNUM) { ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); - reg = read_memory_integer ((CORE_ADDR)reg_addr, 8, byte_order); + reg = read_memory_integer ((CORE_ADDR) reg_addr, 8, byte_order); store_unsigned_integer (buf, register_size (gdbarch, regnum), byte_order, reg); } @@ -984,8 +1020,8 @@ ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, if (status != REG_VALID) return status; unatN_val = (unat & (1LL << (regnum - IA64_NAT0_REGNUM))) != 0; - store_unsigned_integer (buf, register_size (gdbarch, regnum), - byte_order, unatN_val); + store_unsigned_integer (buf, register_size (gdbarch, regnum), byte_order, + unatN_val); } else if (IA64_NAT32_REGNUM <= regnum && regnum <= IA64_NAT127_REGNUM) { @@ -1005,10 +1041,10 @@ ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, /* The bsp points at the end of the register frame so we subtract the size of frame from it to get start of register frame. */ bsp = rse_address_add (bsp, -(cfm & 0x7f)); - - if ((cfm & 0x7f) > regnum - V32_REGNUM) + + if ((cfm & 0x7f) > regnum - V32_REGNUM) gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); - + if (gr_addr != 0) { /* Compute address of nat collection bits. */ @@ -1025,9 +1061,9 @@ ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, nat_bit = (gr_addr >> 3) & 0x3f; natN_val = (nat_collection >> nat_bit) & 1; } - - store_unsigned_integer (buf, register_size (gdbarch, regnum), - byte_order, natN_val); + + store_unsigned_integer (buf, register_size (gdbarch, regnum), byte_order, + natN_val); } else if (regnum == VBOF_REGNUM) { @@ -1046,8 +1082,8 @@ ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, /* The bsp points at the end of the register frame so we subtract the size of frame from it to get beginning of frame. */ vbsp = rse_address_add (bsp, -(cfm & 0x7f)); - store_unsigned_integer (buf, register_size (gdbarch, regnum), - byte_order, vbsp); + store_unsigned_integer (buf, register_size (gdbarch, regnum), byte_order, + vbsp); } else if (VP0_REGNUM <= regnum && regnum <= VP63_REGNUM) { @@ -1069,12 +1105,11 @@ ia64_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache, int rrb_pr = (cfm >> 32) & 0x3f; /* Adjust the register number to account for register rotation. */ - regnum = VP16_REGNUM - + ((regnum - VP16_REGNUM) + rrb_pr) % 48; + regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48; } prN_val = (pr & (1LL << (regnum - VP0_REGNUM))) != 0; - store_unsigned_integer (buf, register_size (gdbarch, regnum), - byte_order, prN_val); + store_unsigned_integer (buf, register_size (gdbarch, regnum), byte_order, + prN_val); } else memset (buf, 0, register_size (gdbarch, regnum)); @@ -1096,8 +1131,8 @@ ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); bsp = rse_address_add (bsp, -(cfm & 0x7f)); - - if ((cfm & 0x7f) > regnum - V32_REGNUM) + + if ((cfm & 0x7f) > regnum - V32_REGNUM) { ULONGEST reg_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); write_memory (reg_addr, buf, 8); @@ -1107,9 +1142,9 @@ ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, { ULONGEST unatN_val, unat, unatN_mask; regcache_cooked_read_unsigned (regcache, IA64_UNAT_REGNUM, &unat); - unatN_val = extract_unsigned_integer (buf, register_size (gdbarch, - regnum), - byte_order); + unatN_val + = extract_unsigned_integer (buf, register_size (gdbarch, regnum), + byte_order); unatN_mask = (1LL << (regnum - IA64_NAT0_REGNUM)); if (unatN_val == 0) unat &= ~unatN_mask; @@ -1129,13 +1164,13 @@ ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, /* The bsp points at the end of the register frame so we subtract the size of frame from it to get start of register frame. */ bsp = rse_address_add (bsp, -(cfm & 0x7f)); - - if ((cfm & 0x7f) > regnum - V32_REGNUM) + + if ((cfm & 0x7f) > regnum - V32_REGNUM) gr_addr = rse_address_add (bsp, (regnum - V32_REGNUM)); - - natN_val = extract_unsigned_integer (buf, register_size (gdbarch, - regnum), - byte_order); + + natN_val + = extract_unsigned_integer (buf, register_size (gdbarch, regnum), + byte_order); if (gr_addr != 0 && (natN_val == 0 || natN_val == 1)) { @@ -1149,8 +1184,7 @@ ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, collection from the computed address. */ if (nat_addr >= bsp) { - regcache_cooked_read_unsigned (regcache, - IA64_RNAT_REGNUM, + regcache_cooked_read_unsigned (regcache, IA64_RNAT_REGNUM, &nat_collection); if (natN_val) nat_collection |= natN_mask; @@ -1190,8 +1224,7 @@ ia64_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, int rrb_pr = (cfm >> 32) & 0x3f; /* Adjust the register number to account for register rotation. */ - regnum = VP16_REGNUM - + ((regnum - VP16_REGNUM) + rrb_pr) % 48; + regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48; } prN_val = extract_unsigned_integer (buf, register_size (gdbarch, regnum), byte_order); @@ -1216,19 +1249,17 @@ ia64_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type) } static int -ia64_register_to_value (frame_info_ptr frame, int regnum, - struct type *valtype, gdb_byte *out, - int *optimizedp, int *unavailablep) +ia64_register_to_value (frame_info_ptr frame, int regnum, struct type *valtype, + gdb_byte *out, int *optimizedp, int *unavailablep) { struct gdbarch *gdbarch = get_frame_arch (frame); gdb_byte in[IA64_FP_REGISTER_SIZE]; /* Convert to TYPE. */ - if (!get_frame_register_bytes (frame, regnum, 0, - gdb::make_array_view (in, - register_size (gdbarch, - regnum)), - optimizedp, unavailablep)) + if (!get_frame_register_bytes ( + frame, regnum, 0, + gdb::make_array_view (in, register_size (gdbarch, regnum)), optimizedp, + unavailablep)) return 0; target_float_convert (in, ia64_ext_type (gdbarch), out, valtype); @@ -1237,8 +1268,8 @@ ia64_register_to_value (frame_info_ptr frame, int regnum, } static void -ia64_value_to_register (frame_info_ptr frame, int regnum, - struct type *valtype, const gdb_byte *in) +ia64_value_to_register (frame_info_ptr frame, int regnum, struct type *valtype, + const gdb_byte *in) { struct gdbarch *gdbarch = get_frame_arch (frame); gdb_byte out[IA64_FP_REGISTER_SIZE]; @@ -1246,7 +1277,6 @@ ia64_value_to_register (frame_info_ptr frame, int regnum, put_frame_register (frame, regnum, out); } - /* Limit the number of skipped non-prologue instructions since examining of the prologue is expensive. */ static int max_skip_non_prologue_insns = 40; @@ -1292,16 +1322,15 @@ refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit) found for the function. (It can be less than when the scheduler puts a body instruction before the first prologue instruction.) */ - for (i = 2 * max_skip_non_prologue_insns; - i > 0 && (lim_pc == 0 || addr < lim_pc); - i--) + for (i = 2 * max_skip_non_prologue_insns; + i > 0 && (lim_pc == 0 || addr < lim_pc); i--) { struct symtab_and_line sal; sal = find_pc_line (addr, 0); if (sal.line == 0) break; - if (sal.line <= prologue_sal.line + if (sal.line <= prologue_sal.line && sal.symtab == prologue_sal.symtab) { prologue_sal = sal; @@ -1319,13 +1348,14 @@ refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc, int *trust_limit) return lim_pc; } -#define isScratch(_regnum_) ((_regnum_) == 2 || (_regnum_) == 3 \ - || (8 <= (_regnum_) && (_regnum_) <= 11) \ - || (14 <= (_regnum_) && (_regnum_) <= 31)) -#define imm9(_instr_) \ - ( ((((_instr_) & 0x01000000000LL) ? -1 : 0) << 8) \ - | (((_instr_) & 0x00008000000LL) >> 20) \ - | (((_instr_) & 0x00000001fc0LL) >> 6)) +#define isScratch(_regnum_) \ + ((_regnum_) == 2 || (_regnum_) == 3 \ + || (8 <= (_regnum_) && (_regnum_) <= 11) \ + || (14 <= (_regnum_) && (_regnum_) <= 31)) +#define imm9(_instr_) \ + (((((_instr_) &0x01000000000LL) ? -1 : 0) << 8) \ + | (((_instr_) &0x00008000000LL) >> 20) \ + | (((_instr_) &0x00000001fc0LL) >> 6)) /* Allocate and initialize a frame cache. */ @@ -1356,21 +1386,20 @@ ia64_alloc_frame_cache (void) } static CORE_ADDR -examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, - frame_info_ptr this_frame, +examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, frame_info_ptr this_frame, struct ia64_frame_cache *cache) { CORE_ADDR next_pc; CORE_ADDR last_prologue_pc = pc; ia64_instruction_type it; long long instr; - int cfm_reg = 0; - int ret_reg = 0; - int fp_reg = 0; + int cfm_reg = 0; + int ret_reg = 0; + int fp_reg = 0; int unat_save_reg = 0; int pr_save_reg = 0; int mem_stack_frame_size = 0; - int spill_reg = 0; + int spill_reg = 0; CORE_ADDR spill_addr = 0; char instores[8]; char infpstores[8]; @@ -1386,8 +1415,7 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, memset (infpstores, 0, sizeof infpstores); memset (reg_contents, 0, sizeof reg_contents); - if (cache->after_prologue != 0 - && cache->after_prologue <= lim_pc) + if (cache->after_prologue != 0 && cache->after_prologue <= lim_pc) return cache->after_prologue; lim_pc = refine_prologue_limit (pc, lim_pc, &trust_limit); @@ -1395,8 +1423,8 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, /* We want to check if we have a recognizable function start before we look ahead for a prologue. */ - if (pc < lim_pc && next_pc - && it == M && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL)) + if (pc < lim_pc && next_pc && it == M + && ((instr & 0x1ee0000003fLL) == 0x02c00000000LL)) { /* alloc - start of a regular function. */ int sol_bits = (int) ((instr & 0x00007f00000LL) >> 20); @@ -1408,9 +1436,9 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, we do not want to interpret the prologue and calculate the addresses of various registers such as the return address. We will instead treat the frame as frameless. */ - if (!this_frame || - (sof_bits == (cache->cfm & 0x7f) && - sol_bits == ((cache->cfm >> 7) & 0x7f))) + if (!this_frame + || (sof_bits == (cache->cfm & 0x7f) + && sol_bits == ((cache->cfm >> 7) & 0x7f))) frameless = 0; cfm_reg = rN; @@ -1420,12 +1448,11 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, else { /* Look for a leaf routine. */ - if (pc < lim_pc && next_pc - && (it == I || it == M) + if (pc < lim_pc && next_pc && (it == I || it == M) && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) { /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ - int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) + int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) | ((instr & 0x001f8000000LL) >> 20) | ((instr & 0x000000fe000LL) >> 13)); int rM = (int) ((instr & 0x00007f00000LL) >> 20); @@ -1437,13 +1464,13 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, fp_reg = rN; last_prologue_pc = next_pc; } - } + } /* If we don't recognize a regular function or leaf routine, we are done. */ if (!fp_reg) { - pc = lim_pc; + pc = lim_pc; if (trust_limit) last_prologue_pc = lim_pc; } @@ -1459,16 +1486,15 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, if (it == B && ((instr & 0x1e1f800003fLL) != 0x04000000000LL)) { - /* Exit loop upon hitting a non-nop branch instruction. */ + /* Exit loop upon hitting a non-nop branch instruction. */ if (trust_limit) lim_pc = pc; break; } - else if (((instr & 0x3fLL) != 0LL) && - (frameless || ret_reg != 0)) + else if (((instr & 0x3fLL) != 0LL) && (frameless || ret_reg != 0)) { /* Exit loop upon hitting a predicated instruction if - we already have the return register or if we are frameless. */ + we already have the return register or if we are frameless. */ if (trust_limit) lim_pc = pc; break; @@ -1486,11 +1512,11 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, last_prologue_pc = next_pc; } } - else if ((it == I || it == M) - && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) + else if ((it == I || it == M) + && ((instr & 0x1ee00000000LL) == 0x10800000000LL)) { /* adds rN = imm14, rM (or mov rN, rM when imm14 is 0) */ - int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) + int imm = (int) ((((instr & 0x01000000000LL) ? -1 : 0) << 13) | ((instr & 0x001f8000000LL) >> 20) | ((instr & 0x000000fe000LL) >> 13)); int rM = (int) ((instr & 0x00007f00000LL) >> 20); @@ -1509,8 +1535,8 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, mem_stack_frame_size -= imm; last_prologue_pc = next_pc; } - else if (qp == 0 && rN == 2 - && ((rM == fp_reg && fp_reg != 0) || rM == 12)) + else if (qp == 0 && rN == 2 + && ((rM == fp_reg && fp_reg != 0) || rM == 12)) { CORE_ADDR saved_sp = 0; /* adds r2, spilloffset, rFramePointer @@ -1526,38 +1552,35 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, where the pc is. If it's still early in the prologue this'll be wrong. FIXME */ if (this_frame) - saved_sp = get_frame_register_unsigned (this_frame, - sp_regnum); - spill_addr = saved_sp - + (rM == 12 ? 0 : mem_stack_frame_size) - + imm; - spill_reg = rN; + saved_sp = get_frame_register_unsigned (this_frame, sp_regnum); + spill_addr + = saved_sp + (rM == 12 ? 0 : mem_stack_frame_size) + imm; + spill_reg = rN; last_prologue_pc = next_pc; } - else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM-32] && - rN < 256 && imm == 0) + else if (qp == 0 && rM >= 32 && rM < 40 && !instores[rM - 32] + && rN < 256 && imm == 0) { /* mov rN, rM where rM is an input register. */ reg_contents[rN] = rM; last_prologue_pc = next_pc; } - else if (frameless && qp == 0 && rN == fp_reg && imm == 0 && - rM == 2) + else if (frameless && qp == 0 && rN == fp_reg && imm == 0 && rM == 2) { /* mov r12, r2 */ last_prologue_pc = next_pc; break; } } - else if (it == M - && ( ((instr & 0x1efc0000000LL) == 0x0eec0000000LL) - || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL) )) + else if (it == M + && (((instr & 0x1efc0000000LL) == 0x0eec0000000LL) + || ((instr & 0x1ffc8000000LL) == 0x0cec0000000LL))) { /* stf.spill [rN] = fM, imm9 or stf.spill [rN] = fM */ - int imm = imm9(instr); + int imm = imm9 (instr); int rN = (int) ((instr & 0x00007f00000LL) >> 20); int fM = (int) ((instr & 0x000000fe000LL) >> 13); int qp = (int) (instr & 0x0000000003fLL); @@ -1569,20 +1592,20 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, if ((instr & 0x1efc0000000LL) == 0x0eec0000000LL) spill_addr += imm; else - spill_addr = 0; /* last one; must be done. */ + spill_addr = 0; /* last one; must be done. */ last_prologue_pc = next_pc; } } else if ((it == M && ((instr & 0x1eff8000000LL) == 0x02110000000LL)) - || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL)) ) + || (it == I && ((instr & 0x1eff8000000LL) == 0x00050000000LL))) { /* mov.m rN = arM or mov.i rN = arM */ int arM = (int) ((instr & 0x00007f00000LL) >> 20); - int rN = (int) ((instr & 0x00000001fc0LL) >> 6); - int qp = (int) (instr & 0x0000000003fLL); + int rN = (int) ((instr & 0x00000001fc0LL) >> 6); + int qp = (int) (instr & 0x0000000003fLL); if (qp == 0 && isScratch (rN) && arM == 36 /* ar.unat */) { /* We have something like "mov.m r3 = ar.unat". Remember the @@ -1594,17 +1617,17 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, else if (it == I && ((instr & 0x1eff8000000LL) == 0x00198000000LL)) { /* mov rN = pr */ - int rN = (int) ((instr & 0x00000001fc0LL) >> 6); - int qp = (int) (instr & 0x0000000003fLL); + int rN = (int) ((instr & 0x00000001fc0LL) >> 6); + int qp = (int) (instr & 0x0000000003fLL); if (qp == 0 && isScratch (rN)) { pr_save_reg = rN; last_prologue_pc = next_pc; } } - else if (it == M - && ( ((instr & 0x1ffc8000000LL) == 0x08cc0000000LL) - || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL))) + else if (it == M + && (((instr & 0x1ffc8000000LL) == 0x08cc0000000LL) + || ((instr & 0x1efc0000000LL) == 0x0acc0000000LL))) { /* st8 [rN] = rM or @@ -1634,22 +1657,22 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, } if ((instr & 0x1efc0000000LL) == 0x0acc0000000LL) /* st8 [rN] = rM, imm9 */ - spill_addr += imm9(instr); + spill_addr += imm9 (instr); else - spill_addr = 0; /* Must be done spilling. */ + spill_addr = 0; /* Must be done spilling. */ last_prologue_pc = next_pc; } - else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) + else if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM - 32]) { /* Allow up to one store of each input register. */ - instores[rM-32] = 1; + instores[rM - 32] = 1; last_prologue_pc = next_pc; } - else if (qp == 0 && 32 <= indirect && indirect < 40 && - !instores[indirect-32]) + else if (qp == 0 && 32 <= indirect && indirect < 40 + && !instores[indirect - 32]) { /* Allow an indirect store of an input register. */ - instores[indirect-32] = 1; + instores[indirect - 32] = 1; last_prologue_pc = next_pc; } } @@ -1667,16 +1690,16 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, int rM = (int) ((instr & 0x000000fe000LL) >> 13); int qp = (int) (instr & 0x0000000003fLL); int indirect = rM < 256 ? reg_contents[rM] : 0; - if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM-32]) + if (qp == 0 && 32 <= rM && rM < 40 && !instores[rM - 32]) { - instores[rM-32] = 1; + instores[rM - 32] = 1; last_prologue_pc = next_pc; } - else if (qp == 0 && 32 <= indirect && indirect < 40 && - !instores[indirect-32]) + else if (qp == 0 && 32 <= indirect && indirect < 40 + && !instores[indirect - 32]) { /* Allow an indirect store of an input register. */ - instores[indirect-32] = 1; + instores[indirect - 32] = 1; last_prologue_pc = next_pc; } } @@ -1693,13 +1716,13 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, int qp = (int) (instr & 0x0000000003fLL); if (qp == 0 && 8 <= fM && fM < 16 && !infpstores[fM - 8]) { - infpstores[fM-8] = 1; + infpstores[fM - 8] = 1; last_prologue_pc = next_pc; } } else if (it == M - && ( ((instr & 0x1ffc8000000LL) == 0x08ec0000000LL) - || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL))) + && (((instr & 0x1ffc8000000LL) == 0x08ec0000000LL) + || ((instr & 0x1efc0000000LL) == 0x0aec0000000LL))) { /* st8.spill [rN] = rM or @@ -1715,9 +1738,9 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, cache->saved_regs[IA64_GR0_REGNUM + rM] = spill_addr; if ((instr & 0x1efc0000000LL) == 0x0aec0000000LL) /* st8.spill [rN] = rM, imm9 */ - spill_addr += imm9(instr); + spill_addr += imm9 (instr); else - spill_addr = 0; /* Done spilling. */ + spill_addr = 0; /* Done spilling. */ last_prologue_pc = next_pc; } } @@ -1745,20 +1768,18 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, /* Find the bof (beginning of frame). */ bof = rse_address_add (cache->bsp, -sof); - - for (i = 0, addr = bof; - i < sof; - i++, addr += 8) + + for (i = 0, addr = bof; i < sof; i++, addr += 8) { if (IS_NaT_COLLECTION_ADDR (addr)) { addr += 8; } - if (i+32 == cfm_reg) + if (i + 32 == cfm_reg) cache->saved_regs[IA64_CFM_REGNUM] = addr; - if (i+32 == ret_reg) + if (i + 32 == ret_reg) cache->saved_regs[IA64_VRAP_REGNUM] = addr; - if (i+32 == fp_reg) + if (i + 32 == fp_reg) cache->saved_regs[IA64_VFP_REGNUM] = addr; } @@ -1767,8 +1788,8 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, cfm = 0; if (cache->saved_regs[IA64_CFM_REGNUM] != 0) { - cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], - 8, byte_order); + cfm = read_memory_integer (cache->saved_regs[IA64_CFM_REGNUM], 8, + byte_order); } else if (cfm_reg != 0) { @@ -1776,7 +1797,7 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, cfm = extract_unsigned_integer (buf, 8, byte_order); } cache->prev_cfm = cfm; - + if (cfm != 0) { sor = ((cfm >> 14) & 0xf) * 8; @@ -1788,26 +1809,23 @@ examine_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, locals) due to the overlap between output and input of subsequent frames. */ bof = rse_address_add (bof, -sol); - - for (i = 0, addr = bof; - i < sof; - i++, addr += 8) + + for (i = 0, addr = bof; i < sof; i++, addr += 8) { if (IS_NaT_COLLECTION_ADDR (addr)) { addr += 8; } if (i < sor) - cache->saved_regs[IA64_GR32_REGNUM - + ((i + (sor - rrb_gr)) % sor)] + cache + ->saved_regs[IA64_GR32_REGNUM + ((i + (sor - rrb_gr)) % sor)] = addr; else cache->saved_regs[IA64_GR32_REGNUM + i] = addr; } - } } - + /* Try and trust the lim_pc value whenever possible. */ if (trust_limit && lim_pc >= last_prologue_pc) last_prologue_pc = lim_pc; @@ -1831,10 +1849,9 @@ ia64_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) /* Call examine_prologue with - as third argument since we don't have a next frame pointer to send. */ - return examine_prologue (pc, pc+1024, 0, &cache); + return examine_prologue (pc, pc + 1024, 0, &cache); } - /* Normal frames. */ static struct ia64_frame_cache * @@ -1860,7 +1877,7 @@ ia64_frame_cache (frame_info_ptr this_frame, void **this_cache) by subtracting frame size. */ get_frame_register (this_frame, IA64_BSP_REGNUM, buf); cache->bsp = extract_unsigned_integer (buf, 8, byte_order); - + get_frame_register (this_frame, IA64_PSR_REGNUM, buf); get_frame_register (this_frame, IA64_CFM_REGNUM, buf); @@ -1876,7 +1893,7 @@ ia64_frame_cache (frame_info_ptr this_frame, void **this_cache) if (cache->pc != 0) examine_prologue (cache->pc, get_frame_pc (this_frame), this_frame, cache); - + cache->base = cache->saved_sp + cache->mem_stack_frame_size; return cache; @@ -1887,8 +1904,7 @@ ia64_frame_this_id (frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id) { struct gdbarch *gdbarch = get_frame_arch (this_frame); - struct ia64_frame_cache *cache = - ia64_frame_cache (this_frame, this_cache); + struct ia64_frame_cache *cache = ia64_frame_cache (this_frame, this_cache); /* If outermost frame, mark with null frame id. */ if (cache->base != 0) @@ -1915,7 +1931,7 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, gdb_assert (regnum >= 0); if (!target_has_registers ()) - error (_("No registers.")); + error (_ ("No registers.")); if (regnum == gdbarch_sp_regnum (gdbarch)) return frame_unwind_got_constant (this_frame, regnum, cache->base); @@ -1934,11 +1950,11 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, that frame by adding the size of output: (sof (size of frame) - sol (size of locals)). */ val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM); - prev_cfm = extract_unsigned_integer (value_contents_all (val).data (), - 8, byte_order); + prev_cfm = extract_unsigned_integer (value_contents_all (val).data (), 8, + byte_order); bsp = rse_address_add (cache->bsp, -(cache->sof)); - prev_bsp = - rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f)); + prev_bsp + = rse_address_add (bsp, (prev_cfm & 0x7f) - ((prev_cfm >> 7) & 0x7f)); return frame_unwind_got_constant (this_frame, regnum, prev_bsp); } @@ -1946,7 +1962,7 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, else if (regnum == IA64_CFM_REGNUM) { CORE_ADDR addr = cache->saved_regs[IA64_CFM_REGNUM]; - + if (addr != 0) return frame_unwind_got_memory (this_frame, regnum, addr); @@ -1972,9 +1988,9 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, { struct value *pr_val; ULONGEST prN; - - pr_val = ia64_frame_prev_register (this_frame, this_cache, - IA64_PR_REGNUM); + + pr_val + = ia64_frame_prev_register (this_frame, this_cache, IA64_PR_REGNUM); if (VP16_REGNUM <= regnum && regnum <= VP63_REGNUM) { /* Fetch predicate register rename base from current frame @@ -1993,8 +2009,8 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, { struct value *unat_val; ULONGEST unatN; - unat_val = ia64_frame_prev_register (this_frame, this_cache, - IA64_UNAT_REGNUM); + unat_val + = ia64_frame_prev_register (this_frame, this_cache, IA64_UNAT_REGNUM); unatN = extract_bit_field (value_contents_all (unat_val).data (), regnum - IA64_NAT0_REGNUM, 1); return frame_unwind_got_constant (this_frame, regnum, unatN); @@ -2081,7 +2097,7 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, } psr &= ~(3LL << 41); slot_num = pc & 0x3LL; - psr |= (CORE_ADDR)slot_num << 41; + psr |= (CORE_ADDR) slot_num << 41; return frame_unwind_got_constant (this_frame, regnum, psr); } @@ -2117,18 +2133,20 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, regnum = IA64_GR32_REGNUM + (regnum - V32_REGNUM); reg_val = ia64_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM); - prev_cfm = extract_unsigned_integer - (value_contents_all (reg_val).data (), 8, byte_order); + prev_cfm + = extract_unsigned_integer (value_contents_all (reg_val).data (), + 8, byte_order); reg_val = ia64_frame_prev_register (this_frame, this_cache, IA64_BSP_REGNUM); - prev_bsp = extract_unsigned_integer - (value_contents_all (reg_val).data (), 8, byte_order); + prev_bsp + = extract_unsigned_integer (value_contents_all (reg_val).data (), + 8, byte_order); prev_bof = rse_address_add (prev_bsp, -(prev_cfm & 0x7f)); addr = rse_address_add (prev_bof, (regnum - IA64_GR32_REGNUM)); return frame_unwind_got_memory (this_frame, regnum, addr); } - + return frame_unwind_got_constant (this_frame, regnum, 0); } @@ -2144,8 +2162,8 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, /* Adjust the floating point register number to account for register rotation. */ - regnum = IA64_FR32_REGNUM - + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96; + regnum + = IA64_FR32_REGNUM + ((regnum - IA64_FR32_REGNUM) + rrb_fr) % 96; } /* If we have stored a memory address, access the register. */ @@ -2153,21 +2171,19 @@ ia64_frame_prev_register (frame_info_ptr this_frame, void **this_cache, if (addr != 0) return frame_unwind_got_memory (this_frame, regnum, addr); /* Otherwise, punt and get the current value of the register. */ - else + else return frame_unwind_got_register (this_frame, regnum, regnum); } } - -static const struct frame_unwind ia64_frame_unwind = -{ - "ia64 prologue", - NORMAL_FRAME, - default_frame_unwind_stop_reason, - &ia64_frame_this_id, - &ia64_frame_prev_register, - NULL, - default_frame_sniffer -}; + +static const struct frame_unwind ia64_frame_unwind + = { "ia64 prologue", + NORMAL_FRAME, + default_frame_unwind_stop_reason, + &ia64_frame_this_id, + &ia64_frame_prev_register, + NULL, + default_frame_sniffer }; /* Signal trampolines. */ @@ -2214,14 +2230,14 @@ ia64_sigtramp_frame_init_saved_regs (frame_info_ptr this_frame, IA64_LC_REGNUM); for (regno = IA64_GR1_REGNUM; regno <= IA64_GR31_REGNUM; regno++) - cache->saved_regs[regno] = - tdep->sigcontext_register_address (gdbarch, cache->base, regno); + cache->saved_regs[regno] + = tdep->sigcontext_register_address (gdbarch, cache->base, regno); for (regno = IA64_BR0_REGNUM; regno <= IA64_BR7_REGNUM; regno++) - cache->saved_regs[regno] = - tdep->sigcontext_register_address (gdbarch, cache->base, regno); + cache->saved_regs[regno] + = tdep->sigcontext_register_address (gdbarch, cache->base, regno); for (regno = IA64_FR2_REGNUM; regno <= IA64_FR31_REGNUM; regno++) - cache->saved_regs[regno] = - tdep->sigcontext_register_address (gdbarch, cache->base, regno); + cache->saved_regs[regno] + = tdep->sigcontext_register_address (gdbarch, cache->base, regno); } } @@ -2257,15 +2273,14 @@ ia64_sigtramp_frame_cache (frame_info_ptr this_frame, void **this_cache) } static void -ia64_sigtramp_frame_this_id (frame_info_ptr this_frame, - void **this_cache, struct frame_id *this_id) +ia64_sigtramp_frame_this_id (frame_info_ptr this_frame, void **this_cache, + struct frame_id *this_id) { struct gdbarch *gdbarch = get_frame_arch (this_frame); - struct ia64_frame_cache *cache = - ia64_sigtramp_frame_cache (this_frame, this_cache); + struct ia64_frame_cache *cache + = ia64_sigtramp_frame_cache (this_frame, this_cache); - (*this_id) = frame_id_build_special (cache->base, - get_frame_pc (this_frame), + (*this_id) = frame_id_build_special (cache->base, get_frame_pc (this_frame), cache->bsp); if (gdbarch_debug >= 1) gdb_printf (gdb_stdlog, @@ -2281,13 +2296,13 @@ static struct value * ia64_sigtramp_frame_prev_register (frame_info_ptr this_frame, void **this_cache, int regnum) { - struct ia64_frame_cache *cache = - ia64_sigtramp_frame_cache (this_frame, this_cache); + struct ia64_frame_cache *cache + = ia64_sigtramp_frame_cache (this_frame, this_cache); gdb_assert (regnum >= 0); if (!target_has_registers ()) - error (_("No registers.")); + error (_ ("No registers.")); if (regnum == IA64_IP_REGNUM) { @@ -2318,7 +2333,7 @@ ia64_sigtramp_frame_prev_register (frame_info_ptr this_frame, return frame_unwind_got_constant (this_frame, regnum, 0); } - else /* All other registers not listed above. */ + else /* All other registers not listed above. */ { CORE_ADDR addr = cache->saved_regs[regnum]; @@ -2331,8 +2346,7 @@ ia64_sigtramp_frame_prev_register (frame_info_ptr this_frame, static int ia64_sigtramp_frame_sniffer (const struct frame_unwind *self, - frame_info_ptr this_frame, - void **this_cache) + frame_info_ptr this_frame, void **this_cache) { gdbarch *arch = get_frame_arch (this_frame); ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (arch); @@ -2347,18 +2361,14 @@ ia64_sigtramp_frame_sniffer (const struct frame_unwind *self, return 0; } -static const struct frame_unwind ia64_sigtramp_frame_unwind = -{ - "ia64 sigtramp", - SIGTRAMP_FRAME, - default_frame_unwind_stop_reason, - ia64_sigtramp_frame_this_id, - ia64_sigtramp_frame_prev_register, - NULL, - ia64_sigtramp_frame_sniffer -}; - - +static const struct frame_unwind ia64_sigtramp_frame_unwind + = { "ia64 sigtramp", + SIGTRAMP_FRAME, + default_frame_unwind_stop_reason, + ia64_sigtramp_frame_this_id, + ia64_sigtramp_frame_prev_register, + NULL, + ia64_sigtramp_frame_sniffer }; static CORE_ADDR ia64_frame_base_address (frame_info_ptr this_frame, void **this_cache) @@ -2368,22 +2378,18 @@ ia64_frame_base_address (frame_info_ptr this_frame, void **this_cache) return cache->base; } -static const struct frame_base ia64_frame_base = -{ - &ia64_frame_unwind, - ia64_frame_base_address, - ia64_frame_base_address, - ia64_frame_base_address -}; +static const struct frame_base ia64_frame_base + = { &ia64_frame_unwind, ia64_frame_base_address, ia64_frame_base_address, + ia64_frame_base_address }; #ifdef HAVE_LIBUNWIND_IA64_H struct ia64_unwind_table_entry - { - unw_word_t start_offset; - unw_word_t end_offset; - unw_word_t info_offset; - }; +{ + unw_word_t start_offset; + unw_word_t end_offset; + unw_word_t info_offset; +}; static __inline__ uint64_t ia64_rse_slot_num (uint64_t addr) @@ -2396,13 +2402,13 @@ ia64_rse_slot_num (uint64_t addr) static __inline__ uint64_t ia64_rse_skip_regs (uint64_t addr, long num_regs) { - long delta = ia64_rse_slot_num(addr) + num_regs; + long delta = ia64_rse_slot_num (addr) + num_regs; if (num_regs < 0) delta -= 0x3e; - return addr + ((num_regs + delta/0x3f) << 3); + return addr + ((num_regs + delta / 0x3f) << 3); } - + /* Gdb ia64-libunwind-tdep callback function to convert from an ia64 gdb register number to a libunwind register number. */ static int @@ -2435,7 +2441,7 @@ ia64_gdb2uw_regnum (int regnum) else return -1; } - + /* Gdb ia64-libunwind-tdep callback function to convert from a libunwind register number to a ia64 gdb register number. */ static int @@ -2477,7 +2483,7 @@ ia64_is_fpreg (int uw_regnum) /* Libunwind callback accessor function for general registers. */ static int -ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, +ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, int write, void *arg) { int regnum = ia64_uw2gdb_regnum (uw_regnum); @@ -2485,48 +2491,48 @@ ia64_access_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t *val, struct frame_info *this_frame = (frame_info *) arg; struct gdbarch *gdbarch = get_frame_arch (this_frame); ia64_gdbarch_tdep *tdep = gdbarch_tdep<ia64_gdbarch_tdep> (gdbarch); - + /* We never call any libunwind routines that need to write registers. */ gdb_assert (!write); switch (uw_regnum) { - case UNW_REG_IP: - /* Libunwind expects to see the pc value which means the slot number + case UNW_REG_IP: + /* Libunwind expects to see the pc value which means the slot number from the psr must be merged with the ip word address. */ - ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM); - psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM); - *val = ip | ((psr >> 41) & 0x3); - break; - - case UNW_IA64_AR_BSP: - /* Libunwind expects to see the beginning of the current + ip = get_frame_register_unsigned (this_frame, IA64_IP_REGNUM); + psr = get_frame_register_unsigned (this_frame, IA64_PSR_REGNUM); + *val = ip | ((psr >> 41) & 0x3); + break; + + case UNW_IA64_AR_BSP: + /* Libunwind expects to see the beginning of the current register frame so we must account for the fact that ptrace() will return a value for bsp that points *after* the current register frame. */ - bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); - cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); - sof = tdep->size_of_register_frame (this_frame, cfm); - *val = ia64_rse_skip_regs (bsp, -sof); - break; + bsp = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); + cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); + sof = tdep->size_of_register_frame (this_frame, cfm); + *val = ia64_rse_skip_regs (bsp, -sof); + break; - case UNW_IA64_AR_BSPSTORE: - /* Libunwind wants bspstore to be after the current register frame. + case UNW_IA64_AR_BSPSTORE: + /* Libunwind wants bspstore to be after the current register frame. This is what ptrace() and gdb treats as the regular bsp value. */ - *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); - break; + *val = get_frame_register_unsigned (this_frame, IA64_BSP_REGNUM); + break; - default: - /* For all other registers, just unwind the value directly. */ - *val = get_frame_register_unsigned (this_frame, regnum); - break; + default: + /* For all other registers, just unwind the value directly. */ + *val = get_frame_register_unsigned (this_frame, regnum); + break; } - + if (gdbarch_debug >= 1) - gdb_printf (gdb_stdlog, - " access_reg: from cache: %4s=%s\n", + gdb_printf (gdb_stdlog, " access_reg: from cache: %4s=%s\n", (((unsigned) regnum <= IA64_NAT127_REGNUM) - ? ia64_register_names[regnum] : "r??"), + ? ia64_register_names[regnum] + : "r??"), paddress (gdbarch, *val)); return 0; } @@ -2538,7 +2544,7 @@ ia64_access_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, { int regnum = ia64_uw2gdb_regnum (uw_regnum); frame_info_ptr this_frame = (frame_info_ptr) arg; - + /* We never call any libunwind routines that need to write registers. */ gdb_assert (!write); @@ -2556,48 +2562,48 @@ ia64_access_rse_reg (unw_addr_space_t as, unw_regnum_t uw_regnum, unw_word_t bsp, sof, cfm, psr, ip; struct regcache *regcache = (struct regcache *) arg; struct gdbarch *gdbarch = regcache->arch (); - + /* We never call any libunwind routines that need to write registers. */ gdb_assert (!write); switch (uw_regnum) { - case UNW_REG_IP: - /* Libunwind expects to see the pc value which means the slot number + case UNW_REG_IP: + /* Libunwind expects to see the pc value which means the slot number from the psr must be merged with the ip word address. */ - regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip); - regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr); - *val = ip | ((psr >> 41) & 0x3); - break; - - case UNW_IA64_AR_BSP: - /* Libunwind expects to see the beginning of the current + regcache_cooked_read_unsigned (regcache, IA64_IP_REGNUM, &ip); + regcache_cooked_read_unsigned (regcache, IA64_PSR_REGNUM, &psr); + *val = ip | ((psr >> 41) & 0x3); + break; + + case UNW_IA64_AR_BSP: + /* Libunwind expects to see the beginning of the current register frame so we must account for the fact that ptrace() will return a value for bsp that points *after* the current register frame. */ - regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); - regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); - sof = (cfm & 0x7f); - *val = ia64_rse_skip_regs (bsp, -sof); - break; - - case UNW_IA64_AR_BSPSTORE: - /* Libunwind wants bspstore to be after the current register frame. + regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); + regcache_cooked_read_unsigned (regcache, IA64_CFM_REGNUM, &cfm); + sof = (cfm & 0x7f); + *val = ia64_rse_skip_regs (bsp, -sof); + break; + + case UNW_IA64_AR_BSPSTORE: + /* Libunwind wants bspstore to be after the current register frame. This is what ptrace() and gdb treats as the regular bsp value. */ - regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val); - break; + regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, val); + break; - default: - /* For all other registers, just unwind the value directly. */ - regcache_cooked_read_unsigned (regcache, regnum, val); - break; + default: + /* For all other registers, just unwind the value directly. */ + regcache_cooked_read_unsigned (regcache, regnum, val); + break; } - + if (gdbarch_debug >= 1) - gdb_printf (gdb_stdlog, - " access_rse_reg: from cache: %4s=%s\n", + gdb_printf (gdb_stdlog, " access_rse_reg: from cache: %4s=%s\n", (((unsigned) regnum <= IA64_NAT127_REGNUM) - ? ia64_register_names[regnum] : "r??"), + ? ia64_register_names[regnum] + : "r??"), paddress (gdbarch, *val)); return 0; @@ -2610,7 +2616,7 @@ ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, { int regnum = ia64_uw2gdb_regnum (uw_regnum); struct regcache *regcache = (struct regcache *) arg; - + /* We never call any libunwind routines that need to write registers. */ gdb_assert (!write); @@ -2621,18 +2627,17 @@ ia64_access_rse_fpreg (unw_addr_space_t as, unw_regnum_t uw_regnum, /* Libunwind callback accessor function for accessing memory. */ static int -ia64_access_mem (unw_addr_space_t as, - unw_word_t addr, unw_word_t *val, +ia64_access_mem (unw_addr_space_t as, unw_word_t addr, unw_word_t *val, int write, void *arg) { if (addr - KERNEL_START < ktab_size) { - unw_word_t *laddr = (unw_word_t*) ((char *) ktab - + (addr - KERNEL_START)); - + unw_word_t *laddr + = (unw_word_t *) ((char *) ktab + (addr - KERNEL_START)); + if (write) - *laddr = *val; - else + *laddr = *val; + else *val = *laddr; return 0; } @@ -2660,13 +2665,13 @@ getunwind_table () TARGET_OBJECT_UNWIND_TABLE, NULL); } -/* Get the kernel unwind table. */ +/* Get the kernel unwind table. */ static int get_kernel_table (unw_word_t ip, unw_dyn_info_t *di) { static struct ia64_table_entry *etab; - if (!ktab) + if (!ktab) { ktab_buf = getunwind_table (); if (!ktab_buf) @@ -2678,10 +2683,10 @@ get_kernel_table (unw_word_t ip, unw_dyn_info_t *di) for (etab = ktab; etab->start_offset; ++etab) etab->info_offset += KERNEL_START; } - + if (ip < ktab[0].start_offset || ip >= etab[-1].end_offset) return -UNW_ENOINFO; - + di->format = UNW_INFO_FORMAT_TABLE; di->gp = 0; di->start_ip = ktab[0].start_offset; @@ -2690,14 +2695,13 @@ get_kernel_table (unw_word_t ip, unw_dyn_info_t *di) di->u.ti.segbase = 0; di->u.ti.table_len = ((char *) etab - (char *) ktab) / sizeof (unw_word_t); di->u.ti.table_data = (unw_word_t *) ktab; - + if (gdbarch_debug >= 1) - gdb_printf (gdb_stdlog, "get_kernel_table: found table `%s': " + gdb_printf (gdb_stdlog, + "get_kernel_table: found table `%s': " "segbase=%s, length=%s, gp=%s\n", - (char *) di->u.ti.name_ptr, - hex_string (di->u.ti.segbase), - pulongest (di->u.ti.table_len), - hex_string (di->gp)); + (char *) di->u.ti.name_ptr, hex_string (di->u.ti.segbase), + pulongest (di->u.ti.table_len), hex_string (di->gp)); return 0; } @@ -2714,7 +2718,7 @@ ia64_find_unwind_table (struct objfile *objfile, unw_word_t ip, int i; bfd = objfile->obfd; - + ehdr = elf_tdata (bfd)->elf_header; phdr = elf_tdata (bfd)->phdr; @@ -2798,15 +2802,15 @@ ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi, return -UNW_ENOINFO; if (gdbarch_debug >= 1) - gdb_printf (gdb_stdlog, "ia64_find_proc_info_x: %s -> " + gdb_printf (gdb_stdlog, + "ia64_find_proc_info_x: %s -> " "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s," "length=%s,data=%s)\n", - hex_string (ip), (char *)di.u.ti.name_ptr, - hex_string (di.u.ti.segbase), - hex_string (di.start_ip), hex_string (di.end_ip), - hex_string (di.gp), - pulongest (di.u.ti.table_len), - hex_string ((CORE_ADDR)di.u.ti.table_data)); + hex_string (ip), (char *) di.u.ti.name_ptr, + hex_string (di.u.ti.segbase), hex_string (di.start_ip), + hex_string (di.end_ip), hex_string (di.gp), + pulongest (di.u.ti.table_len), + hex_string ((CORE_ADDR) di.u.ti.table_data)); } else { @@ -2815,19 +2819,19 @@ ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi, return ret; if (gdbarch_debug >= 1) - gdb_printf (gdb_stdlog, "ia64_find_proc_info_x: %s -> " + gdb_printf (gdb_stdlog, + "ia64_find_proc_info_x: %s -> " "(name=`%s',segbase=%s,start=%s,end=%s,gp=%s," "length=%s,data=%s)\n", - hex_string (ip), (char *)di.u.rti.name_ptr, - hex_string (di.u.rti.segbase), - hex_string (di.start_ip), hex_string (di.end_ip), - hex_string (di.gp), - pulongest (di.u.rti.table_len), + hex_string (ip), (char *) di.u.rti.name_ptr, + hex_string (di.u.rti.segbase), hex_string (di.start_ip), + hex_string (di.end_ip), hex_string (di.gp), + pulongest (di.u.rti.table_len), hex_string (di.u.rti.table_data)); } - ret = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info, - arg); + ret + = libunwind_search_unwind_table (&as, ip, &di, pi, need_unwind_info, arg); /* We no longer need the dyn info storage so free it. */ xfree (buf); @@ -2837,17 +2841,15 @@ ia64_find_proc_info_x (unw_addr_space_t as, unw_word_t ip, unw_proc_info_t *pi, /* Libunwind callback accessor function for cleanup. */ static void -ia64_put_unwind_info (unw_addr_space_t as, - unw_proc_info_t *pip, void *arg) +ia64_put_unwind_info (unw_addr_space_t as, unw_proc_info_t *pip, void *arg) { /* Nothing required for now. */ } /* Libunwind callback accessor function to get head of the dynamic - unwind-info registration list. */ + unwind-info registration list. */ static int -ia64_get_dyn_info_list (unw_addr_space_t as, - unw_word_t *dilap, void *arg) +ia64_get_dyn_info_list (unw_addr_space_t as, unw_word_t *dilap, void *arg) { struct obj_section *text_sec; unw_word_t ip, addr; @@ -2886,7 +2888,6 @@ ia64_get_dyn_info_list (unw_addr_space_t as, return -UNW_ENOINFO; } - /* Frame interface functions for libunwind. */ static void @@ -2918,8 +2919,7 @@ ia64_libunwind_frame_this_id (frame_info_ptr this_frame, void **this_cache, "libunwind frame id: code %s, stack %s, " "special %s, this_frame %s\n", paddress (gdbarch, id.code_addr), - paddress (gdbarch, id.stack_addr), - paddress (gdbarch, bsp), + paddress (gdbarch, id.stack_addr), paddress (gdbarch, bsp), host_address_to_string (this_frame)); } @@ -2953,7 +2953,7 @@ ia64_libunwind_frame_prev_register (frame_info_ptr this_frame, marker for this frame. */ cfm = get_frame_register_unsigned (this_frame, IA64_CFM_REGNUM); rrb_pr = (cfm >> 32) & 0x3f; - + /* Adjust the register number to account for register rotation. */ regnum = VP16_REGNUM + ((regnum - VP16_REGNUM) + rrb_pr) % 48; } @@ -2981,12 +2981,13 @@ ia64_libunwind_frame_prev_register (frame_info_ptr this_frame, register will be if we pop the frame back which is why we might have been called. We know that libunwind will pass us back the beginning of the current frame so we should just add sof to it. */ - prev_bsp = extract_unsigned_integer (value_contents_all (val).data (), - 8, byte_order); + prev_bsp = extract_unsigned_integer (value_contents_all (val).data (), 8, + byte_order); cfm_val = libunwind_frame_prev_register (this_frame, this_cache, IA64_CFM_REGNUM); - prev_cfm = extract_unsigned_integer (value_contents_all (cfm_val).data (), - 8, byte_order); + prev_cfm + = extract_unsigned_integer (value_contents_all (cfm_val).data (), 8, + byte_order); prev_bsp = rse_address_add (prev_bsp, (prev_cfm & 0x7f)); return frame_unwind_got_constant (this_frame, regnum, prev_bsp); @@ -2997,8 +2998,7 @@ ia64_libunwind_frame_prev_register (frame_info_ptr this_frame, static int ia64_libunwind_frame_sniffer (const struct frame_unwind *self, - frame_info_ptr this_frame, - void **this_cache) + frame_info_ptr this_frame, void **this_cache) { if (libunwind_is_initialized () && libunwind_frame_sniffer (self, this_frame, this_cache)) @@ -3007,17 +3007,15 @@ ia64_libunwind_frame_sniffer (const struct frame_unwind *self, return 0; } -static const struct frame_unwind ia64_libunwind_frame_unwind = -{ - "ia64 libunwind", - NORMAL_FRAME, - default_frame_unwind_stop_reason, - ia64_libunwind_frame_this_id, - ia64_libunwind_frame_prev_register, - NULL, - ia64_libunwind_frame_sniffer, - libunwind_frame_dealloc_cache -}; +static const struct frame_unwind ia64_libunwind_frame_unwind + = { "ia64 libunwind", + NORMAL_FRAME, + default_frame_unwind_stop_reason, + ia64_libunwind_frame_this_id, + ia64_libunwind_frame_prev_register, + NULL, + ia64_libunwind_frame_sniffer, + libunwind_frame_dealloc_cache }; static void ia64_libunwind_sigtramp_frame_this_id (frame_info_ptr this_frame, @@ -3050,8 +3048,7 @@ ia64_libunwind_sigtramp_frame_this_id (frame_info_ptr this_frame, "libunwind sigtramp frame id: code %s, " "stack %s, special %s, this_frame %s\n", paddress (gdbarch, id.code_addr), - paddress (gdbarch, id.stack_addr), - paddress (gdbarch, bsp), + paddress (gdbarch, id.stack_addr), paddress (gdbarch, bsp), host_address_to_string (this_frame)); } @@ -3066,8 +3063,8 @@ ia64_libunwind_sigtramp_frame_prev_register (frame_info_ptr this_frame, /* If the previous frame pc value is 0, then we want to use the SIGCONTEXT method of getting previous registers. */ - prev_ip_val = libunwind_frame_prev_register (this_frame, this_cache, - IA64_IP_REGNUM); + prev_ip_val + = libunwind_frame_prev_register (this_frame, this_cache, IA64_IP_REGNUM); prev_ip = extract_unsigned_integer (value_contents_all (prev_ip_val).data (), 8, byte_order); @@ -3096,26 +3093,19 @@ ia64_libunwind_sigtramp_frame_sniffer (const struct frame_unwind *self, return ia64_sigtramp_frame_sniffer (self, this_frame, this_cache); } -static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind = -{ - "ia64 libunwind sigtramp", - SIGTRAMP_FRAME, - default_frame_unwind_stop_reason, - ia64_libunwind_sigtramp_frame_this_id, - ia64_libunwind_sigtramp_frame_prev_register, - NULL, - ia64_libunwind_sigtramp_frame_sniffer -}; +static const struct frame_unwind ia64_libunwind_sigtramp_frame_unwind + = { "ia64 libunwind sigtramp", + SIGTRAMP_FRAME, + default_frame_unwind_stop_reason, + ia64_libunwind_sigtramp_frame_this_id, + ia64_libunwind_sigtramp_frame_prev_register, + NULL, + ia64_libunwind_sigtramp_frame_sniffer }; /* Set of libunwind callback acccessor functions. */ -unw_accessors_t ia64_unw_accessors = -{ - ia64_find_proc_info_x, - ia64_put_unwind_info, - ia64_get_dyn_info_list, - ia64_access_mem, - ia64_access_reg, - ia64_access_fpreg, +unw_accessors_t ia64_unw_accessors = { + ia64_find_proc_info_x, ia64_put_unwind_info, ia64_get_dyn_info_list, + ia64_access_mem, ia64_access_reg, ia64_access_fpreg, /* resume */ /* get_proc_name */ }; @@ -3124,27 +3114,18 @@ unw_accessors_t ia64_unw_accessors = the rse registers. At the top of the stack, we want libunwind to figure out how to read r32 - r127. Though usually they are found sequentially in memory starting from $bof, this is not always true. */ -unw_accessors_t ia64_unw_rse_accessors = -{ - ia64_find_proc_info_x, - ia64_put_unwind_info, - ia64_get_dyn_info_list, - ia64_access_mem, - ia64_access_rse_reg, - ia64_access_rse_fpreg, +unw_accessors_t ia64_unw_rse_accessors = { + ia64_find_proc_info_x, ia64_put_unwind_info, ia64_get_dyn_info_list, + ia64_access_mem, ia64_access_rse_reg, ia64_access_rse_fpreg, /* resume */ /* get_proc_name */ }; /* Set of ia64-libunwind-tdep gdb callbacks and data for generic ia64-libunwind-tdep code to use. */ -struct libunwind_descr ia64_libunwind_descr = -{ - ia64_gdb2uw_regnum, - ia64_uw2gdb_regnum, - ia64_is_fpreg, - &ia64_unw_accessors, - &ia64_unw_rse_accessors, +struct libunwind_descr ia64_libunwind_descr = { + ia64_gdb2uw_regnum, ia64_uw2gdb_regnum, ia64_is_fpreg, + &ia64_unw_accessors, &ia64_unw_rse_accessors, }; #endif /* HAVE_LIBUNWIND_IA64_H */ @@ -3156,8 +3137,7 @@ ia64_use_struct_convention (struct type *type) /* Don't use the struct convention for anything but structure, union, or array types. */ - if (!(type->code () == TYPE_CODE_STRUCT - || type->code () == TYPE_CODE_UNION + if (!(type->code () == TYPE_CODE_STRUCT || type->code () == TYPE_CODE_UNION || type->code () == TYPE_CODE_ARRAY)) return 0; @@ -3202,8 +3182,8 @@ ia64_extract_return_value (struct type *type, struct regcache *regcache, while (n-- > 0) { regcache->cooked_read (regnum, from); - target_float_convert (from, ia64_ext_type (gdbarch), - valbuf + offset, float_elt_type); + target_float_convert (from, ia64_ext_type (gdbarch), valbuf + offset, + float_elt_type); offset += float_elt_type->length (); regnum++; } @@ -3236,7 +3216,7 @@ ia64_extract_return_value (struct type *type, struct regcache *regcache, { ULONGEST regval; regcache_cooked_read_unsigned (regcache, regnum, ®val); - memcpy ((char *)valbuf + offset, ®val, reglen); + memcpy ((char *) valbuf + offset, ®val, reglen); offset += reglen; regnum++; } @@ -3244,13 +3224,13 @@ ia64_extract_return_value (struct type *type, struct regcache *regcache, if (m) { regcache_cooked_read_unsigned (regcache, regnum, &val); - memcpy ((char *)valbuf + offset, &val, m); + memcpy ((char *) valbuf + offset, &val, m); } } } static void -ia64_store_return_value (struct type *type, struct regcache *regcache, +ia64_store_return_value (struct type *type, struct regcache *regcache, const gdb_byte *valbuf) { struct gdbarch *gdbarch = regcache->arch (); @@ -3266,8 +3246,8 @@ ia64_store_return_value (struct type *type, struct regcache *regcache, while (n-- > 0) { - target_float_convert (valbuf + offset, float_elt_type, - to, ia64_ext_type (gdbarch)); + target_float_convert (valbuf + offset, float_elt_type, to, + ia64_ext_type (gdbarch)); regcache->cooked_write (regnum, to); offset += float_elt_type->length (); regnum++; @@ -3284,7 +3264,7 @@ ia64_store_return_value (struct type *type, struct regcache *regcache, while (n-- > 0) { ULONGEST val; - memcpy (&val, (char *)valbuf + offset, reglen); + memcpy (&val, (char *) valbuf + offset, reglen); regcache_cooked_write_unsigned (regcache, regnum, val); offset += reglen; regnum++; @@ -3293,12 +3273,12 @@ ia64_store_return_value (struct type *type, struct regcache *regcache, if (m) { ULONGEST val; - memcpy (&val, (char *)valbuf + offset, m); + memcpy (&val, (char *) valbuf + offset, m); regcache_cooked_write_unsigned (regcache, regnum, val); } } } - + static enum return_value_convention ia64_return_value (struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, @@ -3339,17 +3319,16 @@ is_float_or_hfa_type_recurse (struct type *t, struct type **etp) } break; case TYPE_CODE_ARRAY: - return - is_float_or_hfa_type_recurse (check_typedef (t->target_type ()), - etp); + return is_float_or_hfa_type_recurse (check_typedef (t->target_type ()), + etp); break; case TYPE_CODE_STRUCT: { int i; for (i = 0; i < t->num_fields (); i++) - if (!is_float_or_hfa_type_recurse - (check_typedef (t->field (i).type ()), etp)) + if (!is_float_or_hfa_type_recurse ( + check_typedef (t->field (i).type ()), etp)) return 0; return 1; } @@ -3373,7 +3352,6 @@ is_float_or_hfa_type (struct type *t) return is_float_or_hfa_type_recurse (t, &et) ? et : 0; } - /* Return 1 if the alignment of T is such that the next even slot should be used. Return 0, if the next available slot should be used. (See section 8.5.1 of the IA-64 Software Conventions @@ -3391,15 +3369,14 @@ slot_alignment_is_next_even (struct type *t) else return 0; case TYPE_CODE_ARRAY: - return - slot_alignment_is_next_even (check_typedef (t->target_type ())); + return slot_alignment_is_next_even (check_typedef (t->target_type ())); case TYPE_CODE_STRUCT: { int i; for (i = 0; i < t->num_fields (); i++) - if (slot_alignment_is_next_even - (check_typedef (t->field (i).type ()))) + if ( + slot_alignment_is_next_even (check_typedef (t->field (i).type ()))) return 1; return 0; } @@ -3424,7 +3401,7 @@ ia64_find_global_pointer_from_dynamic_section (struct gdbarch *gdbarch, { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); struct obj_section *faddr_sect; - + faddr_sect = find_pc_section (faddr); if (faddr_sect != NULL) { @@ -3459,8 +3436,8 @@ ia64_find_global_pointer_from_dynamic_section (struct gdbarch *gdbarch, status = target_read_memory (addr + 8, buf, sizeof (buf)); if (status != 0) break; - global_pointer = extract_unsigned_integer (buf, sizeof (buf), - byte_order); + global_pointer + = extract_unsigned_integer (buf, sizeof (buf), byte_order); /* The payoff... */ return global_pointer; @@ -3567,8 +3544,8 @@ find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr) global_pointer = ia64_find_global_pointer (gdbarch, faddr); if (global_pointer == 0) - regcache_cooked_read_unsigned (regcache, - IA64_GR1_REGNUM, &global_pointer); + regcache_cooked_read_unsigned (regcache, IA64_GR1_REGNUM, + &global_pointer); store_unsigned_integer (buf, 8, byte_order, faddr); store_unsigned_integer (buf + 8, 8, byte_order, global_pointer); @@ -3576,7 +3553,7 @@ find_func_descr (struct regcache *regcache, CORE_ADDR faddr, CORE_ADDR *fdaptr) write_memory (fdesc, buf, 16); } - return fdesc; + return fdesc; } /* Use the following routine when printing out function pointers @@ -3618,8 +3595,7 @@ ia64_convert_from_func_ptr_addr (struct gdbarch *gdbarch, CORE_ADDR addr, minsym = lookup_minimal_symbol_by_pc (addr); - if (minsym.minsym - && is_vtable_name (minsym.minsym->linkage_name ())) + if (minsym.minsym && is_vtable_name (minsym.minsym->linkage_name ())) return read_memory_unsigned_integer (addr, 8, byte_order); } @@ -3674,8 +3650,8 @@ ia64_set_function_addr (struct regcache *regcache, CORE_ADDR func_addr) static CORE_ADDR ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, - struct regcache *regcache, CORE_ADDR bp_addr, - int nargs, struct value **args, CORE_ADDR sp, + struct regcache *regcache, CORE_ADDR bp_addr, int nargs, + struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr) { @@ -3716,7 +3692,7 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, /* Allocate a new RSE frame. */ regcache_cooked_read_unsigned (regcache, IA64_BSP_REGNUM, &bsp); tdep->infcall_ops.allocate_new_rse_frame (regcache, bsp, rseslots); - + /* We will attempt to find function descriptors in the .opd segment, but if we can't we'll construct them ourselves. That being the case, we'll need to reserve space on the stack for them. */ @@ -3727,7 +3703,7 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, require us to have 16 bytes of scratch, plus whatever space is necessary for the memory slots and our function descriptors. */ sp = sp - 16 - (memslots + nfuncargs) * 8; - sp &= ~0xfLL; /* Maintain 16 byte alignment. */ + sp &= ~0xfLL; /* Maintain 16 byte alignment. */ /* Place the arguments where they belong. The arguments will be either placed in the RSE backing store or on the memory stack. @@ -3744,19 +3720,19 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, len = type->length (); /* Special handling for function parameters. */ - if (len == 8 - && type->code () == TYPE_CODE_PTR + if (len == 8 && type->code () == TYPE_CODE_PTR && type->target_type ()->code () == TYPE_CODE_FUNC) { gdb_byte val_buf[8]; - ULONGEST faddr = extract_unsigned_integer - (value_contents (arg).data (), 8, byte_order); + ULONGEST faddr + = extract_unsigned_integer (value_contents (arg).data (), 8, + byte_order); store_unsigned_integer (val_buf, 8, byte_order, find_func_descr (regcache, faddr, &funcdescaddr)); if (slotnum < rseslots) - tdep->infcall_ops.store_argument_in_slot (regcache, bsp, - slotnum, val_buf); + tdep->infcall_ops.store_argument_in_slot (regcache, bsp, slotnum, + val_buf); else write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); slotnum++; @@ -3780,10 +3756,10 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, /* Integral types are LSB-aligned, so we have to be careful to insert the argument on the correct side of the buffer. This is why we use store_unsigned_integer. */ - store_unsigned_integer - (val_buf, 8, byte_order, - extract_unsigned_integer (value_contents (arg).data (), len, - byte_order)); + store_unsigned_integer ( + val_buf, 8, byte_order, + extract_unsigned_integer (value_contents (arg).data (), len, + byte_order)); } else { @@ -3801,8 +3777,8 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, } if (slotnum < rseslots) - tdep->infcall_ops.store_argument_in_slot (regcache, bsp, - slotnum, val_buf); + tdep->infcall_ops.store_argument_in_slot (regcache, bsp, slotnum, + val_buf); else write_memory (sp + 16 + 8 * (slotnum - rseslots), val_buf, 8); @@ -3855,12 +3831,9 @@ ia64_push_dummy_call (struct gdbarch *gdbarch, struct value *function, return sp; } -static const struct ia64_infcall_ops ia64_infcall_ops = -{ - ia64_allocate_new_rse_frame, - ia64_store_argument_in_slot, - ia64_set_function_addr -}; +static const struct ia64_infcall_ops ia64_infcall_ops + = { ia64_allocate_new_rse_frame, ia64_store_argument_in_slot, + ia64_set_function_addr }; static struct frame_id ia64_dummy_id (struct gdbarch *gdbarch, frame_info_ptr this_frame) @@ -3876,15 +3849,14 @@ ia64_dummy_id (struct gdbarch *gdbarch, frame_info_ptr this_frame) bsp = extract_unsigned_integer (buf, 8, byte_order); if (gdbarch_debug >= 1) - gdb_printf (gdb_stdlog, - "dummy frame id: code %s, stack %s, special %s\n", + gdb_printf (gdb_stdlog, "dummy frame id: code %s, stack %s, special %s\n", paddress (gdbarch, get_frame_pc (this_frame)), paddress (gdbarch, sp), paddress (gdbarch, bsp)); return frame_id_build_special (sp, get_frame_pc (this_frame), bsp); } -static CORE_ADDR +static CORE_ADDR ia64_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) { enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); @@ -3895,7 +3867,7 @@ ia64_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame) ip = extract_unsigned_integer (buf, 8, byte_order); frame_unwind_register (next_frame, IA64_PSR_REGNUM, buf); psr = extract_unsigned_integer (buf, 8, byte_order); - + pc = (ip & ~0xf) | ((psr >> 41) & 3); return pc; } @@ -4015,6 +3987,7 @@ ia64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) } void _initialize_ia64_tdep (); + void _initialize_ia64_tdep () { |