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| author | Richard Sandiford <richard.sandiford@arm.com> | 2016-06-17 14:55:00 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2016-08-23 09:41:04 +0100 |
| commit | 936b52907bc22f1f0c4c4bf7865d6f70ceb25eb2 (patch) | |
| tree | 188c203a200671a5fa4ae0ed1a8e485453057e35 /opcodes/avr-dis.c | |
| parent | af2b6e952f8f96fd4cd02fc8dac03ed354695eca (diff) | |
| download | binutils-936b52907bc22f1f0c4c4bf7865d6f70ceb25eb2.zip binutils-936b52907bc22f1f0c4c4bf7865d6f70ceb25eb2.tar.gz binutils-936b52907bc22f1f0c4c4bf7865d6f70ceb25eb2.tar.bz2 | |
[AArch64][SVE 29/32] Add new SVE core & FP register operands
SVE uses some new fields to store W, X and scalar FP registers.
This patch adds corresponding operands.
include/opcode/
* aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
(AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
(AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
opcodes/
* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core
and FP register operands.
* aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm)
(FLD_SVE_Vn): New aarch64_field_kinds.
* aarch64-opc.c (fields): Add corresponding entries.
(aarch64_print_operand): Handle the new SVE core and FP register
operands.
* aarch64-opc-2.c: Regenerate.
* aarch64-asm-2.c: Likewise.
* aarch64-dis-2.c: Likewise.
gas/
* config/tc-aarch64.c (parse_operands): Handle the new SVE core
and FP register operands.
Change-Id: Icb683553ba080e25c1de2449fa6e9030e48eba36
Diffstat (limited to 'opcodes/avr-dis.c')
0 files changed, 0 insertions, 0 deletions