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| author | Simon Marchi <simon.marchi@polymtl.ca> | 2023-02-08 15:36:23 -0500 |
|---|---|---|
| committer | Simon Marchi <simon.marchi@polymtl.ca> | 2023-02-08 15:46:02 -0500 |
| commit | c583a2520616c2736cffc389c89a48b159366e6c (patch) | |
| tree | b4925f26506fcee96c16119431c01760f05db95d /gdb/riscv-fbsd-tdep.h | |
| parent | ca7f92c2f15b86b09c4a8ad14806bef666308d31 (diff) | |
| download | binutils-users/simark/clang-format.zip binutils-users/simark/clang-format.tar.gz binutils-users/simark/clang-format.tar.bz2 | |
Run clang-format.shusers/simark/clang-format
Change-Id: Ia948cc26d534b0dd02702244d52434b1a2093968
Diffstat (limited to 'gdb/riscv-fbsd-tdep.h')
| -rw-r--r-- | gdb/riscv-fbsd-tdep.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gdb/riscv-fbsd-tdep.h b/gdb/riscv-fbsd-tdep.h index ee5bb2b..0000026 100644 --- a/gdb/riscv-fbsd-tdep.h +++ b/gdb/riscv-fbsd-tdep.h @@ -24,7 +24,7 @@ /* The general-purpose regset consists of 31 X registers, EPC, and SSTATUS. */ -#define RISCV_FBSD_NUM_GREGS 33 +#define RISCV_FBSD_NUM_GREGS 33 /* The fp regset always consists of 32 128-bit registers, plus a 64-bit CSR_FCSR. If 'Q' is not supported, only the low 64-bits of |