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author | Kito Cheng <kito.cheng@sifive.com> | 2019-07-24 10:40:54 +0800 |
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committer | Kito Cheng <kito.cheng@sifive.com> | 2019-07-24 10:40:54 +0800 |
commit | 1bf905ec03eec23c9bf512634d448aee1941b65e (patch) | |
tree | 2ab252808cfe2038699ece2a1825de0103d45ea4 /test | |
parent | 490bb249f38c5cf82e13490b0ebc12c0eb2b6f81 (diff) | |
download | riscv-gnu-toolchain-1bf905ec03eec23c9bf512634d448aee1941b65e.zip riscv-gnu-toolchain-1bf905ec03eec23c9bf512634d448aee1941b65e.tar.gz riscv-gnu-toolchain-1bf905ec03eec23c9bf512634d448aee1941b65e.tar.bz2 |
Update white list comment from Jim
Diffstat (limited to 'test')
-rw-r--r-- | test/whitelist/binutils/glibc.log | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/test/whitelist/binutils/glibc.log b/test/whitelist/binutils/glibc.log index fa7eb24..f3245a3 100644 --- a/test/whitelist/binutils/glibc.log +++ b/test/whitelist/binutils/glibc.log @@ -1,6 +1,15 @@ # -# XXX: Unknwon. +# Missing a relaxation to convert PC-relative GOT references to +# local symbols to PC-relative direct references. +# +# This is an optimization, not a correctness issue. # FAIL: indirect5c dynsym FAIL: indirect5d dynsym +# +# Similarly to the above case, needs a new relaxation and maybe a new relocation +# to eliminate tprel relocations in pie mode. +# +# This is an optimization, not a correctness issue too. +# FAIL: Build pr22263-1 |